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ARM two-operand aliases for VRHADD instructions.
[oota-llvm.git]
/
lib
/
Target
/
Hexagon
/
HexagonTargetMachine.cpp
2012-04-16
Sirish Pande
Hexagon V5 (Floating Point) Support.
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2012-04-13
Sirish Pande
Add support for Hexagon Architectural feature, New...
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2012-04-13
Sirish Pande
Pass to replace tranfer/copy instructions into combine...
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2012-04-12
Sirish Pande
HexagonPacketizer patch.
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2012-03-17
Craig Topper
Pass TargetOptions to HexagonTargetMachine constructor...
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2012-02-18
Jia Liu
Emacs-tag and some comment fix for all ARM, CellSPU...
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2012-02-15
Sirish Pande
Optimize redundant sign extends and negation of predicates.
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2012-02-15
Eric Christopher
Revert "Optimize redundant sign extends and negation...
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2012-02-15
Sirish Pande
Optimize redundant sign extends and negation of predicates
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2012-02-08
Andrew Trick
Codegen pass definition cleanup. No functionality.
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2012-02-06
Benjamin Kramer
Hexagon: Remove forbidden iostream includes (it introdu...
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2012-02-04
Andrew Trick
TargetPassConfig: confine the MC configuration to Targe...
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2012-02-03
Andrew Trick
Added TargetPassConfig. The first little step toward...
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2011-12-16
Benjamin Kramer
Hexagon: Fix a nasty order-of-initialization bug.
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2011-12-15
Tony Linthicum
Add MCTargetDesc library to Hexagon target
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2011-12-12
Tony Linthicum
Hexagon backend support
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