CXX_FAST_TLS calling convention: performance improvement for AArch64.
[oota-llvm.git] / lib / Target / NVPTX / NVPTXIntrinsics.td
2014-07-18 Tim NorthoverNVPTX: support direct f16 <-> f64 conversions via intri...
2014-07-17 Justin Holewinski[NVPTX] Flag surface/texture query instructions with...
2014-07-17 Justin Holewinski[NVPTX] Add more surface/texture intrinsics, including...
2014-07-17 Tim NorthoverCodeGen: extend f16 conversions to permit types > float.
2014-06-27 Justin Holewinski[NVPTX] Fix handling of ldg/ldu intrinsics.
2014-06-27 Justin Holewinski[NVPTX] Add support for efficient rotate instructions...
2014-06-27 Justin Holewinski[NVPTX] Add missing isel patterns for 64-bit atomics
2014-06-27 Justin Holewinski[NVPTX] Add support for isspacep instruction
2014-06-27 Justin Holewinski[NVPTX] Add support for envreg reads
2014-04-09 Justin Holewinski[NVPTX] Add preliminary intrinsics and codegen support...
2013-07-01 Justin Holewinski[NVPTX] Add isel patterns for [reg+offset] form of...
2013-06-28 Justin Holewinski[NVPTX] Clean up comparison/select/convert patterns...
2013-06-28 Justin Holewinski[NVPTX] Remove i8 register class. PTX support for...
2013-05-21 Justin Holewinski[NVPTX] Add @llvm.nvvm.sqrt.f() intrinsic
2013-05-20 Justin Holewinski[NVPTX] Add GenericToNVVM IR converter to better handle...
2013-02-12 Justin Holewinski[NVPTX] Disable vector registers
2012-05-04 Justin HolewinskiThis patch adds a new NVPTX back-end to LLVM which...