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SparcV9 doesnt have rem instruction either.
[oota-llvm.git]
/
lib
/
Target
/
R600
/
AMDGPUISelDAGToDAG.cpp
2013-09-22
Tim Northover
ISelDAG: spot chain cycles involving MachineNodes
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2013-09-12
Vincent Lejeune
R600: Move clamp handling code to R600IselLowering.cpp
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2013-09-12
Vincent Lejeune
R600: Move code handling literal folding into R600ISelL...
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2013-09-12
Vincent Lejeune
R600: Move fabs/fneg/sel folding logic into PostProcessIsel
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2013-08-31
Benjamin Kramer
Mark an unreachable code path with llvm_unreachable...
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2013-08-16
Tom Stellard
R600: Enable folding of inline literals into REQ_SEQUEN...
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2013-08-15
Alexey Samsonov
Tentative fix for global-buffer-overflow caused by...
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2013-08-14
Tom Stellard
R600/SI: Lower BUILD_VECTOR to REG_SEQUENCE v2
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2013-08-14
Tom Stellard
R600/SI: Choose the correct MOV instruction for copying...
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2013-08-06
Tom Stellard
R600/SI: Use VSrc_* register classes as the default...
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2013-08-01
Tom Stellard
R600: Add 64-bit float load/store support
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2013-07-23
Tom Stellard
R600: Treat CONSTANT_ADDRESS loads like GLOBAL_ADDRESS...
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2013-07-23
Tom Stellard
R600: Add support for 24-bit MUL instructions
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2013-07-23
Tom Stellard
R600: Rename AMDILISelDAGToDAG.cpp -> AMDGPUISelDAGToDA...
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