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R600/SI: Implement correct f64 fdiv
[oota-llvm.git]
/
lib
/
Target
/
R600
/
R600ControlFlowFinalizer.cpp
2015-01-30
Eric Christopher
Reuse a bunch of cached subtargets and remove getSubtar...
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2014-10-04
Benjamin Kramer
Remove unnecessary copying or replace it with moves...
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2014-10-03
Benjamin Kramer
Eliminate some deep std::vector copies. NFC.
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2014-08-05
Eric Christopher
Have MachineFunction cache a pointer to the subtarget...
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2014-08-04
Eric Christopher
Remove the TargetMachine forwards for TargetSubtargetIn...
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2014-07-13
Matt Arsenault
R600: Make ShaderType private
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2014-06-13
Tom Stellard
R600: Move AMDGPUInstrInfo from AMDGPUTargetMachine...
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2014-04-29
Craig Topper
[C++11] Add 'override' keywords and remove 'virtual...
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2014-04-25
Craig Topper
[C++] Use 'nullptr'. Target edition.
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2014-04-22
Chandler Carruth
[Modules] Fix potential ODR violations by sinking the...
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2014-01-23
Tom Stellard
R600: Correctly handle vertex fetch clauses the precede...
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2014-01-23
Tom Stellard
R600: Recommit 199842: Add work-around for the CF stack...
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2014-01-22
Tom Stellard
Revert "R600: Add work-around for the CF stack entry...
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2014-01-22
Tom Stellard
R600: Add work-around for the CF stack entry HW bug
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2014-01-22
Tom Stellard
R600: Refactor stack size calculation
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2014-01-22
Tom Stellard
R600: CF_PUSH is the same on Evergreen and Cayman
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2013-12-02
Vincent Lejeune
R600: Workaround for cayman loop bug
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2013-08-16
Tom Stellard
R600: Add IsExport bit to TableGen instruction definitions
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2013-08-16
Tom Stellard
R600: Change the RAT instruction assembly names so...
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2013-08-01
Tom Stellard
R600: Add 64-bit float load/store support
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2013-07-31
Vincent Lejeune
R600: Remove predicated_break inst
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2013-07-19
Vincent Lejeune
R600: Don't emit empty then clause and use alu_pop_after
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2013-07-15
Craig Topper
Make some arrays 'static const'
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2013-07-09
Vincent Lejeune
R600: Do not predicated basic block with multiple alu...
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2013-06-14
Tom Stellard
R600: Use EXPORT_RAT_INST_STORE_DWORD for stores on...
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2013-06-07
Vincent Lejeune
R600: Anti dep better handled in tex clause
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2013-06-07
Tom Stellard
R600: Rework subtarget info and remove AMDILDevice...
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2013-06-07
Bill Wendling
Don't cache the instruction and register info from...
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2013-06-03
Vincent Lejeune
R600: CALL_FS consumes a stack size entry
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2013-05-23
Tom Stellard
R600: Fix R600ControlFlowFinalizer not considering...
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2013-05-23
Benjamin Kramer
Move passes from namespace llvm into anonymous namespac...
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2013-05-23
Aaron Ballman
Setting the default value (fixes CRT assertions about...
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2013-05-17
Vincent Lejeune
R600: Some factorization
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2013-05-17
Vincent Lejeune
R600: Factorize Fetch size limit inside AMDGPUSubTarget
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2013-05-02
Vincent Lejeune
R600: Signed literals are 64bits wide
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2013-04-30
Vincent Lejeune
R600: use native for alu
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2013-04-30
Vincent Lejeune
R600: Take inner dependency into tex/vtx clauses
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2013-04-30
Vincent Lejeune
R600: Turn TEX/VTX into native instructions
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2013-04-30
Vincent Lejeune
R600: Add FetchInst bit to instruction defs to denote...
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2013-04-29
Tom Stellard
R600: Use correct CF_END instruction on Northern Island...
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2013-04-23
Vincent Lejeune
R600: Use .AMDGPU.config section to emit stacksize
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2013-04-23
Vincent Lejeune
R600: Add CF_END
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2013-04-11
NAKAMURA Takumi
R600ControlFlowFinalizer.cpp: Fix a warning. [-Wunused...
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2013-04-11
NAKAMURA Takumi
Whitespace.
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2013-04-10
Vincent Lejeune
R600: Add VTX_READ_* and RAT_WRITE_CACHELESS_* when...
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2013-04-08
Vincent Lejeune
R600: Control Flow support for pre EG gen
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2013-04-04
Vincent Lejeune
R600: Fix wrong address when substituting ENDIF
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2013-04-04
Vincent Lejeune
R600: Take export into account when computing cf address
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2013-04-03
Vincent Lejeune
R600: Simplify data structure and add DEBUG to R600Cont...
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2013-04-03
Vincent Lejeune
R600: Consider KILLGT as an ALU instruction
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2013-04-01
Vincent Lejeune
R600: Add support for native control flow
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