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R600/SI: Don't set isCodeGenOnly = 1 on all instructions
[oota-llvm.git]
/
lib
/
Target
/
R600
/
R600RegisterInfo.td
2014-06-17
Tom Stellard
R600: Use LDS and vectors for private memory
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2013-10-22
Tom Stellard
R600: Simplify handling of private address space
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2013-10-01
Vincent Lejeune
R600: Enable -verify-machineinstrs in some tests.
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2013-09-12
Tom Stellard
R600: Don't use trans slot for instructions that read...
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2013-08-01
Tom Stellard
R600: Add 64-bit float load/store support
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2013-07-23
Tom Stellard
R600: Simplify assembly for KCache registers using...
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2013-06-29
Vincent Lejeune
R600: Support schedule and packetization of trans-only...
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2013-06-28
Tom Stellard
R600: Add local memory support via LDS
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2013-06-03
Vincent Lejeune
R600: use capital letter for PV channel
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2013-05-17
Vincent Lejeune
R600: Rename 128 bit registers.
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2013-05-02
Vincent Lejeune
R600: Prettier asmPrint of Alu
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2013-04-30
Vincent Lejeune
R600: use native for alu
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2013-04-30
Vincent Lejeune
R600: Packetize instructions
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2013-04-01
Vincent Lejeune
R600: Emit CF_ALU and use true kcache register.
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2013-02-19
Tom Stellard
R600: Add AR_X to the R600_TReg_X register class.
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2013-02-18
Vincent Lejeune
R600: Increase number of ArrayBase Reg to 32
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2013-02-07
Tom Stellard
R600: Consolidate sub register indices.
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2013-02-06
Tom Stellard
R600: Support for indirect addressing v4
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2013-01-23
Tom Stellard
R600: rework handling of the constants
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2012-12-11
Tom Stellard
Add R600 backend
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