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R600/SI: Add load / store machine optimizer pass.
[oota-llvm.git]
/
lib
/
Target
/
R600
/
SIISelLowering.cpp
2014-10-09
Tom Stellard
R600/SI: Legalize CopyToReg during instruction selection
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2014-10-09
Tom Stellard
R600/SI: Legalize INSERT_SUBREG instructions during...
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2014-10-03
Matt Arsenault
R600/SI: Custom lower f64 -> i64 conversions
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2014-09-29
Matt Arsenault
R600/SI: Also fix fsub + fadd a, a to mad combines
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2014-09-29
Matt Arsenault
R600/SI: Fix using mad with multiplies by 2
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2014-09-26
Matt Arsenault
R600/SI: Partially move operand legalization to post...
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2014-09-26
Matt Arsenault
R600/SI: Remove apparently dead code in legalizeOperands
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2014-09-23
Tom Stellard
R600/SI: Clean up checks for legality of immediate...
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2014-09-22
Tom Stellard
R600/SI: Add enums for some hard-coded values
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2014-09-17
Matt Arsenault
R600/SI: Remove promotion of instructions to e64 forms.
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2014-09-10
Matt Arsenault
R600/SI: Fix losing chain when fixing reg class of...
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2014-09-08
Matt Arsenault
R600/SI: Fix assertion from copying a TargetGlobalAddress
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2014-09-08
Matt Arsenault
R600/SI: Replace LDS atomics with no return versions
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2014-08-29
Matt Arsenault
R600/SI: Use mad for fsub + fmul
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2014-08-27
Alexey Samsonov
Use BitVector instead of int in R600 SIISelLowering.
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2014-08-22
Tom Stellard
R600/SI: Wrap local memory pointer in AssertZExt on SI
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2014-08-21
Tom Stellard
R600/SI: Make sure SCRATCH_WAVE_OFFSET is added as...
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2014-08-18
Aaron Ballman
Silencing an MSVC warning about loop variable conflicti...
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2014-08-15
Matt Arsenault
R600/SI: Move all fabs / fneg handling to patterns
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2014-08-15
Matt Arsenault
R600/SI: Use source modifiers for f64 fneg
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2014-08-15
Matt Arsenault
R600/SI: Use source modifier for f64 fabs
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2014-08-15
Matt Arsenault
R600/SI: Fix offset folding in some cases with shifted...
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2014-08-15
Matt Arsenault
R600/SI: Implement isLegalAddressingMode
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2014-08-09
Tom Stellard
R600/SI: Custom lower CONCAT_VECTORS
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2014-08-06
Eric Christopher
Remove the target machine from CCState. Previously...
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2014-08-04
Eric Christopher
Remove the TargetMachine forwards for TargetSubtargetIn...
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2014-08-02
Matt Arsenault
R600/SI: Fix formatting.
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2014-08-01
Chandler Carruth
[SDAG] MorphNodeTo recursively deletes dead operands...
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2014-08-01
Tom Stellard
R600/SI: Do abs/neg folding with ComplexPatterns
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2014-07-28
Matt Arsenault
R600/SI: Implement getOptimalMemOpType
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2014-07-28
Matt Arsenault
R600/SI: Make argument loads invariant
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2014-07-27
Matt Arsenault
Add alignment value to allowsUnalignedMemoryAccess
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2014-07-26
Matt Arsenault
R600: Move intrinsic lowering to separate functions
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2014-07-24
Matt Arsenault
R600: Add new functions for splitting vector loads...
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2014-07-21
Tom Stellard
R600/SI: Clean up some of the unused REGISTER_{LOAD...
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2014-07-21
Tom Stellard
R600/SI: Use scratch memory for large private arrays
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2014-07-21
Tom Stellard
R600/SI: Store constant initializer data in constant...
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2014-07-20
NAKAMURA Takumi
SIISelLowering.cpp: Define _USE_MATH_DEFINES to let...
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2014-07-20
Matt Arsenault
R600/SI: Remove dead code and add missing tests.
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2014-07-19
Matt Arsenault
R600/SI: implement range reduction for sin/cos
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2014-07-15
Matt Arsenault
R600/SI: Allow using f32 rcp / rsq when denormals not...
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2014-07-15
Matt Arsenault
R600/SI: Fix select on i1
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2014-07-15
Matt Arsenault
R600/SI: Implement less wrong f32 fdiv
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2014-07-13
Matt Arsenault
R600: Make ShaderType private
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2014-07-10
Jan Vesely
R600: Implement float to long/ulong
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2014-07-07
Matt Arsenault
R600: Fix mishandling of load / store chains.
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2014-07-03
Chandler Carruth
[codegen,aarch64] Add a target hook to the code generat...
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2014-07-02
Tom Stellard
R600: Promote i64 loads to v2i32
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2014-06-24
Tom Stellard
R600: Promote i64 stores to v2i32
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2014-06-23
Matt Arsenault
R600: Move more out of AMDILISelLowering
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2014-06-23
Matt Arsenault
R600/SI: Handle i64 sub.
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2014-06-23
Matt Arsenault
R600: Rename AMDIL file
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2014-06-18
Matt Arsenault
R600/SI: Prettier operand printing for 64-bit ops.
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2014-06-18
Matt Arsenault
R600/SI: Temporary fix for f64 fneg
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2014-06-11
Matt Arsenault
R600/SI: Use v_cvt_f32_ubyte* instructions
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2014-06-10
Matt Arsenault
R600: Use BCNT_INT for evergreen
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2014-06-10
Matt Arsenault
R600/SI: Implement i64 ctpop
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2014-06-10
Matt Arsenault
R600/SI: Use bcnt instruction for ctpop
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2014-06-10
Matt Arsenault
R600/SI: Handle sign_extend and zero_extend to i64...
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2014-06-10
Tom Stellard
SelectionDAG: Expand SELECT_CC to SELECT + SETCC
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2014-06-05
Matt Arsenault
Use nullptr
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2014-06-03
Matt Arsenault
Fix typos
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2014-05-22
Matt Arsenault
R600: Add dag combine for BFE
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2014-05-16
Tom Stellard
R600/SI: Promote f32 SELECT to i32
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2014-05-15
Matt Arsenault
Use range for
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2014-05-15
Tom Stellard
R600/SI: Stop using VSrc_* as the default register...
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2014-05-10
Vincent Lejeune
R600/SI: Fold fabs/fneg into src input modifier
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2014-05-10
Vincent Lejeune
R600/SI: Prettier display of input modifiers
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2014-05-10
Vincent Lejeune
R600/SI: Use pseudo instruction for fabs/clamp/fneg
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2014-05-09
Tom Stellard
R600: Move MIN/MAX matching from LowerOperation() to...
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2014-04-30
Tom Stellard
R600/SI: Use VALU instructions for copying i1 values
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2014-04-29
Tom Stellard
R600/SI: Custom lower SI_IF and SI_ELSE to avoid machin...
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2014-04-29
Tom Stellard
R600: Change UDIV/UREM to UDIVREM when legalizing types
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2014-04-28
Craig Topper
Convert more SelectionDAG functions to use ArrayRef.
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2014-04-27
Craig Topper
Convert SelectionDAG::MorphNodeTo to use ArrayRef.
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2014-04-27
Craig Topper
Convert SelectionDAG::getMergeValues to use ArrayRef.
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2014-04-26
Craig Topper
Convert getMemIntrinsicNode to take ArrayRef of SDValue...
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2014-04-26
Craig Topper
Convert SelectionDAG::getNode methods to use ArrayRef...
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2014-04-25
Craig Topper
[C++] Use 'nullptr'. Target edition.
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2014-04-24
Matt Arsenault
R600/SI: Use address space in allowsUnalignedMemoryAccesses
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2014-04-22
Matt Arsenault
R600: Make sign_extend_inreg legal.
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2014-04-18
Matt Arsenault
R600/SI: Match sign_extend_inreg to s_sext_i32_i8 and...
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2014-04-17
Tom Stellard
R600/SI: Stop using i128 as the resource descriptor...
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2014-04-17
Tom Stellard
R600/SI: Change default register class for i32 to SReg_32
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2014-04-17
Matt Arsenault
R600/SI: f64 frint is legal on CI
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2014-04-17
Matt Arsenault
R600/SI: Fix zext from i1 to i64
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2014-04-16
Craig Topper
Convert SelectionDAG::getVTList to use ArrayRef
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2014-04-16
Matt Arsenault
R600: Expand sign extension of vectors.
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2014-04-15
Matt Arsenault
R600/SI: Fix loads of i1
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2014-04-11
Matt Arsenault
R600: Check if a sextload should be used for parameter...
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2014-04-07
Tom Stellard
R600: Match 24-bit arithmetic patterns in a Target...
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2014-04-07
Matt Arsenault
Use std::swap
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2014-04-03
Tom Stellard
R600/SI: Lower 64-bit immediates using REG_SEQUENCE
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2014-03-31
Matt Arsenault
Change shouldSplitVectorElementType to better match...
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2014-03-31
Matt Arsenault
R600/SI: Implement shouldConvertConstantLoadToIntImm
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2014-03-31
Tom Stellard
R600/SI: Lower i64 SELECT by bitcasting to a vector...
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2014-03-24
Matt Arsenault
R600/SI: Fix 64-bit private loads.
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2014-03-24
Tom Stellard
R600/SI: Promote fp64 SELECT to i64
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2014-03-21
Tom Stellard
R600/SI: Handle MUBUF instructions in SIInstrInfo:...
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2014-03-21
Tom Stellard
R600/SI: Use SGPR_(32|64) reg clases when lowering...
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