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Use cast<> for unchecked use
[oota-llvm.git]
/
lib
/
Target
/
R600
/
SIISelLowering.cpp
2014-05-10
Vincent Lejeune
R600/SI: Fold fabs/fneg into src input modifier
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2014-05-10
Vincent Lejeune
R600/SI: Prettier display of input modifiers
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2014-05-10
Vincent Lejeune
R600/SI: Use pseudo instruction for fabs/clamp/fneg
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2014-05-09
Tom Stellard
R600: Move MIN/MAX matching from LowerOperation() to...
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2014-04-30
Tom Stellard
R600/SI: Use VALU instructions for copying i1 values
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2014-04-29
Tom Stellard
R600/SI: Custom lower SI_IF and SI_ELSE to avoid machin...
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2014-04-29
Tom Stellard
R600: Change UDIV/UREM to UDIVREM when legalizing types
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2014-04-28
Craig Topper
Convert more SelectionDAG functions to use ArrayRef.
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2014-04-27
Craig Topper
Convert SelectionDAG::MorphNodeTo to use ArrayRef.
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2014-04-27
Craig Topper
Convert SelectionDAG::getMergeValues to use ArrayRef.
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2014-04-26
Craig Topper
Convert getMemIntrinsicNode to take ArrayRef of SDValue...
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2014-04-26
Craig Topper
Convert SelectionDAG::getNode methods to use ArrayRef...
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2014-04-25
Craig Topper
[C++] Use 'nullptr'. Target edition.
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2014-04-24
Matt Arsenault
R600/SI: Use address space in allowsUnalignedMemoryAccesses
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2014-04-22
Matt Arsenault
R600: Make sign_extend_inreg legal.
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2014-04-18
Matt Arsenault
R600/SI: Match sign_extend_inreg to s_sext_i32_i8 and...
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2014-04-17
Tom Stellard
R600/SI: Stop using i128 as the resource descriptor...
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2014-04-17
Tom Stellard
R600/SI: Change default register class for i32 to SReg_32
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2014-04-17
Matt Arsenault
R600/SI: f64 frint is legal on CI
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2014-04-17
Matt Arsenault
R600/SI: Fix zext from i1 to i64
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2014-04-16
Craig Topper
Convert SelectionDAG::getVTList to use ArrayRef
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2014-04-16
Matt Arsenault
R600: Expand sign extension of vectors.
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2014-04-15
Matt Arsenault
R600/SI: Fix loads of i1
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2014-04-11
Matt Arsenault
R600: Check if a sextload should be used for parameter...
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2014-04-07
Tom Stellard
R600: Match 24-bit arithmetic patterns in a Target...
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2014-04-07
Matt Arsenault
Use std::swap
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2014-04-03
Tom Stellard
R600/SI: Lower 64-bit immediates using REG_SEQUENCE
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2014-03-31
Matt Arsenault
Change shouldSplitVectorElementType to better match...
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2014-03-31
Matt Arsenault
R600/SI: Implement shouldConvertConstantLoadToIntImm
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2014-03-31
Tom Stellard
R600/SI: Lower i64 SELECT by bitcasting to a vector...
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2014-03-24
Matt Arsenault
R600/SI: Fix 64-bit private loads.
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2014-03-24
Tom Stellard
R600/SI: Promote fp64 SELECT to i64
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2014-03-21
Tom Stellard
R600/SI: Handle MUBUF instructions in SIInstrInfo:...
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2014-03-21
Tom Stellard
R600/SI: Use SGPR_(32|64) reg clases when lowering...
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2014-03-07
Tom Stellard
R600/SI: Custom lower i1 stores
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2014-03-06
Matt Arsenault
R600: Fix extloads from i8 / i16 to i64.
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2014-02-28
Tom Stellard
R600/SI: Expand all v16[if]32 operations
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2014-02-25
Tom Stellard
R600/SI: Custom select 64-bit ADD
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2014-02-24
Matt Arsenault
Fix unused variable
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2014-02-24
Matt Arsenault
R600/SI - Add new CI arithmetic instructions.
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2014-02-13
Tom Stellard
R600/SI: Expand all v8[if]32 operations
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2014-02-13
Tom Stellard
R600/SI: Split global vector loads with more than 4...
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2014-02-05
Matt Arsenault
Add address space argument to allowsUnalignedMemoryAccess.
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2014-02-04
Tom Stellard
R600/SI: Custom lower i64 ISD::SELECT
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2014-01-24
Alp Toker
Fix known typos
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2014-01-22
Tom Stellard
R600: Add support for global addresses with constant...
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2014-01-22
Tom Stellard
R600/SI: Add support for i8 and i16 private loads/stores
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2013-12-19
Matt Arsenault
R600/SI: Make private pointers be 32-bit.
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2013-11-22
Tom Stellard
R600/SI: Fixing handling of condition codes
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2013-11-18
Matt Arsenault
R600/SI: Implement add i64, but do not yet enable.
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2013-11-18
Matt Arsenault
R600/SI: addc / adde i32 are legal
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2013-11-13
Tom Stellard
R600/SI: Add support for private address space load...
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2013-10-23
Tom Stellard
R600/SI: Replace ffs(x) - 1 with countTrailingZeros(x)
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2013-10-23
Tom Stellard
R600/SI: fix MIMG writemask adjustement
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2013-10-23
Tom Stellard
R600: Fix handling of vector kernel arguments
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2013-10-15
Vincent Lejeune
R600/SI: Remove some leftover MI dump call
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2013-10-13
Vincent Lejeune
R600/SI: Support byval arguments
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2013-10-10
Matt Arsenault
Fix typo
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2013-10-10
Tom Stellard
R600/SI: Define a separate MIMG instruction for each...
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2013-09-12
Tom Stellard
R600/SI: expose TBUFFER_STORE_FORMAT_* for OpenGL trans...
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2013-09-05
Matt Arsenault
R600: Fix i64 to i32 trunc on SI
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2013-08-26
Tom Stellard
R600: Add support for vector local memory loads
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2013-08-26
Tom Stellard
SelectionDAG: Use correct pointer size when lowering...
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2013-08-16
Benjamin Kramer
R600: Allocate memoperand in the MachienFunction so...
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2013-08-14
Tom Stellard
R600/SI: Improve legalization of vector operations
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2013-08-14
Tom Stellard
R600/SI: Replace v1i32 type with i32 in imageload and...
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2013-08-14
Tom Stellard
R600/SI: Convert v16i8 resource descriptors to i128
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2013-08-14
Tom Stellard
R600/SI: Assign a register class to the $vaddr operand...
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2013-08-10
Niels Ole Salscheider
R600/SI: FMA is faster than fmul and fadd for f64
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2013-08-08
Niels Ole Salscheider
R600/SI: Implement fp32<->fp64 conversions
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2013-08-06
Tom Stellard
R600/SI: Use VSrc_* register classes as the default...
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2013-08-06
Tom Stellard
R600/SI: Add more special cases for opcodes to ensureSR...
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2013-08-01
Tom Stellard
R600/SI: Custom lower i64 ZERO_EXTEND
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2013-07-23
Tom Stellard
R600: Improve support for < 32-bit loads
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2013-07-18
Tom Stellard
R600/SI: Fix crash with VSELECT
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2013-07-15
Tom Stellard
R600/SI: Add support for 64-bit loads
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2013-07-12
Tom Stellard
R600/SI: Add double precision fsub pattern for SI
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2013-07-12
Tom Stellard
R600/SI: Add initial double precision support for SI
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2013-07-10
Michel Danzer
R600/SI: Initial local memory support
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2013-06-25
Aaron Watry
R600: Consolidate expansion of v2i32/v4i32 ops for...
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2013-06-25
Aaron Watry
R600/SI: Expand xor v2i32/v4i32
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2013-06-25
Aaron Watry
R600/SI: Expand urem of v2i32/v4i32 for SI
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2013-06-25
Aaron Watry
R600/SI: Expand udiv v[24]i32 for SI and v2i32 for EG
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2013-06-25
Aaron Watry
R600/SI: Expand ashr of v2i32/v4i32 for SI
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2013-06-25
Aaron Watry
R600/SI: Expand srl of v2i32/v4i32 for SI
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2013-06-25
Aaron Watry
R600/SI: Expand shl of v2i32/v4i32 for SI
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2013-06-25
Aaron Watry
R600/SI: Expand or of v2i32/v4i32 for SI
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2013-06-25
Aaron Watry
R600/SI: Expand mul of v2i32/v4i32 for SI
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2013-06-25
Aaron Watry
R600/SI: Expand and of v2i32/v4i32 for SI
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2013-06-25
Tom Stellard
R600/SI: Report unaligned memory accesses as legal...
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2013-06-20
Tom Stellard
R600/SI: Expand sub for v2i32 and v4i32 for SI
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2013-06-20
Tom Stellard
R600/SI: Expand add for v2i32 and v4i32
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2013-06-07
Tom Stellard
R600: Rework subtarget info and remove AMDILDevice...
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2013-06-07
Bill Wendling
Don't cache the instruction and register info from...
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2013-06-05
Tom Stellard
R600: Replace predicate loop with predicate function
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2013-06-03
Tom Stellard
R600/SI: Add support for work item and work group intri...
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2013-06-03
Tom Stellard
R600/SI: Add a calling convention for compute shaders
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2013-06-03
Tom Stellard
R600/SI: Custom lower i64 sign_extend
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2013-06-03
Tom Stellard
R600/SI: Adjust some instructions' out register class...
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2013-06-03
Tom Stellard
R600/SI: Handle REG_SEQUENCE in fitsRegClass()
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