AArch64: remove unnecessary pseudo-instruction.
[oota-llvm.git] / lib / Target / R600 /
2014-06-12 Matt ArsenaultR600/SI: Use a register set to -1 for data0 on ds_inc...
2014-06-11 Tom StellardR600: Set correct InstrItinClass for instructions using...
2014-06-11 Tom StellardR600: BCNT_INT is a vector only instruction
2014-06-11 Matt ArsenaultR600/SI: Fix bitcast between v2i32 and f64
2014-06-11 Matt ArsenaultR600/SI: Update place using old subtarget predicate
2014-06-11 Matt ArsenaultR600/SI: Add common 64-bit LDS atomics
2014-06-11 Matt ArsenaultR600/SI: Add instruction definitions for 64-bit LDS...
2014-06-11 Matt ArsenaultR600/SI: Add 32-bit LDS atomic cmpxchg
2014-06-11 Matt ArsenaultR600/SI: Use LDS atomic inc / dec
2014-06-11 Matt ArsenaultR600/SI: Add other LDS atomic operations
2014-06-11 Matt ArsenaultR600/SI: Add instruction definitions for more LDS ops
2014-06-11 Matt ArsenaultR600/SI: Fix backwards names for local atomic instructions.
2014-06-11 Matt ArsenaultR600/SI: Refactor local atomics.
2014-06-11 Matt ArsenaultR600/SI: Use v_cvt_f32_ubyte* instructions
2014-06-11 Matt ArsenaultR600/SI: Fix selection failure on scalar_to_vector
2014-06-11 Rafael EspindolaTry to fix the msvc build.
2014-06-11 Matt ArsenaultUse cast instead of assert + dyn_cast
2014-06-11 Matt ArsenaultR600: Add helper functions.
2014-06-10 Tom StellardR600/SI: Emit an error when attempting to spill VGPRs v4
2014-06-10 Tom StellardR600/SI: Fix a crash when spilling SGPRs
2014-06-10 Matt ArsenaultR600: Use BCNT_INT for evergreen
2014-06-10 Matt ArsenaultR600/SI: Implement i64 ctpop
2014-06-10 Matt ArsenaultR600/SI: Use bcnt instruction for ctpop
2014-06-10 Matt ArsenaultR600: Handle fcopysign
2014-06-10 Matt ArsenaultR600/SI: Handle sign_extend and zero_extend to i64...
2014-06-10 Tom StellardSelectionDAG: Expand SELECT_CC to SELECT + SETCC
2014-06-09 Matt ArsenaultR600/SI: Rename VOP3 helper class to be more general
2014-06-09 Matt ArsenaultR600/SI: Keep 64-bit not on SALU
2014-06-09 Matt ArsenaultR600: Fix selection failure for vector bswap
2014-06-05 Matt ArsenaultR600/SI: Match rsq instructions
2014-06-05 Matt ArsenaultUse nullptr
2014-06-03 Matt ArsenaultFix typos
2014-06-01 Matt ArsenaultR600: Set all float vector expands in the same place
2014-05-31 Matt ArsenaultR600/SI: Remove redundant patterns
2014-05-31 Matt ArsenaultR600/SI: Fix [s|u]int_to_fp for i1
2014-05-29 Matt ArsenaultR600/SI: Fix pattern variable names.
2014-05-22 Matt ArsenaultR600: Add definition for flat address space ID.
2014-05-22 Matt ArsenaultR600: Try to convert BFE back to standard bit ops when...
2014-05-22 Matt ArsenaultR600: Add dag combine for BFE
2014-05-22 Matt ArsenaultR600: Implement ComputeNumSignBitsForTargetNode for BFE
2014-05-22 Matt ArsenaultR600: Implement computeMaskedBitsForTargetNode for BFE
2014-05-22 Matt ArsenaultR600: Expand mul24 for GPUs without it
2014-05-22 Matt ArsenaultR600: Expand mad24 for GPUs without it
2014-05-22 Matt ArsenaultR600: Add intrinsics for mad24
2014-05-22 Matt ArsenaultR600/SI: Move instruction pattern to instruction definition
2014-05-22 Matt ArsenaultR600/SI: Match fp_to_uint / uint_to_fp for f64
2014-05-21 Matt ArsenaultR600: Add comment describing problems with LowerConstan...
2014-05-21 Matt ArsenaultR600: Partially fix constant initializers for structs...
2014-05-21 Matt ArsenaultUse cast<> instead of unchecked dyn_cast
2014-05-19 Matt ArsenaultRemove unused method declaration
2014-05-19 Aaron BallmanResolving MSVC warnings about switch statements with...
2014-05-16 Tom StellardR600/SI: Refactor the VOP3_32 tablegen class
2014-05-16 Tom StellardR600/SI: Add a PredicateControl class for managing...
2014-05-16 Tom StellardR600/SI: Move tablegen patterns away from instruction...
2014-05-16 Tom StellardR600/SI: Remove unused instruction
2014-05-16 Tom StellardR600/SI: Promote f32 SELECT to i32
2014-05-16 Tom StellardR600/SI: Remove duplicate pattern
2014-05-15 Matt ArsenaultUse range for
2014-05-15 Tom StellardR600/SI: Stop using VSrc_* as the default register...
2014-05-15 Tom StellardR600/SI: Fix a bug with handling of INSERT_SUBREG in...
2014-05-15 Tom StellardR600/SI: Only use SALU instructions for 64-bit add...
2014-05-15 Tom StellardR600/SI: Use VALU instructions for i1 ops
2014-05-14 Jay FoadRename ComputeMaskedBits to computeKnownBits. "Masked...
2014-05-13 Matt ArsenaultR600/SI: Try to fix BFE operands when moving to VALU
2014-05-12 Matt ArsenaultUse cast<> for unchecked use
2014-05-12 Matt ArsenaultUse cast<> for unchecked use
2014-05-12 Matt ArsenaultUse range for
2014-05-12 Matt ArsenaultR600: Add mul24 intrinsics
2014-05-11 Matt ArsenaultFix return before else
2014-05-10 Vincent LejeuneR600/SI: Fold fabs/fneg into src input modifier
2014-05-10 Vincent LejeuneR600/SI: Prettier display of input modifiers
2014-05-10 Vincent LejeuneR600/SI: Use pseudo instruction for fabs/clamp/fneg
2014-05-09 Tom StellardR600/SI: Teach SIInstrInfo::moveToVALU() how to move...
2014-05-09 Tom StellardR600/SI: Fix SMRD pattern for offsets > 32 bits
2014-05-09 Tom StellardR600: Expand i64 SELECT_CC
2014-05-09 Tom StellardR600: Move MIN/MAX matching from LowerOperation() to...
2014-05-08 Matt ArsenaultR600: Promote f64 vector load/stores to i64 for consistency
2014-05-05 Tom StellardR600: Expand i64 ISD:SUB
2014-05-05 Marek OlsakR600/SI: allow 5 more input SGPRs to a shader
2014-05-02 Tom StellardR600/SI: Add processor type for Mullins.
2014-05-02 Tom StellardR600: Expand vector sin and cos.
2014-05-02 Tom StellardR600: Expand TruncStore i64 -> {i16,i8}
2014-05-02 Tom StellardR600/SI: Only create one instruction when spilling...
2014-05-01 Matt ArsenaultR600/SI: Fix verifier error with pseudo store instructions.
2014-04-30 Tom StellardR600/SI: Use VALU instructions for copying i1 values
2014-04-30 Tom StellardR600/SI: Teach moveToVALU how to handle some SMRD instr...
2014-04-30 Tom StellardR600: Remove unused function AMDGPUSubtarget::getDefaul...
2014-04-30 Craig TopperUse makeArrayRef insted of calling ArrayRef<T> construc...
2014-04-30 Craig TopperDe-virtualize or remove some methods that have no overr...
2014-04-29 Tom StellardR600: Remove duplicate setting of SELECT expansion.
2014-04-29 Tom StellardR600/SI: Custom lower SI_IF and SI_ELSE to avoid machin...
2014-04-29 Tom StellardR600/SI: Only select SALU instructions in the entry...
2014-04-29 Tom StellardR600: optimize the UDIVREM 64 algorithm
2014-04-29 Tom StellardR600: Implement iterative algorithm for udivrem
2014-04-29 Tom StellardR600: Change UDIV/UREM to UDIVREM when legalizing types
2014-04-29 Tom StellardR600: remove unused variable
2014-04-29 Craig Topper[C++11] Add 'override' keywords and remove 'virtual...
2014-04-28 Craig TopperConvert more SelectionDAG functions to use ArrayRef.
2014-04-28 Craig Topper[C++] Use 'nullptr'.
2014-04-27 Craig TopperConvert SelectionDAG::MorphNodeTo to use ArrayRef.
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