Hexagon: Honor __builtin_expect by using branch probabilities.
[oota-llvm.git] / lib / Target / R600 /
2013-05-02 Tom StellardR600: Use new tablegen syntax for patterns
2013-05-02 Tom StellardR600/SI: remove nonsense select pattern
2013-04-30 Vincent LejeuneR600: Always use texture cache for compute shaders
2013-04-30 Vincent LejeuneR600: use native for alu
2013-04-30 Vincent LejeuneR600: Packetize instructions
2013-04-30 Vincent LejeuneR600: Rework Scheduling to handle difference between...
2013-04-30 Vincent LejeuneR600: Add a Bank Swizzle operand
2013-04-30 Vincent LejeuneR600: Take inner dependency into tex/vtx clauses
2013-04-30 Vincent LejeuneR600: Turn TEX/VTX into native instructions
2013-04-30 Vincent LejeuneR600: Add FetchInst bit to instruction defs to denote...
2013-04-30 Vincent LejeuneR600: Add some new processor variants
2013-04-30 Vincent LejeuneR600: Clean up instruction class definitions
2013-04-30 Vincent LejeuneR600: config section now reports use of killgt
2013-04-29 Tom StellardR600: Use correct CF_END instruction on Northern Island...
2013-04-29 Tom StellardR600: Fix encoding of CF_END_{EG, R600} instructions
2013-04-26 Tom StellardR600: Initialize AMDGPUMachineFunction::ShaderType...
2013-04-24 Tom StellardR600: Initialize BooleanVectorContents
2013-04-24 Tom StellardR600: Use SHT_PROGBITS for the .AMDGPU.config section
2013-04-23 Vincent LejeuneR600: Use .AMDGPU.config section to emit stacksize
2013-04-23 Vincent LejeuneR600: Add CF_END
2013-04-22 Matt ArsenaultRemove unused DwarfSectionOffsetDirective string
2013-04-19 Michael LiaoArrayRefize getMachineNode(). No functionality change.
2013-04-19 Tom StellardR600: Add pattern for the BFI_INT instruction
2013-04-19 Tom StellardR600/SI: Use InstFlag for VOP3 modifier operands
2013-04-17 Vincent LejeuneR600: Make Export Instruction not duplicable
2013-04-17 Vincent LejeuneR600: Export is emitted as a CF_NATIVE inst
2013-04-17 Vincent LejeuneR600: Emit used GPRs count
2013-04-15 Tom StellardR600/SI: Emit config values in register value pairs.
2013-04-15 Tom StellardR600/SI: Emit configuration value in the .AMDGPU.config...
2013-04-15 Tom StellardR600: Emit ELF formatted code rather than raw ISA.
2013-04-11 NAKAMURA TakumiR600ControlFlowFinalizer.cpp: Fix a warning. [-Wunused...
2013-04-11 NAKAMURA TakumiWhitespace.
2013-04-10 Michel DanzerR600/SI: Add pattern for AMDGPUurecip
2013-04-10 Vincent LejeuneR600: Add VTX_READ_* and RAT_WRITE_CACHELESS_* when...
2013-04-10 Christian KonigR600/SI: dynamical figure out the reg class of MIMG
2013-04-10 Christian KonigR600/SI: adjust writemask to only the used components
2013-04-10 Christian KonigR600/SI: remove image sample writemask
2013-04-08 Vincent LejeuneR600: Control Flow support for pre EG gen
2013-04-05 Tom StellardR600/SI: Add support for buffer stores v2
2013-04-05 Tom StellardR600/SI: Use same names for corresponding MUBUF operand...
2013-04-05 Tom StellardR600: Add RV670 processor
2013-04-05 Tom StellardR600/SI: Add processor types for each SI variant
2013-04-05 Tom StellardR600/SI: Avoid generating S_MOVs with 64-bit immediates v2
2013-04-04 Vincent LejeuneR600: Use a mask for offsets when encoding instructions
2013-04-04 Vincent LejeuneR600: Fix wrong address when substituting ENDIF
2013-04-04 Vincent LejeuneR600: Take export into account when computing cf address
2013-04-03 Vincent LejeuneR600: Fix last ALU of a clause being emitted in a separ...
2013-04-03 Vincent LejeuneR600: Factorize maximum alu per clause in a single...
2013-04-03 Vincent LejeuneR600: Simplify data structure and add DEBUG to R600Cont...
2013-04-03 Vincent LejeuneR600: Consider KILLGT as an ALU instruction
2013-04-01 NAKAMURA TakumiTarget/R600: Fix CMake build to add missing files.
2013-04-01 Vincent LejeuneR600: Add support for native control flow
2013-04-01 Vincent LejeuneR600/SI: Share code recording ShaderTypeAttribute betwe...
2013-04-01 Vincent LejeuneR600: Emit CF_ALU and use true kcache register.
2013-03-31 Vincent LejeuneR600: Emit native instructions for tex
2013-03-28 Eric ChristopherThese two are default in the constructor for MCAsmInfo.
2013-03-27 Christian KonigR600/SI: add SETO/SETUO patterns
2013-03-27 Christian KonigR600/SI: add cummuting of rev instructions
2013-03-27 Christian KonigR600/SI: add mulhu/mulhs patterns
2013-03-27 Christian KonigR600/SI: add srl/sha patterns for SI
2013-03-26 NAKAMURA TakumiR600/SIMCCodeEmitter.cpp: Prune a couple of unused...
2013-03-26 Christian KonigR600/SI: improve post ISel folding
2013-03-26 Christian KonigR600/SI: improve vector interpolation
2013-03-26 Christian KonigR600/SI: avoid unecessary subreg extraction in IMAGE_SAMPLE
2013-03-26 Christian KonigR600/SI: switch back to RegPressure scheduling
2013-03-26 Christian KonigR600/SI: mark most intrinsics as readnone v2
2013-03-26 Christian KonigR600/SI: replace WQM intrinsic
2013-03-26 Christian KonigR600/SI: fix ELSE pseudo op handling
2013-03-26 Christian KonigR600: fix DenseMap with pointer key iteration in the...
2013-03-22 Michel DanzerR600: Use legacy (0 * anything = 0) MUL instructions...
2013-03-18 Christian KonigR600/SI: implement indirect adressing for SI
2013-03-18 Christian KonigR600/SI: add float vector types
2013-03-18 Christian KonigR600/SI: add shl pattern
2013-03-18 Christian KonigR600/SI: add BUFFER_LOAD_DWORD pattern
2013-03-18 Christian KonigR600/SI: implement SI.load.const intrinsic
2013-03-18 Christian KonigR600/SI: enable all S_LOAD and S_BUFFER_LOAD opcodes
2013-03-18 Christian KonigR600/SI: fix inserting waits for all defines
2013-03-14 Vincent LejeuneR600: Factorize code handling Const Read Port limitation
2013-03-13 Vincent LejeuneR600: Remove unused Outputs variable
2013-03-11 Vincent LejeuneR600: Fix JUMP handling so that MachineInstr verificati...
2013-03-11 NAKAMURA TakumiR600MachineScheduler.cpp: Fix use cases of dbgs()....
2013-03-08 Tom StellardR600: Optimize another selectcc case
2013-03-08 Tom StellardR600: Improve custom lowering of select_cc
2013-03-08 Tom StellardR600: Change operation action from Custom to Expand...
2013-03-08 Tom StellardR600: Change operation action from Custom to Expand...
2013-03-08 Tom StellardR600: Set BooleanContents to ZeroOrNegativeOneBooleanCo...
2013-03-08 Michel DanzerR600/SI: Use source scheduler
2013-03-07 Christian KonigR600/SI: rework input interpolation v2
2013-03-07 Christian KonigR600/SI: remove SI_vs_load_buffer_index
2013-03-07 Christian KonigR600/SI: remove SGPR address space v2
2013-03-07 Christian KonigR600/SI: add proper formal parameter handling for SI
2013-03-07 Christian KonigR600/SI: remove shader type intrinsic
2013-03-07 Christian KonigR600/SI: switch types of SGPRs to v*i8
2013-03-07 Christian KonigR600/SI: fix unused variable warning
2013-03-05 Vincent LejeuneR600: Do not predicate vector op
2013-03-05 Benjamin KramerUpdate cmake build.
2013-03-05 Vincent LejeuneR600: initial scheduler code
2013-03-05 Vincent LejeuneR600: Remove LowerConstCopyPass and lower CONST_COPY...
2013-03-05 Vincent LejeuneR600: Turn BUILD_VECTOR into Reg_Sequence
2013-03-05 Vincent LejeuneR600: CONST_ADDRESS node is not marked as mayLoad anymore
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