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[X86] Add support for printing shuffle comments for AVX512 PSHUFB instructions.
[oota-llvm.git]
/
lib
/
Target
/
X86
/
X86.td
2015-12-15
Asaf Badouh
[x86] adding PKU feature flag
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2015-12-04
Hans Wennborg
Add FeatureLAHFSAHF to amdfam10 as well.
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2015-12-04
Hans Wennborg
X86: Don't emit SAHF/LAHF for 64-bit targets unless...
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2015-11-14
Eric Christopher
Add MMX to the 3dnow enum and propagate changes around...
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2015-10-16
Craig Topper
[X86] Add fxsr feature flag for fxsave/fxrestore instru...
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2015-10-15
Craig Topper
Add XSAVE/XSAVEOPT to KNL processor.
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2015-10-14
Craig Topper
[X86] Add XSAVE feature flags to their various processors.
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2015-10-12
Sanjay Patel
fix capitalization; NFC
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2015-10-12
Amjad Aboud
[X86] Add XSAVE intrinsic family
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2015-10-08
Eric Christopher
Move the MMX subtarget feature out of the SSE set of...
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2015-09-01
Sanjay Patel
rename "slow-unaligned-mem-under-32" to slow-unaligned...
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2015-08-21
Sanjay Patel
remove 'FeatureSlowUAMem' from AMD CPUs based on 10H...
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2015-08-21
Sanjay Patel
[x86] invert logic for attribute 'FeatureFastUAMem'
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2015-08-08
Craig Topper
[X86] Add ADX and RDSEED to Skylake processor.
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2015-08-08
Craig Topper
Add SlowBTMem to Sandy Bridge and newer Intel CPUs...
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2015-07-27
Sean Silva
Avoid using uncommon acronym "MSROM".
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2015-07-23
Michael Kuperstein
[X86] Allow load folding into PUSH instructions
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2015-06-04
Sanjay Patel
make reciprocal estimate code generation more flexible...
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2015-06-03
Elena Demikhovsky
X86: Added MPX feature and bound registers.
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2015-06-03
Rafael Espindola
Revert "make reciprocal estimate code generation more...
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2015-06-02
Sanjay Patel
make reciprocal estimate code generation more flexible...
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2015-05-23
Rafael Espindola
Revert "make reciprocal estimate code generation more...
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2015-05-22
Sanjay Patel
make reciprocal estimate code generation more flexible...
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2015-05-12
Eric Christopher
Migrate existing backends that care about software...
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2015-03-30
Craig Topper
[X86] Remove FeatureAES for 'corei7' CPU. 'corei7'...
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2015-02-05
Craig Topper
[X86] Remove two feature flags that covered sets of...
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2015-02-03
Sanjay Patel
Fix program crashes due to alignment exceptions generat...
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2014-12-16
Elena Demikhovsky
X86: Added FeatureVectorUAMem for all AVX architectures.
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2014-12-09
Chandler Carruth
[x86] Fix the test to actually test things for the...
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2014-12-09
Chandler Carruth
[x86] Bring some sanity to the x86 CPU processor defini...
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2014-12-04
Michael Liao
[X86] Clean up whitespace as well as minor coding style
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2014-11-28
Sanjay Patel
Enable FeatureFastUAMem for btver2
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2014-11-21
Sanjay Patel
Add a feature flag for slow 32-byte unaligned memory...
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2014-11-21
Alexey Volkov
[X86] For Silvermont CPU use 16-bit division instead...
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2014-11-17
Alexey Volkov
[X86] Use ADD/SUB instead of INC/DEC for Haswell and...
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2014-11-11
Sanjay Patel
Use rcpss/rcpps (X86) to speed up reciprocal calcs...
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2014-11-04
Andrea Di Biagio
[X86] Add 'FeatureSlowSHLD' to cpu 'bdver3'. Also expli...
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2014-10-24
Sanjay Patel
Use rsqrt (X86) to speed up reciprocal square root...
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2014-09-09
Sanjay Patel
Add a scheduling model for AMD 16H Jaguar (btver2).
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2014-08-21
Robert Khasanov
[x86] Enable Broadwell target.
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2014-07-31
Kevin Enderby
Add support for the X86 secure guard extensions instruc...
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2014-07-21
Robert Khasanov
[SKX] Enabling SKX target and AVX512BW, AVX512DQ, AVX51...
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2014-07-02
Elena Demikhovsky
AVX-512: dec/inc instructions are slow on KNL
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2014-06-09
Alexey Volkov
[X86] Use ADD/SUB instead of INC/DEC for Silvermont
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2014-05-20
Alexey Volkov
[X86] Tune LEA usage for Silvermont
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2014-05-07
Chandler Carruth
[x86] Make the 'x86-64' cpu, what I see as and many...
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2014-05-02
Benjamin Kramer
Add a description for AMD's bdver4 (aka Excavator).
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2014-03-07
Alexey Volkov
Enable FeatureFastUAMem for Silvermont processor
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2014-03-07
Alexey Volkov
Test commit
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2014-01-06
Craig Topper
[x86] Add basic support for .code16
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2013-12-02
Rafael Espindola
Change the default of AsmWriterClassName and isMCAsmWriter.
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2013-11-21
Ekaterina Romanova
SHLD/SHRD are VectorPath (microcode) instructions known...
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2013-11-04
Benjamin Kramer
X86: Add a description for AMD bdver3 aka Steamroller.
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2013-10-16
Yunzhong Gao
Enabling 3DNow! prefetch instruction for a few AMD...
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2013-10-05
Nick Lewycky
Rename this feature to "cx16" to match gcc's flag name...
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2013-09-24
Yunzhong Gao
Adding a feature flag to the llvm backend for x86 TBM...
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2013-09-17
Preston Gurd
Remove unused code, which had been commented out.
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2013-09-16
Craig Topper
Make F16C feature flag imply AVX rather than just check...
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2013-09-13
Preston Gurd
Adds support for Atom Silvermont (SLM) - -march=slm
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2013-09-12
Ben Langmuir
Partial support for Intel SHA Extensions (sha1rnds4)
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2013-08-30
Benjamin Kramer
X86: Add a description of the Intel Atom Silvermont...
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2013-08-23
Rafael Espindola
Rename features to match what gcc and clang use.
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2013-08-21
Craig Topper
Rename mattr names for AVX-512 to from avx-512 -> avx51...
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2013-07-28
Elena Demikhovsky
Added encoding prefixes for KNL instructions (EVEX).
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2013-07-24
Elena Demikhovsky
I'm starting to commit KNL backend. I'll push patches...
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2013-05-03
Benjamin Kramer
X86: Add target description for btver2; make autodetect...
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2013-04-25
Preston Gurd
This patch adds the X86FixupLEAs pass, which will reduc...
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2013-04-18
Chad Rosier
[asm parser] Add support for predicating MnemonicAlias...
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2013-03-28
Michael Liao
Add support of RDSEED defined in AVX2 extension
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2013-03-28
Nadav Rotem
Add the Haswell machine model.
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2013-03-27
Preston Gurd
For the current Atom processor, the fastest way to...
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2013-03-26
Michael Liao
Add HLE target feature
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2013-03-26
Jakob Stoklund Olesen
Enable SandyBridgeModel for all modern Intel P6 descend...
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2013-03-26
Michael Liao
Add PREFETCHW codegen support
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2013-02-14
Kay Tiong Khoo
added basic support for Intel ADX instructions
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2013-01-08
Preston Gurd
Pad Short Functions for Intel Atom
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2013-01-05
Nadav Rotem
Revert revision 171524. Original message:
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2013-01-04
Preston Gurd
The current Intel Atom microarchitecture has a feature...
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2012-12-15
Chandler Carruth
Make '-mtune=x86_64' assume fast unaligned memory accesses.
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2012-12-10
Chandler Carruth
Revert "Make '-mtune=x86_64' assume fast unaligned...
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2012-12-10
Chandler Carruth
Make '-mtune=x86_64' assume fast unaligned memory accesses.
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2012-12-10
Chandler Carruth
Address a FIXME and update the fast unaligned memory...
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2012-11-08
Michael Liao
Add support of RTM from TSX extension
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2012-10-25
Michael Liao
Atom has SIMD instruction set extension up to SSSE3
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2012-10-03
Craig Topper
Fix 80-column violation
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2012-09-12
Roman Divacky
Add support for AMD Geode.
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2012-09-04
Preston Gurd
Generic Bypass Slow Div
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2012-08-16
Anitha Boyapati
Patch to enable FMA on bdver2 target. Make XOP feature...
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2012-08-16
Anitha Boyapati
git-svn-id: https://llvm.org/svn/llvm-project/llvm...
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2012-07-07
Andrew Trick
I'm introducing a new machine model to simultaneously...
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2012-06-03
Craig Topper
Rename FMA3 feature flag to just FMA to match gcc so...
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2012-05-31
Benjamin Kramer
X86: Rename the CLMUL target feature to PCLMUL.
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2012-05-01
Craig Topper
Make XOP and FMA4 require SSE4A to match GCC behavior...
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2012-05-01
Craig Topper
Make XOP imply AVX as its needed to legalize the regist...
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2012-05-01
Craig Topper
Make CLMUL and AES imply SSE2 since its needed to legal...
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2012-05-01
Craig Topper
Enable AVX and FMA4 for AMD Bulldozer processors.
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2012-04-26
Craig Topper
Enable detection of AVX and AVX2 support through CPUID...
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2012-02-18
Jia Liu
Emacs-tag and some comment fix for all ARM, CellSPU...
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2012-02-07
Evan Cheng
Use LEA to adjust stack ptr for Atom. Patch by Andy...
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2012-02-01
Andrew Trick
Instruction scheduling itinerary for Intel Atom.
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