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[x86] lower calls to llvm.maxnum.v4f32 using maxps
[oota-llvm.git]
/
lib
/
Target
/
X86
/
X86InstrExtension.td
2015-02-03
Craig Topper
[X86] Add Requires[In64BitMode] around MOVSX64rr32...
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2014-11-26
Craig Topper
Replace neverHasSideEffects=1 with hasSideEffects=0...
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2014-11-03
Ahmed Bougacha
[X86] 8bit divrem: Improve codegen for AH register...
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2014-02-02
Craig Topper
Merge x86 HasOpSizePrefix/HasOpSize16Prefix into a...
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2014-01-08
David Woodhouse
[x86] Add OpSize16 to instructions that need it
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2013-09-13
Preston Gurd
Adds support for Atom Silvermont (SLM) - -march=slm
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2013-05-30
Tim Northover
X86: change zext moves to use sub-register infrastructure.
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2013-03-26
Jakob Stoklund Olesen
Annotate the remaining x86 instructions with SchedRW...
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2013-03-19
Jakob Stoklund Olesen
Annotate X86InstrExtension.td with SchedRW lists.
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2012-07-30
Craig Topper
Mark MOVZX16/MOVSX16 as neverHasSideEffects/mayLoad
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2012-07-30
Craig Topper
Mark MOVZX32_NOREX as isCodeGenOnly and neverHasSideEff...
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2012-02-29
Andrew Trick
Intel Atom instruction itineraries for mov sign extensi...
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2012-02-18
Jia Liu
Emacs-tag and some comment fix for all ARM, CellSPU...
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2011-10-07
Jakob Stoklund Olesen
Constrain both operands on MOVZX32_NOREXrr8.
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2011-05-20
Stuart Hastings
Re-commit 131641 with fixes; de-pseudoize MOVSX16rr8...
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2011-05-19
Stuart Hastings
Reverting 131641 to investigate 'bot complaint.
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2011-05-19
Stuart Hastings
Revise MOVSX16rr8/MOVZX16rr8 (and rm variants) to no...
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2010-11-01
Chris Lattner
make the asm matcher emitter reject instructions that...
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2010-10-31
Chris Lattner
two changes: make the asmmatcher generator ignore ARM...
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2010-10-05
Chris Lattner
add new file
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