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[AArch64] Generate vector signed/unsigned mul and mla/mls long.
[oota-llvm.git]
/
lib
/
Target
/
XCore
/
XCoreMachineFunctionInfo.cpp
2014-02-18
Robert Lytton
XCore target: Fix llvm.eh.return and EH info register...
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2014-01-06
Robert Lytton
XCore target: Refactor LR handling
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2013-12-02
Robert Lytton
XCore target: Make handling of large frames not depende...
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2012-02-18
Jia Liu
Emacs-tag and some comment fix for all ARM, CellSPU...
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2011-12-20
David Blaikie
Unweaken vtables as per llvm.org/docs/CodingStandards...
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