[AArch64] Convert a conditional check that will always be true to an assert. NFC.
[oota-llvm.git] / lib / Target /
2015-08-10 Chad Rosier[AArch64] Convert a conditional check that will always...
2015-08-10 Chad RosierTypo. Move comment closer to relevant code. NFC.
2015-08-10 Sanjay Patelfix minsize detection: minsize attribute implies optimi...
2015-08-10 Sanjay Patelfix minsize detection: minsize attribute implies optimi...
2015-08-10 Sanjay Patelfix minsize detection: minsize attribute implies optimi...
2015-08-10 Sanjay Patelfix minsize detection: minsize attribute implies optimi...
2015-08-10 Marina YatsinaTest commit to verify commit access
2015-08-09 Saleem AbdulrasoolX86: remove a dead store (NFC)
2015-08-08 Sanjay Patel[x86] enable machine combiner reassociations for 128...
2015-08-08 Benjamin KramerFix some comment typos.
2015-08-08 Craig Topper[X86] Add ADX and RDSEED to Skylake processor.
2015-08-08 Craig TopperAdd SlowBTMem to Sandy Bridge and newer Intel CPUs...
2015-08-08 Tom StellardAMDGPU/SI: Another attempt to fix Windows bots broken...
2015-08-08 Matt ArsenaultRemove unnecessary includes
2015-08-08 Matt ArsenaultAMDGPU: Implement AMDGPUOperand::print()
2015-08-08 Matt ArsenaultAMDGPU/SI: Remove VCCReg
2015-08-08 Matt ArsenaultAMDGPU/SI: Remove source uses of VCCReg
2015-08-08 Tom StellardAMDGPU/SI: Attempt to fix Windows bots broken by r244372
2015-08-07 Tom StellardAMDGPU: Add pass to lower OpenCL image and sampler...
2015-08-07 Quentin Colombet[AArch64][LoadStoreOptimizer] Turn a test into an asser...
2015-08-07 Tom StellardAMDGPU/SI: Use InstAlias instead of MnemonicAlias for...
2015-08-07 Matt ArsenaultAMDGPU: Assume SMRD access for constant address space
2015-08-07 Chad Rosier[ARM] Remove an unused reference to MachineRegisterInfo...
2015-08-07 Tom StellardAMDGPU/SI: Use correct encoding of vopc for VI in the...
2015-08-07 Tom StellardAMDGPU/SI: v_mac_legacy_f32 does not exist on VI
2015-08-07 Tom StellardAMDGPU/SI: Remove unused outs parameter from VOPC Table...
2015-08-07 Silviu BarangaFix unused variable warning introduced in r244314
2015-08-07 Silviu Baranga[ARM] Update ReconstructShuffle to handle mismatched...
2015-08-07 JF BastienWebAssembly: textual emission uses expected opcode...
2015-08-06 Juergen Ributzka[AArch64][FastISel] Always use AND before checking...
2015-08-06 Juergen RibutzkaRevert "[AArch64][FastISel] Add more truncation tests...
2015-08-06 Pete CooperConvert a bunch of loops to foreach. NFC.
2015-08-06 Tom StellardAMDGPU/SI: Add Fiji support
2015-08-06 Tom StellardAMDGPU/SI: Add support for 32-bit immediate SMRD offset...
2015-08-06 Tom StellardAMDGPU/SI: Use ComplexPatterns for SMRD addressing...
2015-08-06 Nico RieckRename inst_range() to instructions() for consistency...
2015-08-06 Chad Rosier[AArch64] Use a static function and other minor cleanup...
2015-08-06 Chad Rosier[AArch64] Improve the readability of the ld/st optimiza...
2015-08-06 Douglas Katzman[SPARC] Don't compare arch name as a string, use the...
2015-08-06 Michael LiaoRemoving tailing whitespaces
2015-08-06 Michael Kuperstein[X86] Improve EmitLoweredSelect for contiguous CMOV...
2015-08-06 Alex LorenzMIR Serialization: Initial serialization of the machine...
2015-08-05 JF Bastienx86: NFC remove needless InstrCompiler cast
2015-08-05 Bjarke Hammersholt... [NVPTX] Use LDG for pointer induction variables.
2015-08-05 David Blaikie-Wdeprecated: Remove some dead code that was relying...
2015-08-05 Krzysztof Parzyszek[Hexagon] Edit a comment. NFC
2015-08-05 JF Bastienx86 atomic: optimize a.store(reg op a.load(acquire...
2015-08-05 JF BastienRevert "Fix MO's analyzePhysReg, it was confusing sub...
2015-08-05 JF BastienFix MO's analyzePhysReg, it was confusing sub- and...
2015-08-05 Krzysztof Parzyszek[Hexagon] Implement TargetTransformInfo for Hexagon
2015-08-05 Chandler Carruth[TTI] Make the cost APIs in TargetTransformInfo consist...
2015-08-05 Pete CooperMove BB succ_iterator to be inside TerminatorInst....
2015-08-05 Chad Rosier[AArch64] Register AArch64DeadRegisterDefinition pass...
2015-08-05 James Y Knight[Sparc] Fix disassembly of popc instruction.
2015-08-05 Matt ArsenaultAMDGPU/SI: Remove EXECReg
2015-08-05 Matt ArsenaultAMDGPU: Remove SCCReg.
2015-08-05 Chad Rosier[AArch64] Register (existing) AArch64BranchRelaxation...
2015-08-05 Chad Rosier[AArch64] Make the naming of the Address Type Promotion...
2015-08-05 Chad Rosier[AArch64] Register (existing) AArch64AdvSIMDScalar...
2015-08-05 Chad RosierMake this less error prone by using a #define. NFC.
2015-08-05 Chad Rosier[AArch64] Register (existing) AArch64ExpandPseudo pass...
2015-08-05 Chad Rosier[AArch64] Register (existing) AArch64LoadStoreOpt pass...
2015-08-05 Chad RosierUpdate comment. NFC.
2015-08-05 Artyom SkrobovARMISelDAGToDAG.cpp had this self-contradictory code:
2015-08-05 Tanya LattnerRename all references to old mailing lists to new lists...
2015-08-04 Sanjay Patelwrap OptSize and MinSize attributes for easier and...
2015-08-04 Sanjay Patel[x86] machine combiner reassociation: mark EFLAGS opera...
2015-08-04 Vasileios Kalintiris[mips][FastISel] Disable code generation for unsupporte...
2015-08-04 Vasileios KalintirisRevert r229675 - [mips] Avoid redundant sign extension...
2015-08-04 Saleem AbdulrasoolARM: support windows division routines
2015-08-04 Saleem AbdulrasoolARM: make Darwin libcall registration table driven...
2015-08-04 Ahmed Bougacha[AArch64] Rename FP formats to be more consistent....
2015-08-04 Ahmed Bougacha[AArch64] Add isel support for f16 indexed LD/ST.
2015-08-04 Ahmed Bougacha[AArch64][v8.1a] The "pan" sysreg isn't MSR-specific...
2015-08-04 Ahmed Bougacha[AArch64] Remove unnecessary "break". NFC.
2015-08-04 Ahmed Bougacha[AArch64] Use SDValue bool operator. NFC.
2015-08-04 Ahmed Bougacha[AArch64] Vector FCOPYSIGN supports Custom-lowering...
2015-08-03 Tim NorthoverARM: remove horrible printf left over from debugging
2015-08-03 Pete CooperConvert some AArch64 code to foreach loops. NFC.
2015-08-03 Tim NorthoverARM: prefer allocating VFP regs at stride 4 on Darwin.
2015-08-03 John Brawn[ARM] Make GlobalMerge merge extern globals by default
2015-08-03 James MolloyBe less conservative about forming IT blocks.
2015-08-03 JF BastienWebAssembly: implement getScalarShiftAmountTy so we...
2015-08-01 Craig TopperDe-constify pointers to Type since they can't be modifi...
2015-08-01 Jingyue Wu[NVPTX] allow register copy between float and int
2015-08-01 David Blaikie-Wdeprecated-clean: Fix cases of violating the rule...
2015-08-01 JF BastienWebAssembly: handle more than int32 argument/return
2015-08-01 David Blaikie-Wdeprecated-clean: Fix cases of violating the rule...
2015-07-31 Alex LorenzAMDGPU/SI: Add implicit register operands in the correc...
2015-07-31 Jingyue Wu[NVPTX] convert pointers in byval kernel arguments...
2015-07-31 JF BastienWebAssembly: handle `ret void`.
2015-07-31 JF Bastienx86: check hasOpaqueSPAdjustment in canRealignStack
2015-07-31 JF BastienWebAssembly: handle unused function arguments.
2015-07-31 JF BastienWebAssembly: print basic integer assembly.
2015-07-31 Sanjay Patel[x86] reassociate integer multiplies using machine...
2015-07-31 Geoff Berry[AArch64] Favor extended reg patterns for sub
2015-07-31 Jingyue WuRefactor: Simplify boolean conditional return statement...
2015-07-31 Matt ArsenaultAMDGPU: Fix v16i32 to v16i8 truncstore
2015-07-31 Matt ArsenaultAMDGPU/SI: Set DwarfRegNum
2015-07-31 Tom StellardAMDGPU/SI: Remove unused pattern for f32 constant loads
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