R600: Use address space enum instead of value
[oota-llvm.git] / lib / Target /
2014-06-14 Matt ArsenaultR600: Use address space enum instead of value
2014-06-13 Eric ChristopherRemove InstrItineraryData off of the TargetMachine...
2014-06-13 Eric ChristopherMove ARMJITInfo off of the TargetMachine and down onto...
2014-06-13 Eric ChristopherThe hazard recognizer only needs a subtarget, not a...
2014-06-13 Eric ChristopherFix typo.
2014-06-13 Tim NorthoverX86: lower ATOMIC_CMP_SWAP_WITH_SUCCESS directly
2014-06-13 Matt ArsenaultR600: Cleanup some old AMDIL stuff.
2014-06-13 Tom StellardR600: Remove AMDIL instruction and register definitions
2014-06-13 Zoran Jovanovic[mips][mips64r6] Relocation R_MIPS_PC18_S3
2014-06-13 Tim NorthoverIR: add "cmpxchg weak" variant to support permitted...
2014-06-13 Daniel Sanders[mips] Add cache and pref instructions
2014-06-13 Daniel Sanders[mips][mips64r6] bc1any[24] are not available on MIPS32...
2014-06-13 Daniel Sanders[mips][mips64r6] b(ge|lt)zal are not available on MIPS3...
2014-06-13 Daniel Sanders[mips][mips64r6] daddi is not available on MIPS64r6
2014-06-13 Cameron McInallyAdd HasCDI predicate to AVX512 VPBROADCASTM*.
2014-06-13 Tim NorthoverCPP backend: set volatile property on atomic instructions.
2014-06-13 Oliver StannardARM: Fix fastcc calling convention for Thumb1
2014-06-13 Matt ArsenaultR600: Don't call setOperationAction with things that...
2014-06-13 Matt ArsenaultR600/SI: Fix selection error on i64 rotl / rotr.
2014-06-13 Juergen Ributzka[FastISel][X86] Add support for cvttss2si/cvttsd2si...
2014-06-13 Tom StellardR600: Move AMDGPUInstrInfo from AMDGPUTargetMachine...
2014-06-13 Tom StellardR600: Drop use of cached TargetMachine in R600InstrInfo.cpp
2014-06-13 Tom StellardR600: Drop use of cached TargetMachine in AMDGPUInstrIn...
2014-06-13 Juergen Ributzka[FastISel][X86] - Add branch weights
2014-06-13 Eric ChristopherMove ARMSelectionDAGInfo from the TargetMachine to...
2014-06-13 Eric ChristopherMove to a private function to initialize subtarget...
2014-06-12 Eric ChristopherHave ARMSelectionDAGInfo take a DataLayout as it's...
2014-06-12 Juergen Ributzka[FastISel][X86] Add MachineMemOperand to load/store...
2014-06-12 Eric ChristopherMove the PPCSelectionDAGInfo off the TargetMachine...
2014-06-12 Eric ChristopherMake PPCSelectionDAGInfo take a DataLayout instead...
2014-06-12 Eric ChristopherMove PPCTargetLowering off of the TargetMachine and...
2014-06-12 Eric ChristopherRemove an extraneous this-> to access the subtarget.
2014-06-12 Eric ChristopherRename PPCSubTarget to Subtarget in PPCTargetLowering...
2014-06-12 Eric ChristopherMove PPCJITInfo off of the TargetMachine and onto the...
2014-06-12 Eric ChristopherRemove the use of TargetMachine from PPCJITInfo and...
2014-06-12 Eric ChristopherMove PPCInstrInfo off of the target machine and onto...
2014-06-12 Eric ChristopherRemove TargetMachine from PPCInstrInfo and all dependen...
2014-06-12 Matt ArsenaultR600: Mostly remove remaining AMDIL intrinsics.
2014-06-12 Eric ChristopherMove DataLayout from the PPCTargetMachine to the subtarget.
2014-06-12 Eric ChristopherMove PPCFrameLowering into PPCSubtarget from PPCTargetM...
2014-06-12 Juergen Ributzka[FastIsel][X86] Add support for lowering the first...
2014-06-12 Saleem AbdulrasoolCodeGen: enable mov.w/mov.t pairs with minsize for WoA
2014-06-12 Juergen RibutzkaRevert "[FastIsel][X86] Add support for lowering the...
2014-06-12 Saleem AbdulrasoolX86: stifle GCC warning
2014-06-12 James MolloyDisable the load/store optimization pass for Thumb-1.
2014-06-12 Daniel Sanders[mips][mips64r6] bc1[tf] are not available on MIPS32r6...
2014-06-12 Daniel Sanders[mips][mips64r6] bc2[ft] are not available on MIPS32r6...
2014-06-12 Daniel Sanders[mips][mips64r6] [sl][duw]xc1 are not available on...
2014-06-12 Daniel Sanders[mips][mips64r6] prefx is not available on MIPS32r6...
2014-06-12 Daniel Sanders[mips][mips64r6] 80 col corrections that should have...
2014-06-12 Daniel Sanders[mips][mips64r6] c.cond.fmt, mov[fntz], and mov[fntz...
2014-06-12 Daniel Sanders[mips][mips64r6] jalx is not available on MIPS32r6...
2014-06-12 Zoran Jovanovic[mips][mips64r6] Add R_MIPS_PC19_S2
2014-06-12 Daniel Sanders[mips] Use MTHC1 when it is available (MIPS32r2 and...
2014-06-12 Zoran Jovanovic[mips][mips64r6] Add bgec and bgeuc instructions
2014-06-12 Andrea Di Biagio[X86] Teach how to dump the name of target node RDTSCP_DAG.
2014-06-12 Daniel Sanders[mips][mips64r6] madd.[ds], msub.[ds], nmadd.[ds],...
2014-06-12 Daniel Sanders[mips][mips64r6] madd/maddu/msub/msubu are not availabl...
2014-06-12 Andrea Di Biagio[X86] Teach how to combine AVX and AVX2 horizontal...
2014-06-12 Daniel Sanders[mips][mips64r6] Replace m[tf]hi, m[tf]lo, mult, multu...
2014-06-12 Matt ArsenaultR600/SI: Use a register set to -1 for data0 on ds_inc...
2014-06-11 Juergen Ributzka[FastISel][X86] Add support for the sqrt intrinsic.
2014-06-11 Juergen Ributzka[FastIsel][X86] Add support for lowering the first...
2014-06-11 Juergen Ributzka[FastISel][X86] Add support for the frameaddress intrinsic.
2014-06-11 Chad Rosier[AArch64] Basic Sched Model for Cortex-A57.
2014-06-11 Tom StellardR600: Set correct InstrItinClass for instructions using...
2014-06-11 Tom StellardR600: BCNT_INT is a vector only instruction
2014-06-11 Jim GrosbachARM: honor hex immediate formatting for ldr/str i12...
2014-06-11 Matt ArsenaultR600/SI: Fix bitcast between v2i32 and f64
2014-06-11 Matt ArsenaultR600/SI: Update place using old subtarget predicate
2014-06-11 Matt ArsenaultR600/SI: Add common 64-bit LDS atomics
2014-06-11 Matt ArsenaultR600/SI: Add instruction definitions for 64-bit LDS...
2014-06-11 Matt ArsenaultR600/SI: Add 32-bit LDS atomic cmpxchg
2014-06-11 Matt ArsenaultR600/SI: Use LDS atomic inc / dec
2014-06-11 Matt ArsenaultR600/SI: Add other LDS atomic operations
2014-06-11 Matt ArsenaultR600/SI: Add instruction definitions for more LDS ops
2014-06-11 Matt ArsenaultR600/SI: Fix backwards names for local atomic instructions.
2014-06-11 Matt ArsenaultR600/SI: Refactor local atomics.
2014-06-11 Matt ArsenaultR600/SI: Use v_cvt_f32_ubyte* instructions
2014-06-11 Matt ArsenaultR600/SI: Fix selection failure on scalar_to_vector
2014-06-11 Tim NorthoverX86: add stringy name for X86ISD::LCMPXCHG16_DAG
2014-06-11 Matheus Almeida[mips] Implement jr.hb and jalr.hb (Jump Register and...
2014-06-11 Cameron McInallyAdd AVX512 masked leadz instrinsic support.
2014-06-11 Andrea Di Biagio[X86] Refactor the logic to select horizontal adds...
2014-06-11 Rafael EspindolaTry to fix the msvc build.
2014-06-11 Matt ArsenaultUse cast instead of assert + dyn_cast
2014-06-11 Matt ArsenaultR600: Add helper functions.
2014-06-11 Eric ChristopherRemove duplicate copy of InstrItineraryData from the...
2014-06-11 Eric ChristopherMove to a private function to initialize the subtarget...
2014-06-11 Eric ChristopherMove to a private function to initialize the subtarget...
2014-06-10 Juergen Ributzka[FastISel][X86] Extend support for {s|u}{add|sub|mul...
2014-06-10 Eric ChristopherUse unique_ptr for X86Subtarget pointer members.
2014-06-10 Eric ChristopherMove AArch64TargetLowering to AArch64Subtarget.
2014-06-10 Eric ChristopherMove AArch64InstrInfo to AArch64Subtarget.
2014-06-10 Eric ChristopherRemove a method that was just replacing direct access...
2014-06-10 Eric ChristopherRemove the use of TargetMachine from X86InstrInfo.
2014-06-10 Eric ChristopherMove X86RegisterInfo away from using the TargetMachine...
2014-06-10 Eric ChristopherUse the TargetMachine on the DAG or the MachineFunction...
2014-06-10 Tom StellardR600/SI: Emit an error when attempting to spill VGPRs v4
2014-06-10 Tom StellardR600/SI: Fix a crash when spilling SGPRs
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