Do not forget to mark prcessed arguments.
[oota-llvm.git] / lib / Target /
2010-05-14 Bill WendlingThis should happen if there are no calls, not if it...
2010-05-14 Bill WendlingRevert r103804. The comment is correct.
2010-05-14 Bill WendlingFix comment.
2010-05-14 Bill WendlingRename "HasCalls" in MachineFrameInfo to "AdjustsStack...
2010-05-14 Dan GohmanLowering of atomic instructions can result in operands...
2010-05-14 Kevin EnderbyFix so "int3" is correctly accepted, added "into" and...
2010-05-14 Evan ChengModel VLD*_UPD and VLD*odd_UPD pair with REG_SEQUENCE.
2010-05-14 Dan GohmanSet isTerminator on TRAP instructions.
2010-05-14 Dan GohmanDon't use isBarrier for the PowerPC sync instruction...
2010-05-14 Dan GohmanAdd mayLoad and mayStore flags to instructions which...
2010-05-14 Evan ChengAdded a QQQQ register file to model 4-consecutive Q...
2010-05-14 Evan ChengFix comments.
2010-05-13 Evan ChengAdd comment about the pseudo registers QQ, each of...
2010-05-13 Bob WilsonFix pr7110: For non-Darwin targets UnspilledCS1GPRs...
2010-05-13 Oscar FuentesCMake: fixes 64 bit Visual Studio IDE build. Fixes...
2010-05-13 Anton KorobeynikovProperly set thread-local flag on globals during cpp...
2010-05-13 Daniel DunbarFix -Asserts warning.
2010-05-13 Evan ChengBring back VLD1q and VST1q and use them for reloading...
2010-05-13 Evan ChengExpand VMOVQQ into a pair of VMOVQ.
2010-05-13 Evan ChengMark some pattern-less instructions as neverHasSideEffects.
2010-05-13 Chris Lattnerreapply r103668 with a fix. Never make "minor syntax...
2010-05-12 Chris Lattnerrevert r103668 for now, it is apparently breaking things.
2010-05-12 Chris Lattnermoffset forms of moves are x86-32 only, make the parser
2010-05-12 Evan ChengFix some potential issues in the pseudo instruction...
2010-05-12 Chris Lattnerfix the encoding of the obscure "moffset" forms of...
2010-05-12 Evan ChengRemove a dead fixme.
2010-05-12 Rafael EspindolaAdd support for movi32 of global values to the new...
2010-05-12 Evan Chengvst instructions are modeled as this:
2010-05-12 Daniel DunbarMC/X86: Extend suffix matching hack to match 'q' suffix.
2010-05-12 Daniel DunbarMC/Mach-O/x86_64: Add a new hook for checking whether...
2010-05-11 Dan GohmanAdd initial kill flag support to FastISel.
2010-05-11 Evan ChengAvoid breaking vstd when reg_sequence is not used.
2010-05-11 Bill WendlingSimplify this logic of creating a default Features...
2010-05-11 Duncan SandsI got tired of VISIBILITY_HIDDEN colliding with the...
2010-05-11 Dan GohmanRemove the "WantsWholeFile" concept, as it's no longer...
2010-05-11 Dan GohmanImplement a bunch more TargetSelectionDAGInfo infrastru...
2010-05-11 Dan GohmanRemove the TargetLowering::getSubtarget() virtual funct...
2010-05-11 Kalle RaiskilaMake SPU backend not assert on jump tables.
2010-05-11 Evan ChengSelect @llvm.trap to the special B with 1111 condition...
2010-05-11 Bill WendlingDon't create a StringRef with a NULL value.
2010-05-11 Evan ChengModel some vst3 and vst4 with reg_sequence.
2010-05-11 Bill WendlingThe getDefaultSubtargetFeatures method of SubtargetFeat...
2010-05-10 Evan ChengModel some vld3 instructions with REG_SEQUENCE.
2010-05-10 Evan ChengModel vld2 / vst2 with reg_sequence.
2010-05-10 Kalle RaiskilaFix encoding of 'sf' and 'sfh' instructions.
2010-05-09 Nathan Jeffordsupdated handling dllexport in X86AsmPrinter
2010-05-09 Nathan Jeffordsmade COFF target dllexport logic apply to all subtargets
2010-05-08 Chris Lattnerbreak coff symbol definition stuff out into proper...
2010-05-07 Jim GrosbachClean up the conditional for handling of sign_extend_in...
2010-05-07 Devang PatelUse overloaded operators instead of DIDescriptor::getNode()
2010-05-07 Kalle RaiskilaTesting svn access with a note added to documentation.
2010-05-07 Chris Lattnerswitch MCSectionCOFF from a syntactic to semantic repre...
2010-05-07 Evan ChengUse VLD2q32 / VST2q32 to reload / spill QQ (pair of...
2010-05-07 Evan ChengUse VSTMD / VLDMD for spills and reloads of Q registers...
2010-05-07 Dan GohmanWhen rematerializing, use the debug location of the...
2010-05-07 Evan ChengRemove VLD1q and VST1q for reloading and spilling Q...
2010-05-06 Daniel DunbarMC/X86: X86AbsMemAsmOperand is subclass of X86NoSegMemA...
2010-05-06 Chris Lattnerfix rdar://7947167 - llvm-mc doesn't match movsq
2010-05-06 Sean CallananEliminated the classification of control registers...
2010-05-06 Daniel DunbarMC/X86: Error out if we see a non-constant FK_Data_1...
2010-05-06 Dan GohmanAdd a DebugLoc argument to TargetInstrInfo::copyRegToRe...
2010-05-06 Evan ChengAdd argument TargetRegisterInfo to loadRegFromStackSlot...
2010-05-06 Bob WilsonAdd a missing break statement to fix unintentional...
2010-05-06 Jim GrosbachFix unintentional fallthrough. Patch by Edmund Grimley...
2010-05-06 Shantonu SenFix "warning: extra ';' inside a struct or union" when...
2010-05-06 Evan ChengRe-apply 103156 and 103157. 103156 didn't break anythin...
2010-05-06 Dan GohmanRevert r103157, which broke test/CodeGen/ARM/2009-11...
2010-05-06 Eric ChristopherRevert r103156 since it was breaking the build bots.
2010-05-06 Evan ChengFix an obvious bug in isMoveInstr. It needs to return...
2010-05-06 Evan ChengAdding pseudo 256-bit registers QQ0 . . . QQ7 to repres...
2010-05-06 Evan ChengCosmetic changes.
2010-05-06 Evan ChengstoreRegToStackSlot has forgotten about QPR_8 register...
2010-05-05 Jim GrosbachCleanup of ARMv7M support. Move hardware divide and...
2010-05-05 Sean CallananFixed a sign-extension bug in the X86 disassembler
2010-05-05 Evan ChengDo not pre-allocate references of D registers pairs...
2010-05-05 Dan GohmanNo-ops emitted for scheduling don't correspond with...
2010-05-05 Jim GrosbachAdd initial support for ARMv7M subtarget and cortex...
2010-05-05 Evan ChengModel CONCAT_VECTORS of two 64-bit values as a REG_SEQU...
2010-05-05 Evan ChengTrim include.
2010-05-05 Eric ChristopherRevert 102941, we're going to do this via attr and...
2010-05-04 Eric ChristopherUpdate comment.
2010-05-04 Evan ChengWith -neon-reg-sequence, models forming a Q register...
2010-05-04 Evan ChengDo not pre-allocate for registers which form a REG_SEQU...
2010-05-04 Chris Lattner"on the rare occasion the SPU BE produces illegal assem...
2010-05-04 Daniel DunbarMC/X86: Chris pointed that 'as' isn't consistent in...
2010-05-04 Daniel DunbarMC/X86: Add "support" for matching ATT style mnemonic...
2010-05-04 Gabor Greiffix operand indexes when outputting InvokeInsts
2010-05-04 Kevin EnderbyFix to r102952. The MOV64toSDrm record in X86Instr64bi...
2010-05-04 Jim Grosbachrdar://7937137 - dbg values not being handled in thumb1...
2010-05-03 Dale JohannesenImplement builtin_return_address(x) and builtin_frame_a...
2010-05-03 Kevin EnderbyChanged llvm-mc to use the same suffixes with floating...
2010-05-03 Kevin EnderbyFixed the encoding of two of the X86 movq instuctions...
2010-05-03 Kevin EnderbyFixed the encoding of the x86 push instructions. Using...
2010-05-03 Eric ChristopherAdd an option, defaulting to off, to disable the sse...
2010-05-03 Dan GohmanAdd a README entry.
2010-05-02 Duncan SandsRemove the -enable-sjlj-eh option, which doesn't do...
2010-05-01 Chris Lattnerfix some inconsistent line endings, patch by Jakub...
2010-05-01 Anton KorobeynikovDo folding for indirect branches, where possible
2010-05-01 Anton KorobeynikovImplement indirect branches on MSP430
2010-05-01 Anton KorobeynikovLong branch target oparands are not pc-rel.
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