Teach X86 asm parser that VMOVAPSrr and other VEX-encoded register to register moves...
[oota-llvm.git] / lib / Target /
2013-10-07 Craig TopperTeach X86 asm parser that VMOVAPSrr and other VEX-encod...
2013-10-07 Craig TopperAdd disassembler support for long encodings for INC...
2013-10-06 Benjamin KramerX86: Don't fold spills into SSE operations if the stack...
2013-10-06 Elena DemikhovskyAVX-512: added scalar convert instructions and intrinsics.
2013-10-06 Venkatraman Govind... [Sparc] Do not emit nop after fcmp* instruction with V9.
2013-10-06 Elena DemikhovskyAVX-512: fixed shuffle lowering
2013-10-06 Venkatraman Govind... [Sparc] Custom lower addc/adde/subc/sube on i64 in...
2013-10-06 Venkatraman Govind... [Sparc] Use addxcc/subxcc for adde/sube instead of...
2013-10-05 Craig TopperAdd TBM instructions to loading folding tables.
2013-10-05 Nick LewyckyRename this feature to "cx16" to match gcc's flag name...
2013-10-05 Craig TopperRemove underscores from TBM instruction names for consi...
2013-10-05 Craig TopperRemove unneeded TBM intrinsics. The arithmetic/logical...
2013-10-05 Craig TopperAdd an additional pattern for BLCI since opt can turn...
2013-10-05 Rafael EspindolaRemove some really nasty uses of hasRawTextSupport.
2013-10-05 Jiangning LiuImplement aarch64 neon instruction set AdvSIMD (Across).
2013-10-05 Venkatraman Govind... [Sparc] Use correct alignment while loading/storing...
2013-10-05 Venkatraman Govind... [Sparc] Respect hasHardQuad parameter correctly when...
2013-10-04 Venkatraman Govind... [Sparc] Correct the floating point conditional code...
2013-10-04 Jack Carterforgot to remove this file as well
2013-10-04 Jack Carterreverting per request
2013-10-04 Reed KotlerSupport tblockaddr for static compilation in Mips16.
2013-10-04 Jack Carter[MC][AsmParser] Hook for post assembly file processing
2013-10-04 Akira Hatanaka[mips] Fix a bug in MipsLongBranch::replaceBranch,...
2013-10-04 Matthias BraunARM: optimizeSelect has to consider the previous regist...
2013-10-04 Matthias BraunARM: do not add a regmask for TAILJUMPs
2013-10-04 Matthias BraunARM: preserve undef flag in pseudo instruction expanders
2013-10-04 Jiangning LiuImplement aarch64 neon instruction set AdvSIMD (3V...
2013-10-03 Elena DemikhovskyAVX-512: Fixed encoding of VMOVQ instruction.
2013-10-03 Amara Emerson[ARM] Warn on deprecated IT blocks in v8 AArch32 assembly.
2013-10-03 Craig TopperReplace C++ style comment with a C style comment to...
2013-10-03 Craig TopperRemove comma from the end of an enum.
2013-10-03 Craig TopperAdd XOP disassembler support. Fixes PR13933.
2013-10-03 Craig TopperAdd patterns for selecting TBM instructions from logica...
2013-10-02 Vincent LejeuneR600: Add a ldptr intrinsic to support MSAA.
2013-10-02 Elena DemikhovskyAVX-512: fixed a bug in getLoadStoreRegOpcode() for...
2013-10-02 Elena DemikhovskyAVX-512: Added TB prefix to all instructions without...
2013-10-01 Vincent LejeuneR600: add a pass that merges clauses.
2013-10-01 Vincent LejeuneR600: Put PRED_X instruction in its own clause
2013-10-01 Vincent LejeuneR600: Enable -verify-machineinstrs in some tests.
2013-10-01 Richard Sandiford[SystemZ] Add comparisons of high words and memory
2013-10-01 Richard Sandiford[SystemZ] Add comparisons of large immediates using...
2013-10-01 Richard Sandiford[SystemZ] Add immediate addition involving high words
2013-10-01 Richard Sandiford[SystemZ] Extend test-under-mask support to high GR32s
2013-10-01 Richard Sandiford[SystemZ] Extend 32-bit RISBG optimizations to high...
2013-10-01 Richard Sandiford[SystemZ] Extend pseudo conditional 8- and 16-bit store...
2013-10-01 Tim NorthoverARM: support interrupt attribute
2013-10-01 Richard Sandiford[SystemZ] Optimize 32-bit FPR<->GPR moves for z196...
2013-10-01 Richard Sandiford[SystemZ] Allow integer AND involving high words
2013-10-01 Richard Sandiford[SystemZ] Allow integer XOR involving high words
2013-10-01 Rafael EspindolaRemove several unused variables.
2013-10-01 Richard Sandiford[SystemZ] Allow integer OR involving high words
2013-10-01 Richard Sandiford[SystemZ] Allow integer insertions with a high-word...
2013-10-01 Richard Sandiford[SystemZ] Allow selects with a high-word destination
2013-10-01 Richard Sandiford[SystemZ] Add patterns to load a constant into a high...
2013-10-01 Joey Gouly[ARM] Remove an unused function from the disassembler.
2013-10-01 Matheus AlmeidaTest commit. Updated comment.
2013-10-01 Richard Sandiford[SystemZ] Add register zero extensions involving at...
2013-10-01 Joey Gouly[ARM] Introduce the 'sevl' instruction in ARMv8.
2013-10-01 Richard Sandiford[SystemZ] Add truncating high-word stores (STCH and...
2013-10-01 Richard Sandiford[SystemZ] Add zero-extending high-word loads (LLCH...
2013-10-01 Richard Sandiford[SystemZ] Add sign-extending high-word loads (LBH and...
2013-10-01 Richard Sandiford[SystemZ] Use upper words of GR64s for codegen
2013-10-01 Richard Sandiford[SystemZ] Reapply: Add definitions of LFH and STFH
2013-10-01 Daniel Sanders[mips][msa] Added support for matching mod_[us] from...
2013-10-01 Vladimir MedicThis patch adds aliases for Mips sub instruction with...
2013-10-01 Elena DemikhovskyAVX-512: Added X86vzmovl patterns
2013-10-01 Craig TopperRemove 0 as a valid encoding for the m-mmmm field.
2013-10-01 Craig TopperRemove unneeded fields from disassembler internal instr...
2013-10-01 Craig TopperBEXTR should be defined to take same type for bother...
2013-09-30 Preston GurdForgot to add a break statement.
2013-09-30 Preston GurdThe X86FixupLEAs pass for Intel Atom must not call...
2013-09-30 Jack Carter[mips][msa] Direct Object Emission for I8 instructions.
2013-09-30 Jack Carter[mips][msa] Direct Object Emission for I5 instructions.
2013-09-30 Tilmann Scheller[ARM] Clean up ARMAsmParser::validateInstruction().
2013-09-30 Jack Carter[mips][msa] Direct Object Emission for 2R instructions.
2013-09-30 Jack Carter[PATCH 1/4] [mips][msa] Source register of FILL instruc...
2013-09-30 Tilmann Scheller[ARM] Assembler: ARM LDRD with writeback requires the...
2013-09-30 Arnold SchwaighoferSwift model: Fix uop description on some writes
2013-09-30 Arnold SchwaighoferIfConverter: Use TargetSchedule for instruction latencies
2013-09-30 Richard Sandiford[SystemZ] Revert r191661: Add definitions of LFH and...
2013-09-30 Richard Sandiford[SystemZ] Add definitions of LFH and STFH
2013-09-30 Richard Sandiford[SystemZ] Add GRH32 for the high word of a GR64
2013-09-30 Richard Sandiford[SystemZ] Rename subregs and add subreg_h32
2013-09-30 Richard Sandiford[SystemZ] Add change missing from previous commit
2013-09-30 Richard Sandiford[SystemZ] Rename 32-bit GPR registers
2013-09-30 Craig TopperVarious x86 disassembler fixes.
2013-09-29 Craig TopperChange type of XOP flag in code emitters to a bool...
2013-09-29 Craig TopperAdd comments for XOPA map introduced with TBM instructi...
2013-09-28 Robert WilhelmEven more spelling fixes for "instruction".
2013-09-28 Robert WilhelmFix spelling intruction -> instruction.
2013-09-28 Tom StellardR600: Fix handling of NAN in comparison instructions
2013-09-28 Tom StellardSelectionDAG: Improve legalization of SELECT_CC with...
2013-09-28 Tom StellardSelectionDAG: Try to expand all condition codes using...
2013-09-28 NAKAMURA TakumiMipsMachineFunction.cpp: Add missing #include <raw_ostr...
2013-09-28 Akira Hatanaka[mips] Make sure loads from lazy-binding entries do...
2013-09-27 Akira Hatanaka[mips] Define a derived class of PseudoSourceValue...
2013-09-27 Akira Hatanaka[mips] Rewrite MipsTargetLowering::getAddr functions...
2013-09-27 Yunzhong GaoAdding intrinsics to the llvm backend for TBM instructi...
2013-09-27 Richard Sandiford[SystemZ] Rein back the use of block operations
2013-09-27 Richard Sandiford[SystemZ] Improve handling of PC-relative addresses
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