Add support for parsing the ELF .type assembler directive.
[oota-llvm.git] / lib / Target /
2010-05-21 Dale JohannesenFix i64->f64 conversion, x86-64, -no-sse. A bit
2010-05-21 Evan ChengChange ARM scheduling default to list-hybrid if the...
2010-05-20 Evan ChengAllow targets more controls on what nodes are scheduled...
2010-05-20 Daniel DunbarMC/X86: Add movq alias for movabsq, to allow matching...
2010-05-20 Daniel DunbarX86: Model i64i32imm properly, as a subclass of all...
2010-05-20 Daniel DunbarX86: Fix immediate type of FOO64i32 operations.
2010-05-20 Bob WilsonHandle Neon v2f64 and v2i64 vector shuffles as register...
2010-05-20 Dan GohmanDelete MMX_MOVQ64gmr. It was the same as MMX_MOVQ64mr...
2010-05-20 Dale JohannesenThe PPC MFCR instruction implicitly uses all 8 of the CR
2010-05-20 Dan GohmanFix assembly parsing and encoding of the pushf and...
2010-05-20 Dan GohmanSet neverHasSideEffects on 64-bit pushf and popf, for...
2010-05-20 Dan GohmanDefine the x86 pause instruction.
2010-05-20 Dan GohmanFix the sfence instruction to use MRM_F8 instead of...
2010-05-19 Evan ChengCode refactoring: pull SchedPreference enum from Target...
2010-05-19 Daniel DunbarMC/X86: Add missing entry for TAILJMP_1 to getRelaxedOp...
2010-05-19 Daniel DunbarMC/X86: Lower TAILCALLd[64] to JMP_1, to allow relaxati...
2010-05-19 Daniel DunbarMC/X86: Strip spurious operands from TAILJMPr64 as...
2010-05-19 Evan Chengt2LEApcrel and tLEApcrel are re-materializable. This...
2010-05-19 Evan ChengUse 'adr' for LEApcrel and LEApcrel. Mark LEApcrel...
2010-05-19 Daniel DunbarMC/X86: Lower MOV{8,16,32,64}{rm,mr} to fixed-register...
2010-05-19 Evan ChengMark pattern-less mayLoad / mayStore instructions never...
2010-05-19 Evan ChengTarget instruction selection should copy memoperands.
2010-05-19 Daniel DunbarMC/X86: Strip spurious operands from CALL64r as we...
2010-05-19 Evan ChengMark a few more pattern-less instructions with neverHas...
2010-05-19 Dan GohmanFactor out the code for picking integer arithmetic...
2010-05-18 Dan GohmanTeach mode load folding and unfolding code about CMP32r...
2010-05-18 Bill WendlingDon't eliminate frame pointers from leaf functions...
2010-05-18 Dan GohmanWhen converting a test to a cmp to fold a load, use...
2010-05-18 Chris Lattnermake mcinstlower remove all but the first operand to...
2010-05-18 Evan ChengSink dag combine's post index load / store code that...
2010-05-18 Daniel DunbarMC/X86: Implement custom lowering to make sure we match...
2010-05-17 Jakob Stoklund OlesenARMBaseRegisterInfo::estimateRSStackSizeLimit() could...
2010-05-17 Bill Wendling- Set the "HasCalls" flag after instruction selection...
2010-05-17 Evan Chengvmov of immediates are trivially re-materializable.
2010-05-17 Daniel DunbarMC: Add dyn_cast support to MCSection.
2010-05-17 Eric ChristopherAdd some section and constant support for darwin TLS.
2010-05-17 Bob WilsonFix a regression in 464.h264 for thumb1 and thumb2...
2010-05-17 Evan ChengTurn on -neon-reg-sequence by default.
2010-05-17 Evan ChengNo reason not to run the NEON domain croassing fix...
2010-05-16 Dale JohannesenRevert 103911; it broke a test that expects bitconvert
2010-05-16 Dale JohannesenMake x86-64 64-bit bitconvert work when SSE is not...
2010-05-16 Anton KorobeynikovChris said that the comment char should be escaped...
2010-05-16 Anton KorobeynikovAdd support for thiscall calling convention.
2010-05-16 Anton KorobeynikovGeneralize the ARM DAG combiner of mul with constants...
2010-05-16 Evan ChengModel vst lane instructions with REG_SEQUENCE.
2010-05-15 Dale JohannesenFix uint64->{float, double} conversion to do rounding...
2010-05-15 Anton KorobeynikovSome cheap DAG combine goodness for multiplication...
2010-05-15 Anton Korobeynikov"trap" pseudo-op turned out to be apple-local.
2010-05-15 Evan ChengModel 128-bit vld lane with REG_SEQUENCE.
2010-05-15 Evan Chengv4i64 and v8i64 are only synthesizable when NEON is...
2010-05-15 Evan ChengAllow TargetLowering::getRegClassFor() to be called...
2010-05-15 Evan ChengModel 64-bit lane vld with REG_SEQUENCE.
2010-05-14 Evan ChengTeach two-address pass to do some coalescing while...
2010-05-14 Evan ChengModel VST*_UPD and VST*oddUPD pair with REG_SEQUENCE.
2010-05-14 Bill WendlingSystemZ really does mean "has calls" and not just ...
2010-05-14 Dan GohmanBR is a barrier.
2010-05-14 Bill WendlingSeveral tail call tests apparently rely upon this being...
2010-05-14 Bill WendlingThis should happen if there are no calls, not if it...
2010-05-14 Bill WendlingRevert r103804. The comment is correct.
2010-05-14 Bill WendlingFix comment.
2010-05-14 Bill WendlingRename "HasCalls" in MachineFrameInfo to "AdjustsStack...
2010-05-14 Dan GohmanLowering of atomic instructions can result in operands...
2010-05-14 Kevin EnderbyFix so "int3" is correctly accepted, added "into" and...
2010-05-14 Evan ChengModel VLD*_UPD and VLD*odd_UPD pair with REG_SEQUENCE.
2010-05-14 Dan GohmanSet isTerminator on TRAP instructions.
2010-05-14 Dan GohmanDon't use isBarrier for the PowerPC sync instruction...
2010-05-14 Dan GohmanAdd mayLoad and mayStore flags to instructions which...
2010-05-14 Evan ChengAdded a QQQQ register file to model 4-consecutive Q...
2010-05-14 Evan ChengFix comments.
2010-05-13 Evan ChengAdd comment about the pseudo registers QQ, each of...
2010-05-13 Bob WilsonFix pr7110: For non-Darwin targets UnspilledCS1GPRs...
2010-05-13 Oscar FuentesCMake: fixes 64 bit Visual Studio IDE build. Fixes...
2010-05-13 Anton KorobeynikovProperly set thread-local flag on globals during cpp...
2010-05-13 Daniel DunbarFix -Asserts warning.
2010-05-13 Evan ChengBring back VLD1q and VST1q and use them for reloading...
2010-05-13 Evan ChengExpand VMOVQQ into a pair of VMOVQ.
2010-05-13 Evan ChengMark some pattern-less instructions as neverHasSideEffects.
2010-05-13 Chris Lattnerreapply r103668 with a fix. Never make "minor syntax...
2010-05-12 Chris Lattnerrevert r103668 for now, it is apparently breaking things.
2010-05-12 Chris Lattnermoffset forms of moves are x86-32 only, make the parser
2010-05-12 Evan ChengFix some potential issues in the pseudo instruction...
2010-05-12 Chris Lattnerfix the encoding of the obscure "moffset" forms of...
2010-05-12 Evan ChengRemove a dead fixme.
2010-05-12 Rafael EspindolaAdd support for movi32 of global values to the new...
2010-05-12 Evan Chengvst instructions are modeled as this:
2010-05-12 Daniel DunbarMC/X86: Extend suffix matching hack to match 'q' suffix.
2010-05-12 Daniel DunbarMC/Mach-O/x86_64: Add a new hook for checking whether...
2010-05-11 Dan GohmanAdd initial kill flag support to FastISel.
2010-05-11 Evan ChengAvoid breaking vstd when reg_sequence is not used.
2010-05-11 Bill WendlingSimplify this logic of creating a default Features...
2010-05-11 Duncan SandsI got tired of VISIBILITY_HIDDEN colliding with the...
2010-05-11 Dan GohmanRemove the "WantsWholeFile" concept, as it's no longer...
2010-05-11 Dan GohmanImplement a bunch more TargetSelectionDAGInfo infrastru...
2010-05-11 Dan GohmanRemove the TargetLowering::getSubtarget() virtual funct...
2010-05-11 Kalle RaiskilaMake SPU backend not assert on jump tables.
2010-05-11 Evan ChengSelect @llvm.trap to the special B with 1111 condition...
2010-05-11 Bill WendlingDon't create a StringRef with a NULL value.
2010-05-11 Evan ChengModel some vst3 and vst4 with reg_sequence.
2010-05-11 Bill WendlingThe getDefaultSubtargetFeatures method of SubtargetFeat...
2010-05-10 Evan ChengModel some vld3 instructions with REG_SEQUENCE.
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