Fix PR15632: No support for ppcf128 floating-point remainder on PowerPC.
[oota-llvm.git] / lib / Target /
2013-03-27 Tim NorthoverSwitch to LLVM support function abs64 to keep VS2008...
2013-03-27 Silviu BarangaEnabling the generation of dependency breakers for...
2013-03-27 Jyotsna VermaHexagon: Disable optimizations at O0.
2013-03-27 Christian KonigR600/SI: add cummuting of rev instructions
2013-03-27 Christian KonigR600/SI: add mulhu/mulhs patterns
2013-03-27 Christian KonigR600/SI: add srl/sha patterns for SI
2013-03-27 Hal FinkelAllocate r0 on PPC
2013-03-27 Hal FinkelUse the PPC no-r0 class on the TOC LD pseudos
2013-03-27 Hal FinkelApply the no-r0 register class to the PPC SELECT_CC_I...
2013-03-27 Hal FinkelApply the no-r0 class to PPC TOC ADDI[S] pseudo instruc...
2013-03-27 Bill SchmidtRemove the link register from the GPR classes on PowerPC.
2013-03-27 Hal FinkelDon't spill PPC VRSAVE on non-Darwin (even in SjLj)
2013-03-26 Michael LiaoAdd XTEST codegen support
2013-03-26 Michael LiaoAdd HLE target feature
2013-03-26 Jakob Stoklund OlesenEnable SandyBridgeModel for all modern Intel P6 descend...
2013-03-26 Hal FinkelRestore real bit lengths on PPC register numbers
2013-03-26 Hal FinkelPPC: Use HWEncoding and TRI->getEncodingValue
2013-03-26 NAKAMURA TakumiR600/SIMCCodeEmitter.cpp: Prune a couple of unused...
2013-03-26 Hal FinkelUse multiple virtual registers in PPC CR spilling
2013-03-26 Hal FinkelUpdate PPCRegisterInfo's use of virtual registers to...
2013-03-26 Jakob Stoklund OlesenAnnotate the remaining x86 instructions with SchedRW...
2013-03-26 Jakob Stoklund OlesenAnnotate x87 and mmx instructions with SchedRW lists.
2013-03-26 Jakob Stoklund OlesenAnnotate control instructions with SchedRW lists.
2013-03-26 Jakob Stoklund OlesenAnnotate the rest of X86InstrInfo.td with SchedRW lists.
2013-03-26 Michael LiaoAdd PREFETCHW codegen support
2013-03-26 Jyotsna VermaHexagon: Use multiclass for aslh, asrh, sxtb, sxth...
2013-03-26 Jyotsna VermaHexagon: Remove HexagonMCInst.h file. It has been repla...
2013-03-26 Arnold SchwaighoferRevert ARM Scheduler Model: Add resources instructions...
2013-03-26 Benjamin KramerRemove default case from fully covered switch.
2013-03-26 Christian KonigR600/SI: improve post ISel folding
2013-03-26 Christian KonigR600/SI: improve vector interpolation
2013-03-26 Christian KonigR600/SI: avoid unecessary subreg extraction in IMAGE_SAMPLE
2013-03-26 Christian KonigR600/SI: switch back to RegPressure scheduling
2013-03-26 Christian KonigR600/SI: mark most intrinsics as readnone v2
2013-03-26 Christian KonigR600/SI: replace WQM intrinsic
2013-03-26 Christian KonigR600/SI: fix ELSE pseudo op handling
2013-03-26 Joe AbbeyPatch by Gordon Keiser!
2013-03-26 Ulrich WeigandPowerPC: Mark patterns as isCodeGenOnly.
2013-03-26 Ulrich WeigandPowerPC: Simplify handling of fixups.
2013-03-26 Ulrich WeigandPowerPC: Simplify FADD in round-to-zero mode.
2013-03-26 Ulrich WeigandPowerPC: Remove LDrs pattern.
2013-03-26 Ulrich WeigandPowerPC: Remove ADDIL patterns.
2013-03-26 Ulrich WeigandPowerPC: Use CCBITRC operand for ISEL patterns.
2013-03-26 Ulrich WeigandPowerPC: Simplify BLR pattern.
2013-03-26 Ulrich WeigandPowerPC: Move some 64-bit branch patterns.
2013-03-26 Christian KonigR600: fix DenseMap with pointer key iteration in the...
2013-03-26 Arnold SchwaighoferARM Scheduler Model: Add resources instructions, map...
2013-03-26 Arnold SchwaighoferARM Scheduler Model: Partial implementation of the...
2013-03-25 Michael LiaoRevise alignment checking/calculation on 256-bit unalig...
2013-03-25 Jakob Stoklund OlesenAdd a scheduling model for Intel Sandy Bridge microarch...
2013-03-25 Jakob Stoklund OlesenRemove IIC_DEFAULT from X86Schedule.td
2013-03-25 Jakob Stoklund OlesenAnnotate X86InstrCompiler.td with SchedRW lists.
2013-03-25 Jakob Stoklund OlesenAnnotate shifts and rotates with SchedRW lists.
2013-03-25 NAKAMURA TakumiX86DisassemblerDecoder.c: Make this C89-compliant.
2013-03-25 NAKAMURA TakumiWhitespace.
2013-03-25 Akira HatanakaFix comment.
2013-03-25 Ulrich WeigandUse direct types in PowerPC instruction patterns.
2013-03-25 Ulrich WeigandUse direct types in PowerPC Pat patterns.
2013-03-25 Dave Zarzyckix86 -- add the XTEST instruction
2013-03-25 Dave Zarzyckix86 -- disassemble the REP/REPNE prefix when needed
2013-03-25 Bill WendlingRemove assert. There may be target-dependent attributes...
2013-03-25 Chad Rosier[arm load/store optimizer] When trying to merge a base...
2013-03-24 Justin Holewinski[NVPTX] Fix handling of vector arguments
2013-03-24 Jakob Stoklund OlesenClean up Sparc patterns.
2013-03-24 Jakob Stoklund OlesenGive Sparc instruction patterns direct types instead...
2013-03-23 Hal FinkelPPC ZERO register needs a register number of 0.
2013-03-23 Hal FinkelNote in PPCFunctionInfo VRSAVE spills
2013-03-23 Hal FinkelMCize the bcl instruction in PPCAsmPrinter
2013-03-23 Jakob Stoklund OlesenUse direct types in Sparc def : Pat patterns.
2013-03-23 Hal FinkelCleanup some unused reg. scavenger parameters in PPCReg...
2013-03-23 Hal FinkelRemove dead PPC LR spilling code
2013-03-22 Hal FinkelAllow the register scavenger to spill multiple registers
2013-03-22 Jyotsna VermaHexagon: Add and enable memops setbit, clrbit, &,|...
2013-03-22 Ulrich WeigandRemove ABI-duplicated call instruction patterns.
2013-03-22 Ulrich WeigandRename memrr ptrreg and offreg components.
2013-03-22 Ulrich WeigandFix swapped BasePtr and Offset in pre-inc memory addresses.
2013-03-22 Ulrich WeigandTighten iaddroff ComplexPattern.
2013-03-22 Ulrich WeigandRemove the xaddroff ComplexPattern.
2013-03-22 Michel DanzerR600: Use legacy (0 * anything = 0) MUL instructions...
2013-03-22 Jack CarterFix the invalid opcode for Mips branch instructions...
2013-03-22 Jack CarterThis patch that enables the Mips assembler to use symbo...
2013-03-21 Hal FinkelRemove the G8RC_NOX0_and_GPRC_NOR0 PPC register class
2013-03-21 Hal FinkelFix a register-class comparison bug in PPCCTRLoops
2013-03-21 Jack CarterThis patch enables the Mips .set directive to define...
2013-03-21 Hal FinkelImplement builtin_{setjmp/longjmp} on PPC
2013-03-21 Hal FinkelAdd support for spilling VRSAVE on PPC
2013-03-21 Hal FinkelCorrect PPC FRAMEADDR lowering using a pseudo-register
2013-03-21 Renato GolinAvoid NEON SP-FP unless unsafe-math or Darwin
2013-03-21 Jakob Stoklund OlesenAdd a WriteMicrocoded for ancient microcoded instructions.
2013-03-20 Jakob Stoklund OlesenModel prefetches and barriers as loads.
2013-03-20 Jakob Stoklund OlesenAdd a catch-all WriteSystem SchedWrite type.
2013-03-20 Jakob Stoklund OlesenAnnotate the remaining SSE MOV instructions.
2013-03-20 Jakob Stoklund OlesenAnnotate SSE horizontal and integer instructions.
2013-03-20 Michael LiaoCorrect cost model for vector shift on AVX2
2013-03-20 Jakob Stoklund OlesenAdd some missing SSE annotations.
2013-03-20 Jakob Stoklund OlesenAnnotate remaining IIC_BIN_* instructions.
2013-03-20 Michael LiaoFix PR15296
2013-03-20 Michael LiaoMark all variable shifts needing customizing
2013-03-20 Michael LiaoMove scalar immediate shift lowering into a dedicated...
2013-03-19 Chad RosierFix pr13145 - Naming a function like a register name...
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