Use ArrayRef.
[oota-llvm.git] / lib / Target /
2011-08-12 Akira HatanakaWhen constant double 0.0 is lowered, make sure 0 is...
2011-08-12 Chris Lattnerswitch to the new struct apis.
2011-08-12 Owen AndersonSeparate decoding for STREXD and LDREXD to make each...
2011-08-12 Duncan SandsSilence a bunch (but not all) "variable written but...
2011-08-12 Andrew TrickfindDeadCallerSavedReg fix: Missing NULL terminator...
2011-08-11 Jim GrosbachARM vector compare to zero instruction assembly parsing...
2011-08-11 Akira HatanakaEnclose directive .cprestore with .set macro and nomacr...
2011-08-11 Jim GrosbachRemove no-longer-true comments. These are for the assem...
2011-08-11 Jim GrosbachARM STRT assembly parsing and encoding.
2011-08-11 Owen AndersonMake the USAT16 operand decoder auto-generate-able.
2011-08-11 Owen AndersonAdd another accidentally omitted predicate operand.
2011-08-11 Owen AndersonAdd missing predicate operand on SMLA and friends.
2011-08-11 Jim GrosbachARM load shifted register pre-index fix shift value...
2011-08-11 Owen AndersonHandle new register classes in Thumb2 mode. Should...
2011-08-11 Owen AndersonMaking SEL decodings auto-generate-able.
2011-08-11 Bruno Cardoso LopesAdd a dag combine to xform 256-bit shuffles into simple...
2011-08-11 Jim GrosbachTidy up comment.
2011-08-11 Owen AndersonFix decoding support for STREXD and LDREXD.
2011-08-11 Jim GrosbachARM STRH assembly parsing and encoding.
2011-08-11 Akira HatanakaAdd isIndirectBranch flag.
2011-08-11 Owen AndersonFix decoding for indexed STRB and LDRB. Fixes <rdar...
2011-08-11 Jim GrosbachTidy up. Remove unused template parameter.
2011-08-11 Owen AndersonImprove operand validation for Thumb2 addressing modes.
2011-08-11 Jim GrosbachARM STRD assembly parsing and encoding.
2011-08-11 Owen AndersonContinue to tighten decoding by performing more operand...
2011-08-11 Jim GrosbachTidy up.
2011-08-11 Jim GrosbachARM STRBT assembly parsing and encoding.
2011-08-11 Jim GrosbachARM STR(immediate) assembly parsing and encoding.
2011-08-11 Owen AndersonTighten decoding of addrmode2 instructions to reject...
2011-08-11 Bruno Cardoso LopesFix PR10492 by teaching MOVHLPS and MOVLPS mask matchin...
2011-08-11 Owen AndersonTighten operand decoding of addrmode2 instruction....
2011-08-11 Owen AndersonCorrect immediate range for shifter operands. Patch...
2011-08-11 Owen AndersonImprove error checking in the new ARM disassembler...
2011-08-11 Jim GrosbachARM push of a single register encodes as pre-indexed...
2011-08-11 Jim GrosbachARM pop of a single register encodes as post-indexed...
2011-08-11 Nadav RotemAdd a comment, per Bruno's CR.
2011-08-11 Nadav Rotem[AVX] If the data which is going to be saved is already...
2011-08-11 Bruno Cardoso LopesCleanup: Remove Int_ CVTSS2SI* forms
2011-08-11 Bruno Cardoso LopesSplats for v8i32/v8f32 can be handled by VPERMILPSY...
2011-08-11 Bruno Cardoso LopesUse the splat index to generate the desired shuffle...
2011-08-11 Eli FriedmanFix X86TargetLowering::LowerExternalSymbol so that...
2011-08-10 Jim GrosbachARM LDRT assembly parsing and encoding.
2011-08-10 Jim GrosbachTidy up. 80 columns.
2011-08-10 Jim GrosbachARM LDRH(immediate) assembly parsing and encoding support.
2011-08-10 Jim GrosbachARM LDRD(register) assembly parsing and encoding.
2011-08-10 Jim GrosbachFix typo. Not quite sure how that slipped in there.
2011-08-10 Jim GrosbachARM LDRD(immediate) assembly parsing and encoding support.
2011-08-10 Nadav RotemWhen performing a truncating store, it is sometimes...
2011-08-10 Owen AndersonAdd initial support for decoding NEON instructions...
2011-08-10 Bruno Cardoso LopesThe following X86 pattern is incorrect:
2011-08-10 Owen AndersonTabs --> spaces.
2011-08-10 Owen AndersonCleanups based on Nick Lewycky's feedback.
2011-08-10 Owen AndersonRewrite some ARM InstrInfo functions to be most accepti...
2011-08-10 Rafael EspindolaAdd support for the R and Q constraints.
2011-08-10 Bruno Cardoso LopesFix a bug in vpermilps mask checking. Fix PR10560
2011-08-10 Owen AndersonPush GPRnopc through a large number of instruction...
2011-08-09 Jakob Stoklund OlesenPromote VMOVS to VMOVD when possible.
2011-08-09 Owen AndersonTighten operand checking of register-shifted-register...
2011-08-09 Bruno Cardoso LopesAdd 256-bit support for v8i32, v4i64 and v4f64 ISD...
2011-08-09 Owen AndersonTighten operand checking on memory barrier instructions.
2011-08-09 Owen AndersonTighten operand checking on CPS instructions.
2011-08-09 Owen AndersonCreate a new register class for the set of all GPRs...
2011-08-09 Bruno Cardoso LopesAdd v16i16 and v32i8 store patterns
2011-08-09 Bruno Cardoso LopesUse fp unpack instructions to unpack int types. Until...
2011-08-09 Eli FriedmanFix a couple ridiculous copy-paste errors. rdar:/...
2011-08-09 Benjamin KramerARM Disassembler: sign extend branch immediates.
2011-08-09 Owen AndersonSilence an false-positive warning.
2011-08-09 Owen AndersonDon't generate the old-style disassembler in CMake...
2011-08-09 Benjamin KramerThe new ARM disassembler disassembles "bx lr" as a...
2011-08-09 Owen AndersonDon't continue generating the old-style decoder file.
2011-08-09 Jim GrosbachARM fix typo in pre-indexed store lowering.
2011-08-09 Owen AndersonAttempt to fix CMake build.
2011-08-09 Owen AndersonTighten Thumb1 branch predicate decoding.
2011-08-09 Owen AndersonReplace the existing ARM disassembler with a new one...
2011-08-09 Bill WendlingRevert r137134. It breaks some code as Eli pointed...
2011-08-09 Bill WendlingPrint out the variable declaration only if it is a...
2011-08-09 Bruno Cardoso LopesReapply a more appropriate solution than in r137114...
2011-08-09 Bruno Cardoso LopesRevert r137114
2011-08-09 Justin HolewinskiPTX: Add initial support for device function calls
2011-08-09 Renato GolinEmitting ARM build attributes and values as ULEB, rathe...
2011-08-09 Bruno Cardoso LopesHandle sitofp between v4f64 <- v4i32. Fix PR10559
2011-08-09 Bruno Cardoso LopesAdd support for avx vector fextend
2011-08-09 Bruno Cardoso LopesAdd AVX versions of 128-bit sitofp and fptosi
2011-08-09 Bruno Cardoso LopesAdd two patterns to match special vmovss and vmovsd...
2011-08-09 Bill WendlingAdd missing attributes to the C++ backend's output.
2011-08-09 Bruno Cardoso LopesMake LowerVSETCC aware of AVX types and add patterns...
2011-08-08 Jim GrosbachARM parsing and encoding for LDRBT instruction.
2011-08-08 Owen AndersonThumb1 BL instructions encoding 22 bits of displacement...
2011-08-08 Jakob Stoklund OlesenImplement isLoadFromStackSlotPostFE and isStoreToStackS...
2011-08-08 Bruno Cardoso LopesAdd support for several vector shifts operations while...
2011-08-08 Jim GrosbachARM load/store label parsing.
2011-08-08 Jakob Stoklund OlesenHoist hasLoadFromStackSlot and hasStoreToStackSlot.
2011-08-08 Owen AndersonFix encodings for Thumb ASR and LSR immediate operands...
2011-08-08 Eli FriedmanFix up the patterns for SXTB, SXTH, UXTB, and UXTH...
2011-08-08 Benjamin KramerAdd MCInstrAnalysis class. This allows the targets...
2011-08-08 Jakob Stoklund OlesenDon't clobber pending ST regs when FP regs are killed.
2011-08-05 Jim GrosbachARM load instruction shifted register index operands.
2011-08-05 Jim GrosbachARM indexed load assembly parsing and encoding.
2011-08-05 Jim GrosbachARM refactor indexed store instructions.
2011-08-05 Jim GrosbachARM simplify the postidx_reg operand encoding.
next