If a global variable has a specified alignment that is less than the preferred
[oota-llvm.git] / lib / Target /
2011-04-13 Cameron ZwarichIf a global variable has a specified alignment that...
2011-04-13 Bill WendlingReapply r129401 with patch for clang.
2011-04-12 Johnny ChenAdd sanity check for Ld/St Dual forms of Thumb2 instruc...
2011-04-12 Jakob Stoklund OlesenAdd @earlyclobber constraints to the writeback register...
2011-04-12 Bill WendlingRevert r129401 for now. Clang is using the old way...
2011-04-12 Bill WendlingRemove the unaligned load intrinsics in favor of using...
2011-04-12 Johnny ChenThe Thumb2 RFE instructions need to have their second...
2011-04-12 Johnny ChenAdd bad register checks for Thumb2 Ld/St instructions.
2011-04-12 Johnny ChenThe Thumb2 Ld, St, and Preload instructions with the...
2011-04-12 Johnny ChenPrint out a debug message when the reglist fails the...
2011-04-12 Cameron ZwarichSplit a store of a VMOVDRR into two integer stores...
2011-04-12 Johnny ChenA8.6.16 B
2011-04-11 Johnny ChenThumb disassembler was erroneously rejecting "blx sp...
2011-04-11 Wesley PeckFix an error in the MBlaze delay slot filler.
2011-04-11 Wesley PeckAdd scheduling information for the MBlaze backend.
2011-04-11 Wesley PeckDon't crash on invalid instructions when disassembling...
2011-04-11 Johnny ChenFix the bug where the immediate shift amount for Thumb...
2011-04-11 Owen AndersonFix another using-CPSR-twice bug in my ADCS/SBCS cleanu...
2011-04-11 Johnny ChenTrivial comment fix.
2011-04-11 Johnny ChenCheck invalid register encodings for LdFrm/StFrm ARM...
2011-04-11 Kevin EnderbyAdding support for printing operands symbolically to...
2011-04-11 Jay FoadDon't include Operator.h from InstrTypes.h.
2011-04-10 Nicolas GeoffrayBugfix in the Cpp backend after API change on PHINode...
2011-04-09 Chris Lattnerfix rdar://8735979 - "int 3" doesn't match to "int3...
2011-04-08 Matt Beaumont-GayFix an apparent typo that made GCC complain
2011-04-08 Evan ChengChange -arm-trap-func= into a non-arm specific option...
2011-04-08 Johnny ChenCheck opcoe (dmb, dsb) instead of bitfields matching.
2011-04-08 Johnny ChenHanlde the checking of bad regs for SMMLAR properly...
2011-04-08 Johnny ChenSanity check the option operand for DMB/DSB.
2011-04-08 Jim GrosbachMark hasExtraDefRegAllocReq=1 on LDRD.
2011-04-08 Johnny ChenAdd sanity checking for bad register specifier(s) for...
2011-04-07 Bill WendlingReplace the old algorithm that emitted the "print the...
2011-04-07 Evan ChengAdd option to emit @llvm.trap as a function call instea...
2011-04-07 Akira HatanakaFix indentation.
2011-04-07 Akira HatanakaUpdate ATUsed every time after expandRegLargeImmPair...
2011-04-07 Mon P WangFixed encoding for VEXTqf
2011-04-07 Akira HatanakaFix handling of functions with internal linkage.
2011-04-07 Johnny ChenAdd sanity checking for invalid register encodings...
2011-04-07 Johnny ChenAdd sanity checking for invalid register encodings...
2011-04-07 Johnny ChenAdd some more comments about checkings of invalid regis...
2011-04-07 Tanya LattnerPrevent ARM DAG Combiner from doing an AND or OR combin...
2011-04-07 Johnny ChenSanity check MSRi for invalid mask values and reject...
2011-04-07 Johnny ChenThe ARM disassembler was not recognizing USADA8 instruc...
2011-04-07 Evan ChengChange -arm-divmod-libcall to a target neutral option.
2011-04-07 Johnny ChenShould also check SMLAD for invalid register values.
2011-04-06 Owen AndersonTeach the ARM peephole optimizer that RSB, RSC, ADC...
2011-04-06 Owen AndersonCleanups from Jim: remove redundant constraints and...
2011-04-06 Jim GrosbachTidy up.
2011-04-06 Johnny ChenA8.6.393
2011-04-06 Johnny ChenA8.6.92 MCR (Encoding A1): if coproc == '101x' then...
2011-04-06 Johnny ChenFix a bug in the disassembly of VGETLNs8 where the...
2011-04-06 Rafael EspindolaAdd another case we are not optimizing.
2011-04-06 Rafael EspindolaThe original issue has been fixed by not doing unnecess...
2011-04-06 Johnny ChenAdd a missing opcode (SMLSLDX) to BadRegsMulFrm() function.
2011-04-05 Owen AndersonReapply r128946 (pseudoization of various instructions...
2011-04-05 Johnny ChenFix a typo in the handling of PKHTB opcode, plus add...
2011-04-05 Bob WilsonClean up some code for clarity.
2011-04-05 Owen AndersonRevert r128946 while I figure out why it broke the...
2011-04-05 Johnny ChenA7.3 register encoding
2011-04-05 Owen AndersonGive RSBS and RSCS the pseudo treatment.
2011-04-05 Johnny ChenARM disassembler was erroneously accepting an invalid...
2011-04-05 Johnny ChenARM disassembler was erroneously accepting an invalid...
2011-04-05 Owen AndersonFix bugs in the pseuo-ization of ADCS/SBCS pointed...
2011-04-05 Johnny ChenThe r128085 checkin modified the operand ordering for...
2011-04-05 Johnny ChenARM disassembler should flag (rGPRRegClassID, r13|r15...
2011-04-05 Jim GrosbachMake second source operand of LDRD pre/post explicit.
2011-04-05 Johnny ChenConstants with multiple encodings (ARM):
2011-04-05 Johnny ChenCheck for invalid register encodings for UMAAL and...
2011-04-05 Owen AndersonConvert ADCS and SBCS instructions into pseudos that...
2011-04-05 Bill WendlingRevamp the SjLj "dispatch setup" intrinsic.
2011-04-05 Eric ChristopherJust use BL all the time. It's safer that way.
2011-04-05 Johnny ChenFix SRS/SRSW encoding bits.
2011-04-04 Johnny ChenA8.6.105 MUL
2011-04-04 Johnny ChenRFE encoding should also specify the "should be" encodi...
2011-04-04 Joerg SonnenbergerMake OpcodeMask an unsigned long long literal to deal...
2011-04-04 Johnny ChenFix incorrect alignment for NEON VST2b32_UPD.
2011-04-04 Jakob Stoklund OlesenInsert code in the right location when lowering PowerPC...
2011-04-04 Bruno Cardoso Lopes- Implement asm parsing support for LDRSBT, LDRHT,...
2011-04-04 Akira HatanakaMove transformation of JmpLink and related nodes done...
2011-04-04 Jakob Stoklund OlesenPowerPC atomic pseudos clobber CR0, they don't read it.
2011-04-04 Jakob Stoklund OlesenUse X0 instead of R0 for the zero register on ppc64.
2011-04-04 Joerg SonnenbergerAdd support for the VIA PadLock instructions.
2011-04-04 Joerg SonnenbergerExpand Op0Mask by one bit in preparation for the PadLoc...
2011-04-04 Jay FoadRemove some support for ReturnInsts with multiple opera...
2011-04-02 Che-Liang Chiouptx: support setp's 4-operand format
2011-04-02 Cameron ZwarichDo some peephole optimizations to remove pointless...
2011-04-02 Johnny ChenFixed a bug in disassembly of STR_POST, where the immed...
2011-04-02 Akira HatanakaUndo changes mistakenly made in revision 128750.
2011-04-02 Akira HatanakaInsert space before ';' to prevent warnings.
2011-04-01 Johnny ChenFixed MOVr for "should be" encoding bits for Inst{19...
2011-04-01 Johnny ChenMOVs should have Inst{19-16} as 0b0000, otherwise,...
2011-04-01 Johnny ChenFix the instruction table entries for AI1_adde_sube_s_i...
2011-04-01 Evan ChengAvoid de-referencing pass beginning of a basic block...
2011-04-01 Akira HatanakaRemove redundant code. There are assignments to variabl...
2011-04-01 Akira HatanakaSimplifies logic for printing target flags.
2011-04-01 Owen AndersonWhen the architecture is explicitly armv6 or thumbv6...
2011-04-01 Jim GrosbachLDRD/STRD instructions should print both Rt and Rt2...
2011-04-01 Johnny ChenFix a LDRT/LDRBT decoding bug where for Encoding A2...
2011-04-01 Akira HatanakaModifies MipsAsmPrinter::isBlockOnlyReachableByFallthro...
2011-04-01 Johnny ChenFix LDRi12 immediate operand, which was changed to...
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