Add ARM cortex-r5 subtarget.
[oota-llvm.git] / lib / Target /
2012-12-21 Quentin ColombetAdd ARM cortex-r5 subtarget.
2012-12-21 Nadav RotemImprove the X86 cost model for loads and stores.
2012-12-21 Nadav RotemBB-Vectorizer: Check the cost of the store pointer...
2012-12-21 Reed KotlerCall llvm_unreachable instead of assert.
2012-12-20 Jakob Stoklund OlesenAdd an MF argument to MI::copyImplicitOps().
2012-12-20 Jakob Stoklund OlesenMachineInstrBuilderize ARM.
2012-12-20 Jakob Stoklund OlesenMachineInstrBuilderize NVPTX.
2012-12-20 Bob WilsonRevert "Adding support for llvm.arm.neon.vaddl[su]...
2012-12-20 Evan ChengOn some ARM cpus, flags setting movs with shifter opera...
2012-12-20 Roman DivackyRemove MCTargetAsmLexer and its derived classes now...
2012-12-20 Renato GolinAdding support for llvm.arm.neon.vaddl[su].* and
2012-12-20 Reed KotlerImplement cfi_def_cfa_offset. "Make check" test case...
2012-12-20 Reed KotlerThere is one more patch to finish large frames. Make...
2012-12-20 Jyotsna VermaAdd constant extender support to GP-relative load/store...
2012-12-20 Jyotsna VermaAdd TSFlags to ALU32 type instructions for constant...
2012-12-20 Reed Kotlerset register class properly for mips16 here
2012-12-20 Rafael EspindolaUndefine PPC harder.
2012-12-20 Reed KotlerThis assert is overly restrictive and does not work...
2012-12-20 Reed KotlerTurn on register scavenger for Mips 16
2012-12-20 Akira Hatanaka[mips] Refactor SLT (set on less than) instructions...
2012-12-20 Akira Hatanaka[mips] Refactor unconditional branch instruction. Separ...
2012-12-20 Akira Hatanaka[mips] Remove asm string parameter from pseudo instruct...
2012-12-20 Akira Hatanaka[mips] Delete definition of CPRESTORE instruction.
2012-12-20 Akira Hatanaka[mips] Refactor conditional branch instructions with...
2012-12-20 Akira Hatanaka[mips] Refactor conditional branch instructions with...
2012-12-20 Reed Kotlerfix most of remaining issues with large frames.
2012-12-20 Akira Hatanaka[mips] Use "or $r0, $r1, $zero" instead of "addu $r0...
2012-12-20 Richard SmithFix use-before-construction of X86TargetLowering.
2012-12-20 Akira Hatanaka[mips] Change the order of template parameters. Move...
2012-12-20 Akira Hatanaka[mips] Refactor shift instructions with register operan...
2012-12-20 Akira Hatanaka[mips] Refactor shift immediate instructions. Separate...
2012-12-20 Akira Hatanaka[mips] Refactor arithmetic and logic instructions with...
2012-12-20 Akira Hatanaka[mips] Refactor arithmetic and logic instructions....
2012-12-20 Akira Hatanaka[mips] Delete ArithOverflowR and ArithOverflow and...
2012-12-20 NAKAMURA TakumiTarget/R600: Update MIB according to r170588.
2012-12-19 Jim GrosbachMC: Add MCInstrDesc::mayAffectControlFlow() method.
2012-12-19 Tom StellardR600: Remove unecessary VREG alignment.
2012-12-19 Tom StellardR600: control flow optimization
2012-12-19 Tom StellardR600: New control flow for SI v2
2012-12-19 Jakob Stoklund OlesenRemove the explicit MachineInstrBuilder(MI) constructor.
2012-12-19 Evan ChengLLVM sdisel normalize bit extraction of the form:
2012-12-19 Roman DivackyRemove edis - the enhanced disassembler. Fixes PR14654.
2012-12-19 Paul RedmondTransform (x&C)>V into (x&C)!=0 where possible
2012-12-19 Benjamin KramerPowerPC: Expand VSELECT nodes.
2012-12-19 Patrik HagglundChange TargetLowering::getTypeForExtArgOrReturn to...
2012-12-19 Patrik HagglundChange TargetLowering::RegisterTypeForVT to contain...
2012-12-19 Patrik HagglundChange TargetLowering::findRepresentativeClass to take...
2012-12-19 NAKAMURA TakumiX86ISelLowering.cpp: Fix warnings. [-Wlogical-op-parent...
2012-12-19 Elena DemikhovskyOptimized load + SIGN_EXTEND patterns in the X86 backend.
2012-12-19 Bill WendlingRename the 'Attributes' class to 'Attribute'. It's...
2012-12-19 Reed KotlerAdd some missing Defs and Uses.
2012-12-18 Jakub StaszakReverse order of checking SSE level when calculating...
2012-12-18 Quentin ColombetDisable ARM partial flag dependency optimization at -Oz
2012-12-18 Eli BenderskyGet rid of the pesky -Woverloaded-virtual warning....
2012-12-18 Jakob Stoklund OlesenRepair bundles that were broken by removing and reinser...
2012-12-18 Jakob Stoklund OlesenExtract a method, no functional change intended.
2012-12-17 Chad Rosier[arm fast-isel] Minor cleanup. No functional change...
2012-12-17 Chad Rosier[arm fast-isel] Fast-isel only handles simple VTs,...
2012-12-17 Richard OsborneAdd instruction encodings / disassembly support for...
2012-12-17 Tom StellardR600: enable S_*N2_* instructions
2012-12-17 Tom StellardR600: BB operand support for SI
2012-12-17 Tom StellardR600: remove nonsense setPrefLoopAlignment
2012-12-17 Patrik HagglundRevert/correct some FastISel changes in r170104 (EVT...
2012-12-17 Richard OsborneAdd instruction encodings for PEEK and ENDIN.
2012-12-17 Richard OsborneFix parameter name in prototypes in XCoreDisassembler.
2012-12-17 Richard OsborneAdd instruction encodings / disassembly support for...
2012-12-17 Richard OsborneAdd instruction encodings for ZEXT and SEXT.
2012-12-17 Richard OsborneAdd instruction encodings / disassembly support for...
2012-12-17 Richard OsborneAdd instruction encodings / disassembly support for...
2012-12-17 Richard OsborneSimplify assertion in XCoreInstPrinter.
2012-12-17 Richard OsborneUpdate comments to match recommended doxygen style.
2012-12-17 Richard OsborneRemove unnecessary include.
2012-12-17 Craig TopperRemove EFLAGS from the BLSI/BLSMSK/BLSR patterns. The...
2012-12-17 Craig TopperSimplify BMI ANDN matching to use patterns instead...
2012-12-17 Craig TopperAdd rest of BMI/BMI2 instructions to the folding tables...
2012-12-17 Craig TopperRemove store forms of DEC/INC from isDefConvertible...
2012-12-16 Richard OsborneAdd instruction encodings and disassembly for 1r instru...
2012-12-16 Richard OsborneAdd XCore disassembler.
2012-12-16 Richard OsborneRemove invalid instruction encodings.
2012-12-16 Richard OsborneMark anything deriving from PseudoInstXCore as a pseudo...
2012-12-16 Richard OsborneSet instruction size correctly in XCoreInstrFormats.td
2012-12-16 Richard OsborneChange XCoreAsmPrinter to lower MachineInstrs to MCInst...
2012-12-16 Richard OsborneReplace ${:comment} with the comment symbol.
2012-12-16 Reed KotlerThis patch is needed to make c++ exceptions work for...
2012-12-15 Benjamin KramerX86: Add a couple of target-specific dag combines that...
2012-12-15 Chandler CarruthMake '-mtune=x86_64' assume fast unaligned memory accesses.
2012-12-15 Reed KotlerThis code implements most of mips16 hardfloat as it...
2012-12-14 Kevin EnderbyMake sure the alternate PC+imm syntax of LDR instructio...
2012-12-14 Nadav RotemTypeLegalizer: Do not generate target specific nodes...
2012-12-14 Bill SchmidtThis patch removes some nondeterminism from direct...
2012-12-14 Bill SchmidtThis patch improves the 64-bit PowerPC InitialExec...
2012-12-13 Shuxin YangRemove two popcount patterns which we are already able...
2012-12-13 Bill SchmidtThis is another cleanup patch for 64-bit PowerPC TLS...
2012-12-13 Tom StellardFix warnings with -DNDEBUG
2012-12-13 Bill SchmidtThis is just a clean-up patch that simplifies the initi...
2012-12-13 Patrik HagglundChange TargetLowering::getRegClassFor to take an MVT...
2012-12-13 Akira Hatanaka[mips] Do not copy GOT address to register $gp if the...
2012-12-13 Eric ChristopherAdd a way of printing out an arbitrary label name for...
2012-12-13 Akira Hatanaka[mips] Delete all floating point instruction classes...
2012-12-13 Akira Hatanaka[mips] Modify definitions of floating point conditional...
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