2013-06-05 |
Bill Wendling | Add space to assert message. |
tree | commitdiff |
2013-06-05 |
Sean Silva | Add writeAsBinary(raw_ostream &) method to BinaryRef. |
tree | commitdiff |
2013-06-05 |
Vincent Lejeune | R600: Add a pass that merge Vector Register |
tree | commitdiff |
2013-06-05 |
Vincent Lejeune | R600: Schedule copy from phys register at beginning... |
tree | commitdiff |
2013-06-05 |
Akira Hatanaka | [mips] brcond + setgt/setugt instruction selection... |
tree | commitdiff |
2013-06-05 |
Jakub Staszak | Use IRBuilder instead of ConstantInt methods. It simpli... |
tree | commitdiff |
2013-06-05 |
Michael Liao | [PATCH] Fix VGATHER* operand constraints |
tree | commitdiff |
2013-06-05 |
Arnold Schwaighofer | ARM sched model: Add more ALU and CMP instructions |
tree | commitdiff |
2013-06-05 |
Arnold Schwaighofer | ARM sched model: Add divsion, loads, branches, vfp cvt |
tree | commitdiff |
2013-06-05 |
Arnold Schwaighofer | ARMInstrInfo: Improve isSwiftFastImmShift |
tree | commitdiff |
2013-06-05 |
Mihai Popa | This is a simple patch that changes RRX and RRXS to... |
tree | commitdiff |
2013-06-05 |
David Blaikie | PR15662: Optimized debug info produces out of order... |
tree | commitdiff |
2013-06-05 |
Tom Stellard | R600: Make sure to schedule AR register uses and defs... |
tree | commitdiff |
2013-06-05 |
Rafael Espindola | Don't print default values for NumberOfAuxSymbols and... |
tree | commitdiff |
2013-06-05 |
Rafael Espindola | Handle (at least don't crash on) relocations with no... |
tree | commitdiff |
2013-06-05 |
Rafael Espindola | Move BinaryRef to a new include/llvm/Object/YAML.h... |
tree | commitdiff |
2013-06-05 |
Rafael Espindola | Revert "R600: Add a pass that merge Vector Register" |
tree | commitdiff |
2013-06-05 |
Rafael Espindola | Handle relocations that don't point to symbols. |
tree | commitdiff |
2013-06-04 |
Vincent Lejeune | R600: Add a pass that merge Vector Register |
tree | commitdiff |
2013-06-04 |
Vincent Lejeune | R600: Const/Neg/Abs can be folded to dot4 |
tree | commitdiff |
2013-06-04 |
Evan Cheng | Cortex-R5 can issue Thumb2 integer division instructions. |
tree | commitdiff |
2013-06-04 |
Arnold Schwaighofer | Revert series of sched model patches until I figure... |
tree | commitdiff |
2013-06-04 |
Arnold Schwaighofer | ARM sched model: Add VFP div instruction on Swift |
tree | commitdiff |
2013-06-04 |
Arnold Schwaighofer | ARM sched model: Add SIMD/VFP load/store instructions... |
tree | commitdiff |
2013-06-04 |
Arnold Schwaighofer | ARM sched model: Add integer VFP/SIMD instructions... |
tree | commitdiff |
2013-06-04 |
Arnold Schwaighofer | ARM sched model: Add integer load/store instructions... |
tree | commitdiff |
2013-06-04 |
Arnold Schwaighofer | ARM sched model: Add integer arithmetic instructions... |
tree | commitdiff |
2013-06-04 |
Arnold Schwaighofer | ARM sched model: Cortex A9 - More InstRW sched resources |
tree | commitdiff |
2013-06-04 |
Arnold Schwaighofer | ARM sched model: Add branch thumb instructions |
tree | commitdiff |
2013-06-04 |
Arnold Schwaighofer | ARM sched model: Add branch thumb2 instructions |
tree | commitdiff |
2013-06-04 |
Arnold Schwaighofer | ARM sched model: Add branch instructions |
tree | commitdiff |
2013-06-04 |
Arnold Schwaighofer | ARM sched model: Add preload thumb2 instructions |
tree | commitdiff |
2013-06-04 |
Arnold Schwaighofer | ARM sched model: Add preload instructions |
tree | commitdiff |
2013-06-04 |
Arnold Schwaighofer | ARM sched model: Add more ALU and CMP thumb instructions |
tree | commitdiff |
2013-06-04 |
Arnold Schwaighofer | ARM sched model: Add more ALU and CMP thumb2 instructions |
tree | commitdiff |
2013-06-04 |
Arnold Schwaighofer | ARM sched model: Add more ALU and CMP instructions |
tree | commitdiff |
2013-06-04 |
Arnold Schwaighofer | ARM sched model: Add divsion, loads, branches, vfp cvt |
tree | commitdiff |
2013-06-04 |
Arnold Schwaighofer | ARMInstrInfo: Improve isSwiftFastImmShift |
tree | commitdiff |
2013-06-04 |
Venkatraman Govind... | Sparc: No functionality change. Cleanup whitespaces... |
tree | commitdiff |
2013-06-04 |
David Majnemer | IndVarSimplify: check if loop invariant expansion can... |
tree | commitdiff |
2013-06-04 |
David Majnemer | ARM: Fix crash in ARM backend inside of ARMConstantIsla... |
tree | commitdiff |
2013-06-04 |
Vincent Lejeune | R600: Swizzle texture/export instructions |
tree | commitdiff |
2013-06-04 |
Rafael Espindola | Second part of pr16069 |
tree | commitdiff |
2013-06-04 |
Hans Wennborg | Typo: s/caes/cases/ in SimplifyCFG |
tree | commitdiff |
2013-06-04 |
Benjamin Kramer | Preserve const correctness. |
tree | commitdiff |
2013-06-04 |
Vladimir Medic | Test commit for user vmedic, to verify commit access... |
tree | commitdiff |
2013-06-04 |
Aaron Ballman | Silencing an MSVC warning about mixing bool and unsigne... |
tree | commitdiff |
2013-06-04 |
Aaron Ballman | Silencing an MSVC warning about */ being found outside... |
tree | commitdiff |
2013-06-04 |
Shuxin Yang | Fix a defect in code-layout pass, improving Benchmarks... |
tree | commitdiff |
2013-06-03 |
Nick Lewycky | Delete dead safety check. |
tree | commitdiff |
2013-06-03 |
David Majnemer | SimplifyCFG: Do not transform PHI to select if doing... |
tree | commitdiff |
2013-06-03 |
David Majnemer | SimplifyCFG: Small cleanup, use ICmpInst::isEquality() |
tree | commitdiff |
2013-06-03 |
Rafael Espindola | Update RuntimeDyldELF::findOPDEntrySection the new... |
tree | commitdiff |
2013-06-03 |
Tom Stellard | R600/SI: Add support for work item and work group intri... |
tree | commitdiff |
2013-06-03 |
Tom Stellard | R600/SI: Add a calling convention for compute shaders |
tree | commitdiff |
2013-06-03 |
Tom Stellard | R600/SI: Custom lower i64 sign_extend |
tree | commitdiff |
2013-06-03 |
Tom Stellard | R600/SI: Adjust some instructions' out register class... |
tree | commitdiff |
2013-06-03 |
Tom Stellard | R600/SI: Handle REG_SEQUENCE in fitsRegClass() |
tree | commitdiff |
2013-06-03 |
Tom Stellard | R600/SI: Handle nodes with glue results correctly SITar... |
tree | commitdiff |
2013-06-03 |
Tom Stellard | R600/SI: Fixup CopyToReg register class in PostprocessI... |
tree | commitdiff |
2013-06-03 |
Tom Stellard | R600/SI: Add support for global loads |
tree | commitdiff |
2013-06-03 |
Tom Stellard | R600/SI: Rework MUBUF store instructions |
tree | commitdiff |
2013-06-03 |
Vincent Lejeune | R600: 3 op instructions have no write bit but the resul... |
tree | commitdiff |
2013-06-03 |
Vincent Lejeune | R600: CALL_FS consumes a stack size entry |
tree | commitdiff |
2013-06-03 |
Vincent Lejeune | R600: use capital letter for PV channel |
tree | commitdiff |
2013-06-03 |
Vincent Lejeune | R600: Constraints input regs of interp_xy,_zw |
tree | commitdiff |
2013-06-03 |
Kostya Serebryany | [asan] ASan Linux MIPS32 support (llvm part), patch... |
tree | commitdiff |
2013-06-03 |
Ahmed Bougacha | X86: sub_xmm registers are 128 bits wide. |
tree | commitdiff |
2013-06-03 |
Manuel Klimek | Introduce needsCleanup() for APFloat and APInt. |
tree | commitdiff |
2013-06-03 |
Venkatraman Govind... | Sparc: Add support for indirect branch and blockaddress... |
tree | commitdiff |
2013-06-03 |
Rui Ueyama | [Object/COFF] Fix Windows .lib name handling. |
tree | commitdiff |
2013-06-03 |
Venkatraman Govind... | Sparc: When storing 0, use %g0 directly in the store... |
tree | commitdiff |
2013-06-02 |
Venkatraman Govind... | Sparc: Combine add/or/sethi instruction with restore... |
tree | commitdiff |
2013-06-02 |
Venkatraman Govind... | Sparc: Perform leaf procedure optimization by default |
tree | commitdiff |
2013-06-01 |
Nick Lewycky | When determining the new index for an insertelement... |
tree | commitdiff |
2013-06-01 |
Venkatraman Govind... | Sparc: Mark functions calling llvm.vastart and llvm... |
tree | commitdiff |
2013-06-01 |
David Majnemer | SimplifyCFG: Fix typo in comment for ComputeSpeculationCost |
tree | commitdiff |
2013-06-01 |
Benjamin Kramer | Move getRealLinkageName to a common place and remove... |
tree | commitdiff |
2013-06-01 |
Benjamin Kramer | Move object construction into [] so the temporary can... |
tree | commitdiff |
2013-06-01 |
Benjamin Kramer | APInt: Simplify code. No functionality change. |
tree | commitdiff |
2013-06-01 |
Benjamin Kramer | APFloat: Use isDenormal instead of hand-rolled code... |
tree | commitdiff |
2013-06-01 |
Tim Northover | Revert r183069: "TMP: LEA64_32r fixing" |
tree | commitdiff |
2013-06-01 |
Tim Northover | TMP: LEA64_32r fixing |
tree | commitdiff |
2013-06-01 |
Tim Northover | X86: change MOV64ri64i32 into MOV32ri64 |
tree | commitdiff |
2013-06-01 |
Venkatraman Govind... | [Sparc] Generate correct code for leaf functions with... |
tree | commitdiff |
2013-05-31 |
Ahmed Bougacha | Make SubRegIndex size mandatory, following r183020. |
tree | commitdiff |
2013-05-31 |
Andrew Trick | Prevent loop-unroll from making assumptions about undef... |
tree | commitdiff |
2013-05-31 |
Eric Christopher | Temporarily Revert "X86: change MOV64ri64i32 into MOV32... |
tree | commitdiff |
2013-05-31 |
Eric Christopher | Const-ify some printing and dumping code for DIEValues. |
tree | commitdiff |
2013-05-31 |
Eric Christopher | Add support for adding the contents of a StringRef... |
tree | commitdiff |
2013-05-31 |
Eric Christopher | Convert more unsigned char -> uint8_t. |
tree | commitdiff |
2013-05-31 |
Eric Christopher | Fix comment. |
tree | commitdiff |
2013-05-31 |
Eric Christopher | Move "unsigned char" -> "uint8_t". |
tree | commitdiff |
2013-05-31 |
Arnold Schwaighofer | LoopVectorize: Change API call to get the backedge... |
tree | commitdiff |
2013-05-31 |
Quentin Colombet | Loop Strength Reduce: Scaling factor cost. |
tree | commitdiff |
2013-05-31 |
Rafael Espindola | Rename COFFYaml.h to COFFYAML.h for consistency. |
tree | commitdiff |
2013-05-31 |
Rafael Espindola | Don't allocate temporary string for section data. |
tree | commitdiff |
2013-05-31 |
Arnold Schwaighofer | LoopVectorize: PHIs with only outside users should... |
tree | commitdiff |
2013-05-31 |
Benjamin Kramer | NVPTX: Don't even create a regalloc if we're not going... |
tree | commitdiff |
2013-05-31 |
Quentin Colombet | Modify how the formulae are rated in Loop Strength... |
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