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MI-Sched: handle latency of in-order operations with the new machine model.
[oota-llvm.git]
/
test
/
CodeGen
/
ARM
/
integer_insertelement.ll
2012-10-26
Jakob Stoklund Olesen
Revert r163298 "Optimize codegen for VSETLNi{8,16,32...
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2012-09-06
James Molloy
Optimize codegen for VSETLNi{8,16,32} operating on...
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