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The ARM disassembler did not handle the alignment correctly for VLD*DUP* instructions
[oota-llvm.git]
/
test
/
CodeGen
/
ARM
/
vldlane.ll
2011-03-31
Jakob Stoklund Olesen
Fix ARM tests to be register allocator independent.
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2011-02-07
Bob Wilson
Add codegen support for using post-increment NEON load...
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2010-12-17
Bob Wilson
Fix crash compiling a QQQQ REG_SEQUENCE for a Neon...
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2010-12-10
Bob Wilson
Add float patterns for Neon vld1-lane/dup and vst1...
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2010-12-10
Bob Wilson
Fix some invalid alignments for Neon vld-dup and vld...
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2010-11-03
Bob Wilson
Add codegen patterns for VST1-lane instructions. Radar...
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2010-11-01
Bob Wilson
Add support for alignment operands on VLD1-lane instruc...
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2010-11-01
Bob Wilson
Add VLD1-lane testcases for quad-register types.
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2010-11-01
Bob Wilson
Add NEON VLD1-lane instructions. Partial fix for Radar...
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2010-10-19
Bob Wilson
Support alignment for NEON vld-lane and vst-lane instru...
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2010-08-27
Bob Wilson
Add alignment arguments to all the NEON load/store...
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2010-05-03
Dan Gohman
Fix tests to use fadd, fsub, and fmul, instead of add...
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2010-04-20
Bob Wilson
Fix tests for Neon load/store intrinsics to match the...
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2009-10-08
Bob Wilson
Add codegen support for NEON vld4lane intrinsics with...
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2009-10-08
Bob Wilson
Add codegen support for NEON vld3lane intrinsics with...
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2009-10-08
Bob Wilson
Add codegen support for NEON vld2lane intrinsics with...
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2009-10-06
Bob Wilson
Update NEON struct names to match llvm-gcc changes.
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2009-09-09
Dan Gohman
Eliminate more uses of llvm-as and llvm-dis.
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2009-09-01
Bob Wilson
Fix incorrect declarations of intrinsics in this test.
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2009-09-01
Bob Wilson
Add test for vld{234}_lane instructions.
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