Lower AVX v4i64->v4i32 truncate to one shuffle.
[oota-llvm.git] / test / CodeGen / Mips / msa / 2rf_exup.ll
2013-11-15 Daniel Sanders[mips][msa] Build all the tests in little and big endia...
2013-09-27 Daniel Sanders[mips][msa] MSA requires FR=1 mode (64-bit FPU register...
2013-08-28 Daniel Sanders[mips][msa] Summarize tests
2013-08-15 Jack Carter[Mips][msa] Added the simple builtins (fadd to ftq)