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[mips][msa] Implemented fill.d intrinsic.
[oota-llvm.git]
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test
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CodeGen
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Mips
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msa
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llvm-stress-s525530439.ll
2013-09-27
Daniel Sanders
[mips][msa] MSA requires FR=1 mode (64-bit FPU register...
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2013-09-27
Daniel Sanders
[mips][msa] Added missing check in performSRACombine
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