[mips][mips64r6] cl[oz], and dcl[oz] are re-encoded in MIPS32r6/MIPS64r6
[oota-llvm.git] / test / CodeGen / Mips / msa / llvm-stress-s525530439.ll
2013-11-15 Daniel Sanders[mips][msa] Build all the tests in little and big endia...
2013-09-27 Daniel Sanders[mips][msa] MSA requires FR=1 mode (64-bit FPU register...
2013-09-27 Daniel Sanders[mips][msa] Added missing check in performSRACombine