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Update SystemZ/Large test generators to handle new gep IR syntax
[oota-llvm.git]
/
test
/
CodeGen
/
R600
/
xor.ll
2015-02-27
David Blaikie
[opaque pointer type] Add textual IR support for explic...
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2015-01-29
Tom Stellard
R600/SI: Define a schedule model and enable the generic...
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2015-01-27
Marek Olsak
R600/SI: Enable all tests that pass on VI without changes
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2015-01-12
Tom Stellard
R600/SI: Use RegisterOperands to specify which operands...
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2015-01-08
Tom Stellard
R600/SI: Remove SIISelLowering::legalizeOperands()
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2015-01-06
Tom Stellard
R600/SI: Add a stub GCNTargetMachine
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2014-12-03
Matt Arsenault
R600/SI: Remove i1 pseudo VALU ops
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2014-11-23
Matt Arsenault
R600/SI: Fix broken check lines and modernize prefixes
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2014-11-05
Tom Stellard
R600/SI: Change all instruction assembly names to lower...
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2014-10-01
Tom Stellard
R600: Call EmitFunctionHeader() in the AsmPrinter to...
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2014-09-24
Tom Stellard
R600/SI: Enable selecting SALU inside branches
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2014-07-21
Tom Stellard
R600/SI: Use VALU for i1 XOR
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2014-06-20
Tom Stellard
R600/SI: Add a VALU pattern for i64 xor
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2014-06-09
Matt Arsenault
R600/SI: Keep 64-bit not on SALU
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2014-04-09
Matt Arsenault
R600/SI: Match not instruction.
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2014-03-21
Matt Arsenault
R600/SI: Move instruction patterns to scalar versions.
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2013-11-12
Matt Arsenault
R600/SI: Change formatting of printed registers.
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2013-10-10
Tom Stellard
R600/SI: Use -verify-machineinstrs for most tests
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2013-09-04
Vincent Lejeune
R600: Non vector only instruction can be scheduled...
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2013-08-16
Michel Danzer
R600/SI: Add pattern for xor of i1
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2013-06-25
Aaron Watry
R600/SI: Expand xor v2i32/v4i32
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2013-05-03
Tom Stellard
R600: Expand vector or, shl, srl, and xor nodes
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