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Adding intrinsics to the llvm backend for TBM instruction set.
[oota-llvm.git]
/
test
/
CodeGen
/
X86
/
sink-hoist.ll
2013-07-14
Stephen Lin
Mass update to CodeGen tests to use CHECK-LABEL for...
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2013-06-25
Andrew Trick
Revert "Temporarily enable MI-Sched on X86."
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2013-06-24
Andrew Trick
Temporarily enable MI-Sched on X86.
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2013-03-26
Jakob Stoklund Olesen
Enable SandyBridgeModel for all modern Intel P6 descend...
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2012-04-27
Craig Topper
Add mcpu to tests to prevent them from using AVX instru...
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2012-04-16
Chandler Carruth
Flip the new block-placement pass to be on by default.
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2011-10-11
Devang Patel
Add dominance check for the instruction being hoisted.
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2011-10-10
Devang Patel
Revert r141569 and r141576.
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2011-10-10
Devang Patel
If loop header is also loop exiting block then it may...
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2010-09-20
Evan Cheng
Enable machine sinking critical edge splitting. e.g.
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2010-06-03
Bill Wendling
Machine sink could potentially sink instructions into...
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2010-04-17
Dan Gohman
Start function numbering at 0.
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2010-03-05
Evan Cheng
Rever 96389 and 96990. They are causing some miscompila...
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2010-02-16
Evan Cheng
Look for SSE and instructions of this form: (and x...
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2009-12-07
Dan Gohman
Don't enable the post-RA scheduler on x86 except at...
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2009-10-31
Dan Gohman
Add a target triple so that this test behaves consisten...
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2009-10-30
Dan Gohman
Fix MachineLICM to use the correct virtual register...
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2009-10-28
Dan Gohman
Teach MachineLICM to unfold loads from constant memory...
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2009-10-28
Dan Gohman
Mark dead physregdefs dead immediately. This helps...
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2009-10-18
Evan Cheng
Turn on post-alloc scheduling for x86.
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2009-09-28
Dan Gohman
Add a CHECK line to check the position of the second...
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2009-09-28
Evan Cheng
Coalescer should not delete extract_subreg, insert_subr...
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2009-09-25
Dan Gohman
Unbreak MachineLICM for instructions that reference...
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