s/getLowerBoundDefault/getDefaultLowerBound/ for consistency. Also put the more natur...
[oota-llvm.git] / test / CodeGen /
2012-12-06 Craig TopperRemove intrinsic specific instructions for (V)MOVQUmr...
2012-12-06 Evan ChengProperly fix the tes.
2012-12-06 NAKAMURA Takumillvm/test/CodeGen/ARM/extload-knownzero.ll: Try to...
2012-12-06 Chad Rosier[arm fast-isel] Make the fast-isel implementation of...
2012-12-06 Evan ChengLet targets provide hooks that compute known zero and...
2012-12-05 Andrew TrickRegisterPressureTracker: fix findUseBetween to handle...
2012-12-05 Andrew TrickRegisterPresssureTracker: Track live physical register...
2012-12-05 Justin Holewinski[NVPTX] Fix crash with unnamed struct arguments
2012-12-05 Jyotsna VermaUse multiclass to define store instructions with base...
2012-12-05 Elena DemikhovskySimplified BLEND pattern matching for shuffles.
2012-12-05 Evan ChengAdd x86 isel lowering logic to form bit test with inver...
2012-12-04 Evan ChengARM custom lower ctpop for vector types. Patch by Pete...
2012-12-04 Bill WendlingUse the 'count' attribute to calculate the upper bound...
2012-12-04 Bill SchmidtThis patch introduces initial-exec model support for...
2012-12-04 Bill WendlingAdd a 'count' field to the DWARF subrange.
2012-12-04 Manman RenStack Alignment: when creating stack objects in Machine...
2012-12-02 Nadav RotemAllow merging multiple store sequences on the same...
2012-12-02 Eli BenderskyFix an invalid regex in the test
2012-12-01 Andrew Trickmisched: Fix RegisterPressureTracker handling of DebugVals.
2012-12-01 Andrew Trickmisched: Fix the DAG builder to handle an undef operand...
2012-12-01 Andrew Trickmisched: Fix LiveInterval update to better handle DebugVal.
2012-12-01 Andrew Trickmisched: fix RegionBegin when DebugValues get shuffled...
2012-12-01 Jakob Stoklund OlesenSimplify REG_SEQUENCE lowering.
2012-11-30 Chad Rosiertest/CodeGen/PowerPC/vec_mul.ll: Add a triple. Thanks...
2012-11-30 Sebastian PopCodegen failure for vmull with small vectors
2012-11-30 Chad Rosiertest/CodeGen/PowerPC/vec_mul.ll: Fix register operands.
2012-11-30 NAKAMURA Takumitest/CodeGen/PowerPC: Add explicit -march=ppc32.
2012-11-30 Adhemerval ZanellaThis patch fixes the Altivec addend construction for...
2012-11-29 Bill WendlingHandle the situation where CodeGenPrepare removes a...
2012-11-29 Silviu BarangaAdded atomic 64 min/max/umin/umax instrinsics support...
2012-11-29 Justin HolewinskiTeach the legalizer how to handle operands for VSELECT...
2012-11-29 Justin HolewinskiAllow targets to prefer TypeSplitVector over TypePromot...
2012-11-29 Jakob Stoklund OlesenAvoid rewriting instructions twice.
2012-11-29 Nadav RotemWhen combining consecutive stores allow loads in betwee...
2012-11-28 Benjamin KramerARM: Implement CanLowerReturn so large vectors get...
2012-11-28 Andrew Trickmisched: Analysis that partitions the DAG into subtrees.
2012-11-28 Andrew Trickmisched: better alias analysis.
2012-11-27 Bill SchmidtThis patch makes medium code model the default for...
2012-11-27 Chad RosierAdd -verify-machineinstrs to these fast-isel test cases.
2012-11-27 Manman RenCSE: allow PerformTrivialCoalescing to check copies...
2012-11-27 Manman RenX86: do not fold load instructions such as [V]MOVS...
2012-11-27 Bill SchmidtThis patch implements medium code model support for...
2012-11-27 Ulrich WeigandNever use .lcomm on platforms where it does not accept...
2012-11-27 Craig TopperRevert accidental commit.
2012-11-27 Craig TopperMake PrintReg constructor explicit to prevent weird...
2012-11-27 Craig TopperAdd test cases for r168417.
2012-11-27 Chad RosierExtend test case for r168657.
2012-11-27 NAKAMURA Takumillvm/test/CodeGen/X86/2012-07-15-broadcastfold.ll:...
2012-11-26 Chad RosierRemove the X86 Maximal Stack Alignment Check pass as...
2012-11-26 Jakub StaszakNormalize splat 256bit vectors with 8 elements.
2012-11-26 Eli BenderskyRewrite test to not use a FileCheck variable and redefi...
2012-11-24 Benjamin KramerPPC: MCize most of the darwin PIC emission.
2012-11-21 Akira Hatanaka[mips] Generate big GOT code.
2012-11-21 Anton KorobeynikovAdd support for varargs functions for msp430.
2012-11-21 Anton KorobeynikovAdd support for byval args. Patch by Job Noorman!
2012-11-20 Tim NorthoverFix physical register liveness calculations:
2012-11-20 Elena DemikhovskyIntel OCL built-ins calling conventions now support...
2012-11-19 Anton KorobeynikovFactor out type info emission into separate routine.
2012-11-19 Jakob Stoklund OlesenHandle mixed normal and early-clobber defs on inline...
2012-11-18 Andrew TrickUse a full triple for a PPC test case for asm syntax.
2012-11-17 Andrew TrickSilence the buildbots for this test while I figure...
2012-11-17 Andrew TrickBroaden isSchedulingBoundary to check aliases of SP.
2012-11-17 Eli FriedmanMark FP_EXTEND form v2f32 to v2f64 as "expand" for...
2012-11-17 Chad Rosier[fast-isel] Add the -verify-machineinstrs to these...
2012-11-17 Akira HatanakaInitial implementation of MipsTargetLowering::isLegalAd...
2012-11-16 Weiming ZhaoRemove hard coded registers in ARM ldrexd and strexd...
2012-11-16 Anton KorobeynikovMake sure FABS on v2f32 and v4f32 is legal on ARM NEON
2012-11-16 Richard OsborneFix handling of aliases to functions.
2012-11-16 Justin Holewinski[NVPTX] Order global variables in def-use order before...
2012-11-16 NAKAMURA Takumillvm/test/CodeGen/X86/hipe-cc*.ll: Add explicit -mcpu...
2012-11-16 Duncan SandsAdd the Erlang/HiPE calling convention, patch by Yianni...
2012-11-16 Craig TopperUse roundps/pd for llvm.ceil, llvm.trunc, llvm.rint...
2012-11-16 Akira Hatanaka[mips] Fix delay slot filler so that instructions with...
2012-11-15 Eli FriedmanMark FP_ROUND for converting NEON v2f64 to v2f32 as...
2012-11-15 Adhemerval ZanellaPowerPC: Lowering floor intrinsic for Altivec
2012-11-14 Bill SchmidtThis patch is in preparation for adding medium code...
2012-11-14 Jakub StaszakMake sure to not get AVX code on an AVX-capable host...
2012-11-14 NAKAMURA Takumitest/CodeGen/Hexagon/postinc-load.ll: Suppress it for...
2012-11-14 Eric ChristopherRemove the CellSPU port.
2012-11-14 NAKAMURA Takumillvm/test/CodeGen/X86/memset.ll: FileCheck-ize, and...
2012-11-14 Jyotsna VermaAdded multiclass for post-increment load instructions.
2012-11-14 Benjamin KramerForce CPU in test so we don't accidentally get AVX...
2012-11-14 Benjamin KramerX86: Enable SSE memory intrinsics even when stack align...
2012-11-14 Nadav RotemThe code pattern "imm0_255_neg" is used for checking...
2012-11-14 Justin Holewinski[NVPTX] Implement custom lowering of loads/stores for i1
2012-11-14 Anton KorobeynikovFix really stupid ARM EHABI info generation bug: we...
2012-11-14 Rafael EspindolaHandle DAG CSE adding new uses during ReplaceAllUsesWit...
2012-11-14 Anton KorobeynikovUse TARGET2 relocation for TType references on ARM.
2012-11-13 Eric ChristopherRevert "Use the 'count' attribute instead of the 'upper...
2012-11-13 Manman RenX86: when constructing VZEXT_LOAD from other loads...
2012-11-13 Ulrich WeigandDo not consider a machine instruction that uses and...
2012-11-13 Duncan SandsCodegen support for arbitrary vector getelementptrs.
2012-11-13 Bill WendlingUse the 'count' attribute instead of the 'upper_bound...
2012-11-13 Andrew TrickCleanup the main RegisterCoalescer loop.
2012-11-12 Michael LiaoFix test case added in patch fixing PR14314
2012-11-12 Andrew Trickmisched: Infrastructure for weak DAG edges.
2012-11-12 Michael LiaoFix PR14314
2012-11-12 Justin Holewinski[NVPTX] Add more precise PTX/SM target attributes
2012-11-10 Evan ChengConvert an improper CodeGen test to a MC test.
2012-11-10 Evan Chengxfail a bad test. This is a MC test but it's dependent...
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