Remove unused CHECK lines
[oota-llvm.git] / test / CodeGen /
2014-05-23 Nico RieckRemove unused CHECK lines
2014-05-23 Nico RieckFix broken FileCheck prefixes
2014-05-23 Rafael EspindolaConvert test to use FileCheck.
2014-05-23 Daniel Sanders[mips][mips64r6] [ls][dw][lr] are not available in...
2014-05-23 Jiangning Liu[ARM64] Fix a bug in shuffle vector lowering to generat...
2014-05-22 Matt ArsenaultR600: Try to convert BFE back to standard bit ops when...
2014-05-22 Matt ArsenaultR600: Add dag combine for BFE
2014-05-22 Matt ArsenaultR600: Implement ComputeNumSignBitsForTargetNode for BFE
2014-05-22 Matt ArsenaultR600: Expand mul24 for GPUs without it
2014-05-22 Matt ArsenaultR600: Expand mad24 for GPUs without it
2014-05-22 Matt ArsenaultR600: Add intrinsics for mad24
2014-05-22 Andrea Di Biagio[X86] Improve the lowering of BITCAST from MVT::f64...
2014-05-22 Tim NorthoverSegmented stacks: omit __morestack call when there...
2014-05-22 Daniel Sanders[mips] Make unalignedload.ll test stricter and easier...
2014-05-22 Daniel Sanders[mips] Change lwl and lwr in inlineasm_constraint.ll...
2014-05-22 Daniel Sanders[mips] Use addiu in inline assembly tests since addi...
2014-05-22 Tim NorthoverAArch64/ARM64: enable more AArch64 tests.
2014-05-22 Saleem AbdulrasoolARM: introduce llvm.arm.undefined intrinsic
2014-05-22 Matt ArsenaultR600/SI: Match fp_to_uint / uint_to_fp for f64
2014-05-21 David BlaikieDebugInfo: Use the SPMap to find the parent CU of inlin...
2014-05-21 Matt ArsenaultR600: Partially fix constant initializers for structs...
2014-05-21 Matt ArsenaultR600: Add failing testcases for constant initializers.
2014-05-21 Quentin Colombet[X86] Fix a bug in the lowering of BLENDI introduced...
2014-05-21 Dave EstesTest comment commit.
2014-05-21 Saleem AbdulrasoolARM: correct bundle generation for MOV32T relocations
2014-05-20 Alexey SamsonovFix test added in r209242: llc shouldn't create files...
2014-05-20 Adam Nemet[ARM64] PR19792: Fix cycle in DAG after performPostLD1C...
2014-05-20 Eric ChristopherMove the function and data section flags into the optio...
2014-05-20 Quentin Colombet[LSR] Canonicalize reg1 + ... + regN into reg1 + ....
2014-05-20 Renato GolinAvoids DCE on write_register
2014-05-20 Adam Nemet[PowerPC] PR19796: Also match ISD::TargetConstant in...
2014-05-20 Benjamin KramerLegalizer: Make bswap promotion safe for vectors.
2014-05-19 David BlaikieDebugInfo: Assume all subprogram DIEs have been created...
2014-05-19 Chad Rosier[ARM64] Adds Cortex-A53 scheduling support for vector...
2014-05-19 Andrea Di Biagio[X86] Add ISel patterns to improve the selection of...
2014-05-19 Filipe CabecinhasAdded more insertps optimizations
2014-05-19 Jyotsna Vermareverting r209132
2014-05-19 Bradley Smith[ARM64] Split tbz/tbnz into W/X register variant
2014-05-19 Jyotsna VermaHexagon: Add encoding bits to the mpy instructions.
2014-05-19 Benjamin KramerSDAG: Legalize vector BSWAP into a shuffle if the shuff...
2014-05-19 Filipe CabecinhasChange the blend tests to AVX, not AVX2.
2014-05-18 Saleem AbdulrasoolARM: improve WoA ABI conformance for frame register
2014-05-17 Saleem Abdulrasooltest: fix copy-paste mistake
2014-05-17 Saleem AbdulrasoolARM: use the proper target object format for WoA
2014-05-17 Chandler Carruth[x86] Fix a bad predicate I spotted by inspection ...
2014-05-16 Filipe CabecinhasImplemented special cases for PerformVSELECTCombine.
2014-05-16 Filipe CabecinhasLower vselects into X86ISD::BLENDI when appropriate.
2014-05-16 Tom StellardR600/SI: Promote f32 SELECT to i32
2014-05-16 Rafael EspindolaFix most of PR10367.
2014-05-16 David BlaikieDebugInfo: Assume the CU's Subprogram list only contain...
2014-05-16 Chad Rosier[ARM64] Increases the Sched Model accuracy for Cortex...
2014-05-16 James MolloyRe-enable inline memcpy expansion for Thumb1.
2014-05-16 James MolloyFix the Load/Store optimization pass to work with Thumb1.
2014-05-16 Rafael EspindolaRevert "Implement global merge optimization for global...
2014-05-16 Tim NorthoverTableGen: fix operand counting for aliases
2014-05-16 Hao Liu[ARM64]Implement NEON post-increment LD1(lane) and...
2014-05-16 Saleem AbdulrasoolARM: add some integer/floating point conversion libcalls
2014-05-15 Jiangning LiuImplement global merge optimization for global variables.
2014-05-15 Reed KotlerFinish materialize for ints
2014-05-15 NAKAMURA Takumillvm/test/CodeGen/X86/combine-sse41-intrinsics.ll:...
2014-05-15 Andrea Di Biagio[X86] Teach the backend how to fold SSE4.1/AVX/AVX2...
2014-05-15 Tom StellardR600/SI: Only use SALU instructions for 64-bit add...
2014-05-15 Tom StellardR600/SI: Use VALU instructions for i1 ops
2014-05-15 Tim NorthoverARM64: print correct aliases for NEON mov & mvn instruc...
2014-05-15 Tim NorthoverTableGen/ARM64: print aliases even if they have syntax...
2014-05-15 Jiangning Liu[ARM64] Support aggressive fastcc/tailcallopt breaking...
2014-05-14 David BlaikieDebugInfo: Sure up subprogram variable list handling...
2014-05-14 Jay FoadRename ComputeMaskedBits to computeKnownBits. "Masked...
2014-05-14 Christian PirkerARM-BE: test files for vector argument passing
2014-05-14 Christian Pirker[ARM64-BE] Fix byte order of CIE and FDE frames for...
2014-05-14 Logan ChienFix ARM EHABI when function has landingpad and nounwind.
2014-05-14 Logan ChienMore test case for r208715.
2014-05-14 Benjamin KramerX86: If we have an instruction that sets a flag and...
2014-05-14 Evgeniy StepanovRegression test for ARM EHABI breakage in r208166.
2014-05-13 Matt ArsenaultR600/SI: Try to fix BFE operands when moving to VALU
2014-05-13 Christian PirkerARMEB: Fix byte order of EH frame unwinding instruction...
2014-05-13 Joey Gouly[CGP] r205941 changed the logic, so that a cast happens...
2014-05-13 Rafael EspindolaRevert "ARMEB: Fix byte order of EH frame unwinding...
2014-05-13 Christian PirkerARMEB: Fix byte order of EH frame unwinding instructions
2014-05-13 Weiming ZhaoFolding into CSEL when there is ZEXT between SETCC...
2014-05-12 Adam Nemet[DAGCombiner] Split up an indexed load if only the...
2014-05-12 Louis GerbargFix ARM bswap16.ll test on Windows
2014-05-12 Reid KlecknerTry to fix an SDAG dependence issue with sret
2014-05-12 Adam Nemet[Test] Trim unnecessary .c and .cpp from config.suffix...
2014-05-12 Louis GerbargAdd support bswap16 to/from memory compiling to rev16...
2014-05-12 Tim NorthoverTableGen: use PrintMethods to print more aliases
2014-05-12 Matt ArsenaultR600: Add mul24 intrinsics
2014-05-12 Matt ArsenaultMake SimplifyDemandedBits understand BUILD_PAIR
2014-05-12 Benjamin KramerX86: Make sure that we have SSE4.1 before we generate...
2014-05-12 Christian PirkerARM: Implement big endian bit-conversion for NEON type
2014-05-12 Elena DemikhovskyAVX-512: changes in intrinsics
2014-05-11 Hal Finkel[PowerPC] Add global named register support
2014-05-11 Hal Finkel[PowerPC] On PPC32, 128-bit shifts might be runtime...
2014-05-11 Filipe CabecinhasFixed a bug when lowering build_vector (PR19694)
2014-05-10 Vincent LejeuneR600/SI: Fold fabs/fneg into src input modifier
2014-05-10 Vincent LejeuneR600/SI: Prettier display of input modifiers
2014-05-10 Tim NorthoverARM64: fix SELECT_CC lowering in absence of NaNs.
2014-05-09 Reid KlecknerRevert "[ms-cxxabi] Add a new calling convention that...
2014-05-09 Reid KlecknerAllow sret on the second parameter as well as the first
2014-05-09 Reid KlecknerFix ARM intrinsics-overflow.ll test on Windows
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