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Revert "[LSR] Generate and use zero extends"
[oota-llvm.git] / test / MC / Disassembler / Hexagon / memop.txt
2015-01-30 Colin LeMahieu[Hexagon] Adding XTYPE/ALU vector instructions. Organi... blob | commitdiff | raw
2015-01-05 Colin LeMahieu[Hexagon] Adding add/sub with carry, logical shift... blob | commitdiff | raw | diff to current
C/C++ LLVM-based compilers that forbids OOTA behaviors