Remove filter that was preventing MOVDQU/MOVDQA and their VEX forms from being disass...
[oota-llvm.git] / test / MC / Disassembler /
2011-09-13 Craig TopperRemove filter that was preventing MOVDQU/MOVDQA and...
2011-09-12 Owen AndersonThumb2 POP's don't allow the PC as an operand, and...
2011-09-12 Owen AndersonPort more encoding tests to decoding tests, and correct...
2011-09-11 Craig TopperFix disassembling of one of the register/register forms...
2011-09-11 Craig TopperFix disassembling of reverse register/register forms...
2011-09-11 Craig TopperFix disassembling of PAUSE instruction. Fixes PR10900...
2011-09-09 Owen AndersonLDM writeback is not allowed if Rn is in the target...
2011-09-09 Owen AndersonFix assembly/disassembly of Thumb2 ADR instructions...
2011-09-09 Craig TopperAdd disassembler test for Intel syntax. Tests r139353.
2011-09-08 Owen AndersonSoft fail CBZ/CBNZ in the disassembler if they appear...
2011-09-08 Jim GrosbachThumb2 assembly parsing and encoding for LDRD(immediate).
2011-09-07 Owen AndersonCreate Thumb2 versions of STC/LDC, and reenable the...
2011-09-07 James MolloySecond of a three-patch series aiming to fix MSR/MRS...
2011-09-07 Jim GrosbachUpdate test for 139243
2011-09-07 Owen AndersonPort more assembler tests over to disassembler tests...
2011-09-06 Owen AndersonPort more encoding tests over to Thumb2 decoding tests.
2011-09-02 Kevin EnderbyChange X86 disassembly to print immediates values as...
2011-09-02 Kevin EnderbyFix the disassembly of the X86 "crc32w %ax, %eax" instr...
2011-09-02 Craig TopperMake IC_VEX* not inherit from IC_*. Prevents instructio...
2011-08-30 Owen AndersonFix issues with disassembly of IT instructions involvin...
2011-08-30 Owen AndersonPort Thumb2 assembler tests over to disassembler tests.
2011-08-30 Craig TopperAdd vvvv support to disassembling of instructions with...
2011-08-29 Kevin EnderbyFix the disassembly of the X86 crc32 instruction. ...
2011-08-26 Owen AndersonImprove encoding support for BLX with immediat eoperand...
2011-08-26 Owen Andersoninvalid-LDR_PRE-arm.txt was already passing, but for...
2011-08-26 Owen AndersonSupport an extension of ARM asm syntax to allow immedia...
2011-08-26 Owen AndersonAdd a testcase for r138625.
2011-08-26 Craig TopperFix disassembling of VCVTSD2SI
2011-08-25 Owen AndersonPort over additional encoding tests to decoding tests...
2011-08-25 Craig TopperGive ATTR_VEX higher priority when generating the disas...
2011-08-25 Craig TopperAdd TB encoding to VEROALL, VZEROUPPER, and VCVTPS2PD...
2011-08-24 Owen AndersonPort over more encoding tests to decoding tests.
2011-08-23 Owen AndersonFix decoding of Thumb2 prefetch instructions, which...
2011-08-23 Owen AndersonFix two more instances of mis-matched operand names...
2011-08-23 Owen AndersonPort more assemble tests over to disassembly tests.
2011-08-22 Owen Andersont2SMLAD is a four-register instruction, not a three...
2011-08-22 Owen AndersonCorrect operand naming of t2USAT16 to allow proper...
2011-08-22 Owen AndersonMatch operand naming to allow correct decoding of t2LDR...
2011-08-22 Owen AndersonProvide a correct decoder hook for Thumb2 shifted regis...
2011-08-22 Owen AndersonProvide operand encoding information for half-precision...
2011-08-22 Owen AndersonFix decoding of VMOVSRR and VMOVRRS, which account...
2011-08-22 Owen AndersonFix another batch of VLD/VST decoding crashes discovere...
2011-08-22 Owen AndersonCorrect writeback handling of duplicating VLD instructi...
2011-08-22 Owen AndersonPort another swathe of Thumb1 encoding tests over to...
2011-08-22 Owen AndersonFix an incorrect shift when decoding SP-relative stores...
2011-08-19 Craig TopperAdd TB encoding to VEX versions of SSE fp logical opera...
2011-08-18 Owen AndersonSTC2L_POST and STC2L_POST should be handled the same...
2011-08-18 Owen AndersonFix the decoding of RFE instruction. RFEs have the...
2011-08-18 Owen AndersonImprove handling of failure and unpredictable cases...
2011-08-18 Jim GrosbachThumb assembly parsing and encoding for LDM instruction.
2011-08-18 Owen AndersonMore Thumb1 decoding tests.
2011-08-18 James MolloyTest commit; adding test for invalid LDRD which was...
2011-08-18 Owen AndersonPort over BL/BLX to disassembly tests.
2011-08-17 Owen AndersonPort new Thumb1 encoding tests over to decoding tests.
2011-08-17 Owen AndersonStart building a Thumb1 decoding test file based on...
2011-08-17 Owen AndersonAllow the MCDisassembler to return a "soft fail" status...
2011-08-15 Owen AndersonAdd a test file for Thumb2 NEON.
2011-08-15 Owen AndersonAdd some more comprehensive VFP decoding tests.
2011-08-15 Owen AndersonEnforce the constraint that Rt must be even on LDRD...
2011-08-15 Owen AndersonAdd a test for Thumb1 LDRSH decoding.
2011-08-15 Owen AndersonAdd testcase for STRH. Patch by James Molloy.
2011-08-15 Owen AndersonFix incorrect encoding of UMAAL and friends. Patch...
2011-08-15 Owen AndersonFix decoding LDRSB and LDRSH in Thumb1 mode. Patch...
2011-08-15 Owen AndersonFix problems decoding the to/from-lane NEON memory...
2011-08-12 Owen AndersonFix some remaining issues with decoding ARM-mode memory...
2011-08-12 Owen AndersonPort over the basic ARM encodings test file to a decodi...
2011-08-11 Owen AndersonFix decoding for indexed STRB and LDRB. Fixes <rdar...
2011-08-11 Owen AndersonImprove operand validation for Thumb2 addressing modes.
2011-08-11 Owen AndersonContinue to tighten decoding by performing more operand...
2011-08-11 Owen AndersonTighten decoding of addrmode2 instructions to reject...
2011-08-11 Owen AndersonTighten operand decoding of addrmode2 instruction....
2011-08-11 Owen AndersonCorrect immediate range for shifter operands. Patch...
2011-08-11 Owen AndersonImprove error checking in the new ARM disassembler...
2011-08-10 Owen AndersonAdd initial support for decoding NEON instructions...
2011-08-10 Owen AndersonPush GPRnopc through a large number of instruction...
2011-08-09 Owen AndersonTighten operand checking of register-shifted-register...
2011-08-09 Owen AndersonTighten operand checking on memory barrier instructions.
2011-08-09 Owen AndersonTighten operand checking on CPS instructions.
2011-08-09 Owen AndersonCreate a new register class for the set of all GPRs...
2011-08-09 Benjamin KramerARM Disassembler: sign extend branch immediates.
2011-08-09 Owen AndersonTighten Thumb1 branch predicate decoding.
2011-08-09 Owen AndersonReplace the existing ARM disassembler with a new one...
2011-08-03 Jim GrosbachARM refactoring assembly parsing of memory address...
2011-07-29 Jim GrosbachARM SRS instruction parsing, diassembly and encoding...
2011-07-19 Jim GrosbachTweak ARM assembly parsing and printing of MSR instruction.
2011-07-16 Eli FriedmanMake the disassembler able to disassemble a bunch of...
2011-07-15 Owen AndersonRemove VMOVDneon and VMOVQ, which are just aliases...
2011-07-11 Jim GrosbachSimplify printing of ARM shifted immediates.
2011-05-22 Johnny ChenFix Bug 9386 - ARM disassembler failed to disassemble...
2011-05-18 Johnny ChenDisassembly of tBcc was wrongly adding 4 to the SignExt...
2011-04-27 Johnny ChenAdd tests for A8.6.110 NOP.
2011-04-22 Johnny ChenDisassembly of A8.6.59 LDR (literal) Encoding T1 (16...
2011-04-15 Johnny ChenThumb2 BFC was insufficiently encoded.
2011-04-15 Johnny ChenA8.6.315 VLD3 (single 3-element structure to all lanes)
2011-04-15 Johnny ChenThe ARM disassembler did not handle the alignment corre...
2011-04-14 Johnny ChenAdd sanity checkings for Thumb2 Load/Store Register...
2011-04-13 Johnny ChenThumb disassembler did not handle tBRIND (indirect...
2011-04-13 Johnny ChenCheck for unallocated instruction encodings when disass...
2011-04-13 Johnny ChenThe LDR*T/STR*T (unpriviledged load/store) operations...
2011-04-13 Johnny ChenCheck the corner cases for t2LDRSHi12 correctly and...
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