fix a failure path to print the right thing, part of PR12357
[oota-llvm.git] / utils / TableGen /
2012-01-07 Devang PatelEliminate an error check that may not work with all...
2012-01-05 Devang PatelDo not hard code asm variant number.
2012-01-03 Jakob Stoklund OlesenDon't use enums larger than 1 << 31 for target features.
2011-12-30 Craig TopperAdd disassembler support for VPERMIL2PD and VPERMIL2PS.
2011-12-30 Craig TopperAdd FMA4 instructions to disassembler.
2011-12-22 Jim GrosbachARM VFP assembly parsing and encoding for VCVT(float...
2011-12-21 Jim GrosbachARM NEON VLD2 assembly parsing for structure to all...
2011-12-20 Chandler CarruthFix up the CMake build for the new files added in r1469...
2011-12-20 David BlaikieRevert pragma clang suppressions that confuse GCC....
2011-12-20 David BlaikieUnweaken vtables as per llvm.org/docs/CodingStandards...
2011-12-20 Dan GohmanAdd basic generic CodeGen support for half.
2011-12-19 Jakob Stoklund OlesenEmit a getMatchingSuperRegClass() implementation for...
2011-12-19 Jakob Stoklund OlesenSynthesize register classes for TRI::getMatchingSuperRe...
2011-12-16 Jakob Stoklund OlesenExtract a method. No functional change.
2011-12-15 Jakob Stoklund OlesenUse the proper comparator for set_intersection.
2011-12-15 Jakob Stoklund OlesenSynthesize missing register class intersections.
2011-12-12 Daniel DunbarLLVMBuild: Remove trailing newline, which irked me.
2011-12-12 Jakob Stoklund OlesenExtract a method.
2011-12-07 Jim GrosbachARM: NEON SHLL instruction immediate operand range...
2011-12-06 Jim GrosbachExtend AsmMatcher token literal matching to allow aliasing.
2011-12-06 Evan ChengFirst chunk of MachineInstr bundle support.
2011-12-06 Jim GrosbachTidy up. Fix naming convention stuff for some internal...
2011-12-06 Sebastian Popuse space star instead of star space
2011-12-06 Sebastian Popadd missing point at the end of sentences
2011-12-02 Jim GrosbachARM NEON VEXT aliases for data type suffices.
2011-12-01 Dylan NoblesmithTableGen: fix CMake build s'more
2011-12-01 Anshuman DasguptaAdd a deterministic finite automaton based packetizer...
2011-11-30 Jim GrosbachReplace an assert() with an actual diagnostic.
2011-11-30 Jim GrosbachARM parsing for VLD1 two register all lanes, no writeback.
2011-11-30 Jim Grosbachllvm_unreachable() is not for user diagnostics....
2011-11-30 Jim GrosbachARM parsing aliases for VLD1 single register all lanes.
2011-11-19 Craig TopperRemove some unnecessary filtering checks from X86 disas...
2011-11-16 Owen AndersonRename MVT::untyped to MVT::Untyped to match similar...
2011-11-15 Evan ChengAdd vmov.f32 to materialize f32 immediate splats which...
2011-11-15 Jim GrosbachARM parsing datatype suffix variants for fixed-writebac...
2011-11-15 Jim GrosbachTidy up. Formatting.
2011-11-11 Daniel DunbarLLVMBuild: Alphabetize required_libraries lists.
2011-11-10 Owen AndersonRemove this from the CMake build since I erased the...
2011-11-09 Owen AndersonRemove the old-style ARM disassembler, which is no...
2011-11-06 Craig TopperMore AVX2 instructions and their intrinsics.
2011-11-03 Daniel Dunbarbuild: Add initial cut at LLVMBuild.txt files.
2011-11-02 Chandler CarruthThe TableGen parts of the CMake build are seriously...
2011-10-28 Jim GrosbachAllow InstAlias's to use immediate matcher patterns...
2011-10-28 Jim GrosbachAllow register classes to match a containing class...
2011-10-27 Jim GrosbachDelete dead code. Nothing ever instantiates this.
2011-10-23 Craig TopperAdd X86 RORX instruction
2011-10-22 Benjamin KramerMove various generated tables into read-only memory...
2011-10-21 Jim GrosbachAssembly parsing for 2-register sequential variant...
2011-10-21 Jim GrosbachAssembly parsing for 4-register variant of VLD1.
2011-10-21 Jim GrosbachAssembly parsing for 3-register variant of VLD1.
2011-10-21 Jim GrosbachARM VLD parsing and encoding.
2011-10-18 Jim GrosbachARM VTBL (one register) assembly parsing and encoding.
2011-10-18 Jim GrosbachARM assembly parsing and encoding for VMOV.i64.
2011-10-18 Jim GrosbachARM assembly parsing and encoding for VMOV/VMVN/VORR...
2011-10-17 Jim GrosbachARM assembly parsing and encoding for VMOV/VMVN/VORR...
2011-10-17 Jim GrosbachARM NEON "vmov.i8" immediate assembly parsing and encoding.
2011-10-17 Owen AndersonFix unused variable warning in the rare circumstance...
2011-10-17 Benjamin KramerPick low-hanging MatchEntry shrinkage fruit.
2011-10-16 Craig TopperAdd X86 PEXTR and PDEP instructions.
2011-10-16 Craig TopperAdd X86 BZHI instruction as well as BMI2 feature detection.
2011-10-16 Craig TopperAdd X86 INVPCID instruction. Add 32/64-bit predicates...
2011-10-16 Craig TopperAdd X86 BEXTR instruction. This instruction uses VEX...
2011-10-15 Craig TopperAdd support for X86 blsr, blsmsk, and blsi instructions...
2011-10-14 Craig TopperAdd X86 ANDN instruction. Including instruction selection.
2011-10-14 Jakob Stoklund OlesenBan rematerializable instructions with side effects.
2011-10-12 Jim GrosbachARM parsing and encoding for the <option> form of LDC...
2011-10-11 Eli FriedmanRemove extra semicolon.
2011-10-11 Craig TopperFix disassembling of popcntw. Also remove some code...
2011-10-10 Jakob Stoklund OlesenEmit full ED initializers even for pseudo-instructions.
2011-10-10 Jakob Stoklund OlesenInsert dummy ED table entries for pseudo-instructions.
2011-10-07 Jim GrosbachARM NEON assembly parsing and encoding for VDUP(scalar).
2011-10-07 Craig TopperRevert part of r141274. Only need to change encoding...
2011-10-06 Peter CollingbourneRemove the Clang tblgen backends from LLVM.
2011-10-06 Craig TopperFix assembling of xchg %eax, %eax to not use the NOP...
2011-10-06 Peter CollingbourneBuild system infrastructure for multiple tblgens.
2011-10-06 Jakob Stoklund OlesenRemove the TRI::getSubRegisterRegClass() hook.
2011-10-05 Jakob Stoklund OlesenAdd TRI::getSubClassWithSubReg(RC, Idx) function.
2011-10-04 Jakob Stoklund OlesenProperly use const_iterator.
2011-10-04 Jakob Stoklund OlesenTeach TableGen to infer missing register classes.
2011-10-04 Jakob Stoklund OlesenTableGen: Store all allocation orders together.
2011-10-04 Jakob Stoklund OlesenTableGen: Privatize CodeGenRegisterClass::TheDef and...
2011-10-04 Jakob Stoklund OlesenTableGen: Don't add synthetic Records to the RecordKeeper.
2011-10-04 Craig TopperAdd support in the disassembler for ignoring the L...
2011-10-02 Craig TopperFix typo in r140954.
2011-10-01 Craig TopperFix disassembling of INVEPT and INVVPID to take operands
2011-10-01 Craig TopperFix disassembler handling of CRC32 which is an odd...
2011-10-01 Peter CollingbourneMove TableGen's parser and entry point into a library
2011-10-01 Bob WilsonSubtarget getFeatureBits() returns a uint64_t, not...
2011-09-30 Jakob Stoklund OlesenUse precomputed BitVector for CodeGenRegisterClass...
2011-09-30 Jakob Stoklund OlesenStore sub-class lists as a bit vector.
2011-09-30 Jakob Stoklund OlesenExtract a slightly more general BitVector printer.
2011-09-30 Jakob Stoklund OlesenCompute lists of super-classes in CodeGenRegisterClass.
2011-09-30 David GreeneImplement VarListElementInit:: resolveListElementReference
2011-09-30 Jakob Stoklund OlesenPrecompute a bit vector of register sub-classes.
2011-09-30 Jakob Stoklund OlesenOrder register classes topologically.
2011-09-29 Jakob Stoklund OlesenSwitch to ArrayRef<CodeGenRegisterClass*>.
2011-09-29 Daniel Dunbartblgen/ClangDiagnostics: Add support for split default...
2011-09-26 Owen AndersonASR #32 is not allowed on Thumb2 USAT and SSAT instruct...
2011-09-25 Jakob Stoklund OlesenAdd target hook for pseudo instruction expansion.
2011-09-23 Craig TopperDon't allow 32-bit only instructions to be disassembled...
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