Before implementing copyfromreg, we'll implement copytoreg correctly.
This gets us this for the previous testcase:

_test:
        lis r2, 0
        ori r3, r2, 65535
        blr

Note that we actually write to r3 (the return reg) correctly now :)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22933 91177308-0d34-0410-b5e6-96231b3b80d8

Now that we have operand info for machine instructions, use it to create
temporary registers for things that define a register.  This allows dag->dag
isel to compile this:

int %test() { ret int 65535 }

into:

_test:
        lis r2, 0
        ori r2, r2, 65535
        blr

Next up, getting CopyFromReg to work, allowing arguments and cross-bb values.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22932 91177308-0d34-0410-b5e6-96231b3b80d8

Emit this:

static const TargetOperandInfo OperandInfo6[] = { { &PPC32::CRRCRegClass }, { 0 }, };

instead of this:

static const TargetOperandInfo OperandInfo6[] = { { PPC32::CRRCRegisterClass }, { 0 }, };

For operand information, which does not require dynamic (startup-time)
initialization.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22931 91177308-0d34-0410-b5e6-96231b3b80d8

Expose the derived register classes to the public header, allowing them
to be accessed.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22930 91177308-0d34-0410-b5e6-96231b3b80d8

Split RegisterClass 'Methods' into MethodProtos and MethodBodies

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22929 91177308-0d34-0410-b5e6-96231b3b80d8

Split register class "Methods" into MethodProtos and MethodBodies

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22928 91177308-0d34-0410-b5e6-96231b3b80d8

put reg classes into namespace

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22927 91177308-0d34-0410-b5e6-96231b3b80d8

Put reg classes into namespaces

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22926 91177308-0d34-0410-b5e6-96231b3b80d8

Put register classes into namespaces

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22925 91177308-0d34-0410-b5e6-96231b3b80d8

Put register classes in namespaces

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22924 91177308-0d34-0410-b5e6-96231b3b80d8

Fix code that assumes the register info will be dumped into a target
namespace instead of the reg class namespace.  Update getRegClassForType()
to use modified names due to tblgen change.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22923 91177308-0d34-0410-b5e6-96231b3b80d8

put reg classes in namespaces

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22922 91177308-0d34-0410-b5e6-96231b3b80d8

Require that targets specify a namespace for their register classes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22921 91177308-0d34-0410-b5e6-96231b3b80d8

Refactor to use Target.getRegisterClasses consistently, which provides
anonymous regclass definition renaming.

Change the generated code to emit register classes as properly namespace
qualified entities like everything else.

expose the actual class definition as an object, though this isn't quite
usable yet.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22920 91177308-0d34-0410-b5e6-96231b3b80d8

Emit real operand info for instructions.  This currently works but is bad
in one way: the generated tables require dynamic initialization for the
register classes.  This will be fixed in a future patch.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22919 91177308-0d34-0410-b5e6-96231b3b80d8

Read the namespace field from register classes

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22918 91177308-0d34-0410-b5e6-96231b3b80d8

The skeleton target has never had an isel

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22917 91177308-0d34-0410-b5e6-96231b3b80d8

This code has always been dead on itanium

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22916 91177308-0d34-0410-b5e6-96231b3b80d8

This code has always been dead for alpha

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22915 91177308-0d34-0410-b5e6-96231b3b80d8

The simple isel being gone makes this dead!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22914 91177308-0d34-0410-b5e6-96231b3b80d8

Now that the simple isels are dead, so is this.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22913 91177308-0d34-0410-b5e6-96231b3b80d8

add a setName method to record

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22912 91177308-0d34-0410-b5e6-96231b3b80d8

Add a setName method to Record.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22911 91177308-0d34-0410-b5e6-96231b3b80d8

For now, just emit empty operand info structures.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22910 91177308-0d34-0410-b5e6-96231b3b80d8

Sparcv9 gets no operand info

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22909 91177308-0d34-0410-b5e6-96231b3b80d8

Add a new field to TargetInstrDescriptor for tracking information about
operands.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22908 91177308-0d34-0410-b5e6-96231b3b80d8

Fix VC++ constant truncation warning.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22907 91177308-0d34-0410-b5e6-96231b3b80d8

Update Visual Studio projects for removed file.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22905 91177308-0d34-0410-b5e6-96231b3b80d8

a bugfix (up top) and a quick repair job: disable generation of dep.z
(which died about a week ago) so we're back to load-(2^n-1)-then-AND
sequences. slow, but things should now be Almost Completely Working,
modulo those pesky alignment/ABI issues.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22904 91177308-0d34-0410-b5e6-96231b3b80d8

Fix a problem jeffc noticed

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22903 91177308-0d34-0410-b5e6-96231b3b80d8

Fix VC++ precedence warning.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22902 91177308-0d34-0410-b5e6-96231b3b80d8

Fix a bug where we were passing the wrong number of arguments to an
instruction.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22901 91177308-0d34-0410-b5e6-96231b3b80d8

remove dead args

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22900 91177308-0d34-0410-b5e6-96231b3b80d8

remove dead options

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22899 91177308-0d34-0410-b5e6-96231b3b80d8

remove dead flags

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22898 91177308-0d34-0410-b5e6-96231b3b80d8

The code emitter generator only supports targets with 32-bit instruction
words.  There is no way for one of these targets to have a > 32-bit immediate!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22897 91177308-0d34-0410-b5e6-96231b3b80d8

Fix computation of # operands, add a temporary hack for CopyToReg

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22896 91177308-0d34-0410-b5e6-96231b3b80d8

now that all of the targets are clean w.r.t. the number of operands for each
instruction defined, actually emit this to the InstrInfoDescriptor, which
allows an assert in the machineinstrbuilder to do some checking for us,
and is required by the dag->dag emitter

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22895 91177308-0d34-0410-b5e6-96231b3b80d8

Add support for target nodes with more than 3 operands, required by ppc

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22894 91177308-0d34-0410-b5e6-96231b3b80d8

mark variable arity instructions as such.  Alpha wins the battle for
cleanest backend in this metric :)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22893 91177308-0d34-0410-b5e6-96231b3b80d8

Mark some instructions as variable_ops, and PSEUDO_ALLOC as taking a GPR.
I'm not convinced this is all of them,  but I can't do much testing, because
IA64 LLC crashes on big programs :(

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22892 91177308-0d34-0410-b5e6-96231b3b80d8

add a few missing cases

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22891 91177308-0d34-0410-b5e6-96231b3b80d8

Give ADJCALLSTACKDOWN/UP the correct operands.
Give a whole bunch of other stuff variable operands, particularly FP.  The
FP stackifier is playing fast and loose with operands here, so we have to
mark them all as variable.  This will have to be fixed before we can dag->dag
the X86 backend.  The solution is for the pre-stackifier and post-stackifier
instructions to all be disjoint.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22890 91177308-0d34-0410-b5e6-96231b3b80d8

ISD::OR, and it's accompanying SelectBitfieldInsert

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22889 91177308-0d34-0410-b5e6-96231b3b80d8

The variable SAR's only take one operand too

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22888 91177308-0d34-0410-b5e6-96231b3b80d8

Stop adding bogus operands to variable shifts on X86.  These instructions
only take one operand.  The other comes implicitly in through CL.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22887 91177308-0d34-0410-b5e6-96231b3b80d8

Remove the X86 and PowerPC Simple instruction selectors; their time has
passed.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22886 91177308-0d34-0410-b5e6-96231b3b80d8

Figure out how many operands each instruction has, keep track of whether
or not it's variable.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22885 91177308-0d34-0410-b5e6-96231b3b80d8

Add shifts.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22884 91177308-0d34-0410-b5e6-96231b3b80d8

Fix operand numbers by marking variable arity nodes as such and by fixing
the operand lists of a few other nodes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22883 91177308-0d34-0410-b5e6-96231b3b80d8

MFLR doesn't take an operand, the LR register is implicit

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22882 91177308-0d34-0410-b5e6-96231b3b80d8

Add a new flag

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22881 91177308-0d34-0410-b5e6-96231b3b80d8

revert this change, which causes breakage, temporarily

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22880 91177308-0d34-0410-b5e6-96231b3b80d8

When emitting implicit use/def lists, only emit each unique list once.  Though
LLVM is able to merge identical static const globals, GCC isn't, and this caused
some bloat in the generated data.  This has a marginal effect on PPC, shrinking
the implicit sets from 10->4, but shrinks X86 from 179 to 23, a much bigger
reduction.

This should speed up the register allocator as well by reducing the dcache
footprint for this static data.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22879 91177308-0d34-0410-b5e6-96231b3b80d8

add a new -view-sched-dags option to view dags as they are sent to the scheduler.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22878 91177308-0d34-0410-b5e6-96231b3b80d8

Move this to the emitter

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22877 91177308-0d34-0410-b5e6-96231b3b80d8

Implement the first chunk of a code emitter.  This is sophisticated enough to
codegen:

_empty:
.LBB_empty_0:   ;
        blr

but can't do anything more (yet). :)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22876 91177308-0d34-0410-b5e6-96231b3b80d8

Unmangled names.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22875 91177308-0d34-0410-b5e6-96231b3b80d8

Add ScheduleDAG.cpp to the project

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22874 91177308-0d34-0410-b5e6-96231b3b80d8

Fill in the numOperands field of the TargetInstrDescriptor struct from the
.td file.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22873 91177308-0d34-0410-b5e6-96231b3b80d8

1. Fix comment.

2. Get an exact count of 'li ' instructions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22872 91177308-0d34-0410-b5e6-96231b3b80d8

Add regression test to make sure that constants are generated optimally.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22871 91177308-0d34-0410-b5e6-96231b3b80d8

More optimal solution for loading constants.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22870 91177308-0d34-0410-b5e6-96231b3b80d8

After selecting the instructions for a basic block, emit the instructions

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22869 91177308-0d34-0410-b5e6-96231b3b80d8

new file, obviously just a stub

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22868 91177308-0d34-0410-b5e6-96231b3b80d8

add a method

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22867 91177308-0d34-0410-b5e6-96231b3b80d8

remove some unused stuff

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22866 91177308-0d34-0410-b5e6-96231b3b80d8

Fix int foo() { return 65535; } by using the top 16 bits of the constant
as the argument to LIS rather than the result of HA16(constant).

The DAG->DAG ISel was already doing the right thing.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22865 91177308-0d34-0410-b5e6-96231b3b80d8

Improve ISD::Constant codegen.
Now for int foo() { return -1; } we generate:
_foo:
        li r3, -1
        blr

instead of
_foo:
        lis r2, -1
        ori r3, r2, 65535
        blr

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22864 91177308-0d34-0410-b5e6-96231b3b80d8

Enable critical edge splitting by default

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22863 91177308-0d34-0410-b5e6-96231b3b80d8

replace switch stmt with an assert, generate li 0 instead of lis 0 for 0,
to make the code follow people's expectations better.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22861 91177308-0d34-0410-b5e6-96231b3b80d8

Handle loading of 0x????0000 constants with a single instruction.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22858 91177308-0d34-0410-b5e6-96231b3b80d8

Add support for ISD::AND, and its various optimized forms.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22857 91177308-0d34-0410-b5e6-96231b3b80d8

Add support for target DAG nodes that take 4 operands, such as PowerPC's
rlwinm.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22856 91177308-0d34-0410-b5e6-96231b3b80d8

Maintain consistency in negating things

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22855 91177308-0d34-0410-b5e6-96231b3b80d8

Implement XOR, remove a broken sign_extend_inreg case

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22854 91177308-0d34-0410-b5e6-96231b3b80d8

Fix printing of VTSDNodes

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22853 91177308-0d34-0410-b5e6-96231b3b80d8

Add a testcase for load short -> uint, which is currently emitted as a
zextload + sign_extend_inreg rather than a sextload.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22852 91177308-0d34-0410-b5e6-96231b3b80d8

Add a bunch more simple nodes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22851 91177308-0d34-0410-b5e6-96231b3b80d8

Add a couple more nodes that are easy to handle

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22850 91177308-0d34-0410-b5e6-96231b3b80d8

Be fruitful and multiply!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22849 91177308-0d34-0410-b5e6-96231b3b80d8

Better version of isIntImmediate.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22848 91177308-0d34-0410-b5e6-96231b3b80d8

messed up

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22847 91177308-0d34-0410-b5e6-96231b3b80d8

include/llvm/Support/MathExtras.h

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22846 91177308-0d34-0410-b5e6-96231b3b80d8

Teach the DAG->DAG ISel about FNEG, and how it can be used to invert
several of the PowerPC opcodes that come in both negated and non-negated
forms.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22845 91177308-0d34-0410-b5e6-96231b3b80d8

Add two new methods isTargetOpcode() which returns true if the node type
is greater than the range of building selection dag node types, and
getTargetOpcode(), which returns the node opcode less the value of
isd::builtin_op_end, which specifies the end of the builtin types.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22844 91177308-0d34-0410-b5e6-96231b3b80d8

Fix Transforms/LoopStrengthReduce/2005-08-17-OutOfLoopVariant.ll, a crash
on 177.mesa

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22843 91177308-0d34-0410-b5e6-96231b3b80d8

new testcase distilled from mesa

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22842 91177308-0d34-0410-b5e6-96231b3b80d8

Move the code dependency for MathExtras.h from SelectionDAGNodes.h.

Added some class dividers in SelectionDAG.cpp.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22841 91177308-0d34-0410-b5e6-96231b3b80d8

Move code dependency for MathExtras.h out of Constants.h.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22840 91177308-0d34-0410-b5e6-96231b3b80d8

Promote dependency for MathExtras.h out of Constants.h.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22839 91177308-0d34-0410-b5e6-96231b3b80d8

Culling out use of unions for converting FP to bits and vice versa.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22838 91177308-0d34-0410-b5e6-96231b3b80d8

add a beta option for turning on dag->dag isel

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22837 91177308-0d34-0410-b5e6-96231b3b80d8

initial hack at a dag->dag instruction selector.  This is obviously woefully
incomplete, but it is a start.  It handles basic argument/retval stuff, immediates,
add and sub.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22836 91177308-0d34-0410-b5e6-96231b3b80d8

add prototype, remove dead proto

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22835 91177308-0d34-0410-b5e6-96231b3b80d8

Fix a bug in RemoveDeadNodes where it would crash when its "optional"
argument is not specified.

Implement ReplaceAllUsesWith.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22834 91177308-0d34-0410-b5e6-96231b3b80d8

add ReplaceAllUsesWith, and a helper to implemented it

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22833 91177308-0d34-0410-b5e6-96231b3b80d8

Make removeUser more efficient, add a matching addUser.
Fix the setOperands methods I added to update use/def information correctly.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22832 91177308-0d34-0410-b5e6-96231b3b80d8

Switched to using BitsToDouble for int_to_float to avoid aliasing problem.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22831 91177308-0d34-0410-b5e6-96231b3b80d8

Added support for converting raw bits to FP, and FP to raw bits.  The intent
is to avoid the distraction of the union declarations.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22830 91177308-0d34-0410-b5e6-96231b3b80d8