Rafael Espindola [Mon, 2 Dec 2013 05:24:28 +0000 (05:24 +0000)]
Remove #if 0 declarations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196067
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Rafael Espindola [Mon, 2 Dec 2013 05:10:04 +0000 (05:10 +0000)]
Remove dead code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196066
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Rafael Espindola [Mon, 2 Dec 2013 04:55:42 +0000 (04:55 +0000)]
Change the default of AsmWriterClassName and isMCAsmWriter.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196065
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Alp Toker [Mon, 2 Dec 2013 04:31:36 +0000 (04:31 +0000)]
Rename test with misspelt filename
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196064
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Rafael Espindola [Mon, 2 Dec 2013 04:18:19 +0000 (04:18 +0000)]
Remove dead declarations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196063
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Rafael Espindola [Mon, 2 Dec 2013 03:26:43 +0000 (03:26 +0000)]
Refactor for clarity and efficiency.
The PPC GetSymbolFromOperand already prefixed stubs of MO_ExternalSymbol, so
this should be a nop.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196059
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Rafael Espindola [Sun, 1 Dec 2013 21:24:30 +0000 (21:24 +0000)]
Also test the created stubs on 32 bits.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196052
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Andrew Trick [Sun, 1 Dec 2013 18:17:05 +0000 (18:17 +0000)]
Add -mcpu to stackmap.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196051
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Tim Northover [Sun, 1 Dec 2013 14:16:24 +0000 (14:16 +0000)]
ARM: fix bug in -Oz stack adjustment folding
Previously, we clobbered callee-saved registers when folding an "add
sp, #N" into a "pop {rD, ...}" instruction. This change checks whether
a register we're going to add to the "pop" could actually be live
outside the function before doing so and should fix the issue.
This should fix PR18081.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196046
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Benjamin Kramer [Sun, 1 Dec 2013 11:47:42 +0000 (11:47 +0000)]
Revamp error checking in the ms inline asm parser.
- Actually abort when an error occurred.
- Check that the frontend lookup worked when parsing length/size/type operators.
Tested by a clang test. PR18096.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196044
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Michael Kuperstein [Sun, 1 Dec 2013 10:16:35 +0000 (10:16 +0000)]
Ensure bitcode encoding of linkage types stays stable. Patch by Boaz Ouriel
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196042
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Bill Wendling [Sun, 1 Dec 2013 03:40:42 +0000 (03:40 +0000)]
Use accessor methods instead.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196006
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Bill Wendling [Sun, 1 Dec 2013 03:36:07 +0000 (03:36 +0000)]
Use 'unsigned char' to get this past gcc error message:
error: invalid conversion from 'unsigned char' to '{anonymous}::Sequence'
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196004
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Hal Finkel [Sat, 30 Nov 2013 20:55:12 +0000 (20:55 +0000)]
Add a scheduling model (with itinerary) for the PPC POWER7
This adds a scheduling model for the POWER7 (P7) core, and enables the
machine-instruction scheduler when targeting the P7. Scheduling for the P7,
like earlier ooo PPC cores, requires considering both dispatch group hazards,
and functional unit resources and latencies. These are both modeled in a
combined itinerary. Dispatch group formation is still handled by the post-RA
scheduler (which still needs to be updated for the P7, but nevertheless does a
pretty good job).
One interesting aspect of this change is that I've also enabled to use of AA
duing CodeGen for the P7 (just as it is for the embedded cores). The benchmark
results seem to support this decision (see below), and while this is normally
useful for in-order cores, and not for ooo cores like the P7, I think that the
dispatch slot hazards are enough like in-order resources to make the AA useful.
Test suite significant performance differences (where negative is a speedup,
and positive is a regression) vs. the current situation:
MultiSource/Benchmarks/BitBench/drop3/drop3
with AA: N/A
without AA: -28.7614% +/- 19.8356%
(significantly against AA)
MultiSource/Benchmarks/FreeBench/neural/neural
with AA: -17.7406% +/- 11.2712%
without AA: N/A
(significantly in favor of AA)
MultiSource/Benchmarks/SciMark2-C/scimark2
with AA: -11.2079% +/- 1.80543%
without AA: -11.3263% +/- 2.79651%
MultiSource/Benchmarks/TSVC/Symbolics-flt/Symbolics-flt
with AA: -41.8649% +/- 17.0053%
without AA: -34.5256% +/- 23.7072%
MultiSource/Benchmarks/mafft/pairlocalalign
with AA: 25.3016% +/- 17.8614%
without AA: 38.6629% +/- 14.9391%
(significantly in favor of AA)
MultiSource/Benchmarks/sim/sim
with AA: N/A
without AA: 13.4844% +/- 7.18195%
(significantly in favor of AA)
SingleSource/Benchmarks/BenchmarkGame/Large/fasta
with AA: 15.0664% +/- 6.70216%
without AA: 12.7747% +/- 8.43043%
SingleSource/Benchmarks/BenchmarkGame/puzzle
with AA: 82.2713% +/- 26.3567%
without AA: 75.7525% +/- 41.1842%
SingleSource/Benchmarks/Misc/flops-2
with AA: -37.1621% +/- 20.7964%
without AA: -35.2342% +/- 20.2999%
(significantly in favor of AA)
These are 99.5% confidence intervals from 5 runs per configuration. Regarding
the choice to turn on AA during CodeGen, of these results, four seem
significantly in favor of using AA, and one seems significantly against. I'm
not making this decision based on these numbers alone, but these results
seem consistent with results I have from other tests, and so I think that, on
balance, using AA is a win.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@195981
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Hal Finkel [Sat, 30 Nov 2013 20:41:13 +0000 (20:41 +0000)]
Split some PPC itinerary classes
In preparation for adding scheduling definitions for the POWER7, split some PPC
itinerary classes so that the P7's latencies and hazards can be better
described. For the most part, this means differentiating indexed from non-index
pre-increment loads and stores. Also, differentiate single from
double-precision sqrt.
No functionality change intended (except for a more-specific latency for
single-precision sqrt on the A2).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@195980
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Hal Finkel [Sat, 30 Nov 2013 20:04:33 +0000 (20:04 +0000)]
Convert a PPC test from grep to FileCheck
Convert this test to FileCheck, and improve it to check for the instructions it
is trying to exclude instead of checking for register use (especially because
grepping for r1 can be thrown off, for example, by a use of r12).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@195979
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Hal Finkel [Sat, 30 Nov 2013 19:52:28 +0000 (19:52 +0000)]
Desensitize a couple of PPC regression tests
Use CHECK-DAG to make these regression tests more resilient against changes in
instruction scheduling.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@195978
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Hal Finkel [Sat, 30 Nov 2013 19:39:27 +0000 (19:39 +0000)]
Update the cpu specified on some PPC regression tests
Some of these tests did not specify a cpu but were also sensitive to
instruction scheduling and/or register assignment choices. A few others
similarly-sensitive tests specified a cpu (often the POWER7), and while the P7
currently uses the default model for PPC64, this will soon change. For those
tests which should not really be cpu-dependent anyway, the cpu is set to the
generic 'ppc64'.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@195977
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Zoran Jovanovic [Sat, 30 Nov 2013 19:13:15 +0000 (19:13 +0000)]
Test case for issue with microMIPS long branch.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@195976
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Zoran Jovanovic [Sat, 30 Nov 2013 19:12:28 +0000 (19:12 +0000)]
Fixed issue with microMIPS long branch.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@195975
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Daniel Sanders [Sat, 30 Nov 2013 13:47:57 +0000 (13:47 +0000)]
[mips][msa] MSA loads and stores have a 10-bit offset. Account for this when lowering FrameIndex.
This prevents the compiler from emitting invalid ld.[bhwd]'s and st.[bhwd]'s
when the stack frame is between 512 and 32,768 bytes in size.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@195973
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Daniel Sanders [Sat, 30 Nov 2013 13:15:21 +0000 (13:15 +0000)]
[mips][msa] A small refactor to reduce patch noise in my next commit
No functional change. An if-statement has been split into two nested if-statements.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@195972
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Juergen Ributzka [Sat, 30 Nov 2013 03:07:16 +0000 (03:07 +0000)]
Force CPU type to unbreak unit tests on Haswell machines.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@195971
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Andrew Trick [Fri, 29 Nov 2013 23:49:38 +0000 (23:49 +0000)]
Reverse the order of eviction checks for possible compile time savings. No functionality.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@195969
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Reed Kotler [Fri, 29 Nov 2013 22:32:56 +0000 (22:32 +0000)]
Part 1 of 3 patches that completes very long conditional branches
in constant islands for Mips16. We introdcuce JalB16 as a synomnym
for Jal16. It makes it easier to read and is also necessary because
Jal16 is a call instruction but JalB16 is being used as a branch.
Various parts of LLVM will not work properly even in this late stage of
the backend if we use what was declared as a call instruction to function
as a branch. For one, basic block labels may not get emitted in some
situations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@195968
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Zoran Jovanovic [Fri, 29 Nov 2013 22:10:02 +0000 (22:10 +0000)]
Revert revision 195965.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@195967
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Petar Jovanovic [Fri, 29 Nov 2013 21:59:09 +0000 (21:59 +0000)]
mips: XFAIL llvm-cov test
XFAIL llvm-cov.test for MIPS until big-endian issues are fixed for llvm-cov.
The test does pass on MIPS little-endian.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@195966
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Zoran Jovanovic [Fri, 29 Nov 2013 21:41:24 +0000 (21:41 +0000)]
Fixed issue with microMIPS long branch.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@195965
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Hal Finkel [Fri, 29 Nov 2013 07:04:59 +0000 (07:04 +0000)]
Adjust PPC A2 input operand latencies
On the PPC A2, instructions are only issued after their input operands are
ready. Model this by specifying that input operands are read at dispatch (0
cycles after issue). This changes all input operand latencies from 1 to 0.
Significant test-suite performance changes (these are 99.5% confidence
intervals on 6 runs for both before and after):
speedups:
MultiSource/Benchmarks/sim/sim
-1.21915% +/- 0.175063%
MultiSource/Benchmarks/TSVC/LinearDependence-flt/LinearDependence-flt
-1.23946% +/- 1.05133%
SingleSource/Benchmarks/Misc/flops-2
-1.24237% +/- 0.681362%
MultiSource/Applications/JM/lencod/lencod
-1.33992% +/- 0.757498%
MultiSource/Benchmarks/TSVC/InductionVariable-flt/InductionVariable-flt
-1.51802% +/- 1.21468%
MultiSource/Benchmarks/TSVC/GlobalDataFlow-flt/GlobalDataFlow-flt
-2.18818% +/- 1.28605%
MultiSource/Benchmarks/TSVC/Packing-flt/Packing-flt
-2.21977% +/- 1.19499%
SingleSource/Benchmarks/BenchmarkGame/spectral-norm
-2.29822% +/- 0.671871%
MultiSource/Benchmarks/TSVC/Packing-dbl/Packing-dbl
-2.40975% +/- 0.355931%
SingleSource/Benchmarks/Misc/fp-convert
-2.41899% +/- 1.04751%
MultiSource/Benchmarks/TSVC/Searching-dbl/Searching-dbl
-2.50349% +/- 0.126765%
SingleSource/Benchmarks/Misc/flops-3
-3.00214% +/- 0.700795%
MultiSource/Benchmarks/TSVC/LoopRestructuring-flt/LoopRestructuring-flt
-3.56995% +/- 3.2929%
MultiSource/Applications/sgefa/sgefa
-4.24908% +/- 2.00413%
MultiSource/Benchmarks/ASC_Sequoia/IRSmk/IRSmk
-18.1294% +/- 3.96489%
regressions:
MultiSource/Benchmarks/TSVC/Reductions-dbl/Reductions-dbl
1.03249% +/- 0.178547%
MultiSource/Applications/hexxagon/hexxagon
1.16597% +/- 0.285235%
MultiSource/Benchmarks/TSVC/IndirectAddressing-flt/IndirectAddressing-flt
1.39576% +/- 1.07855%
SingleSource/Benchmarks/Misc-C++/stepanov_v1p2
1.71539% +/- 0.173182%
MultiSource/Benchmarks/Fhourstones-3.1/fhourstones3.1
1.90013% +/- 0.866472%
MultiSource/Benchmarks/TSVC/Recurrences-dbl/Recurrences-dbl
2.39854% +/- 1.05914%
MultiSource/Benchmarks/TSVC/ControlFlow-dbl/ControlFlow-dbl
2.4402% +/- 0.817904%
MultiSource/Benchmarks/TSVC/LoopRestructuring-dbl/LoopRestructuring-dbl
5.87997% +/- 3.3172%
MultiSource/Benchmarks/Trimaran/netbench-crc/netbench-crc
9.02643% +/- 5.79591%
MultiSource/Benchmarks/VersaBench/bmm/bmm
10.3517% +/- 1.227%
Obviously, there are data points on both sides of this; but I think, overall,
this supports making the change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@195951
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Lang Hames [Fri, 29 Nov 2013 06:35:30 +0000 (06:35 +0000)]
Teach LocalStackSlotAllocation that stackmaps/patchpoints don't have range
constraints on their frame offsets.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@195950
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Hal Finkel [Fri, 29 Nov 2013 06:32:17 +0000 (06:32 +0000)]
Create a PPC440 SchedMachineModel
Some of the older PPC processor definitions don't have associated
SchedMachineModels; correct this for the PPC440.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@195949
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Hal Finkel [Fri, 29 Nov 2013 06:19:43 +0000 (06:19 +0000)]
Fixup PPC440 load/store operand latencies
The operand latencies for loads and stores in the PPC440 itinerary were wrong
(the store operands are all inputs, and the "with update" (pre-increment)
instructions need a latency for the additional output).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@195948
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Hal Finkel [Fri, 29 Nov 2013 05:59:00 +0000 (05:59 +0000)]
Adjust PPC440 operand latencies
The operand latencies for the PPC440 should be specified relative to dispatch,
not relative to the initial fetch-and-decode stages. Because most instructions
(ignoring bypass) wait in dispatch until their operands are ready, this is
modeled as reading input operands "at dispatch" (0 cycles after issue), and so
every input and output operand has 4 cycles subtracted from it.
This could alter scheduling slightly, but I don't expect a large effect.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@195947
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Hal Finkel [Fri, 29 Nov 2013 05:58:38 +0000 (05:58 +0000)]
Don't model the fetch and decode units for the PPC440
Modeling the fetch and decode units in the PPC440 itinerary does not add
anything to the hazard detection capability (and so modeling them just wastes
compile time).
No functionality change intended.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@195946
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Lang Hames [Fri, 29 Nov 2013 03:36:53 +0000 (03:36 +0000)]
Remove unused variable from r195944.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@195945
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Lang Hames [Fri, 29 Nov 2013 03:07:54 +0000 (03:07 +0000)]
Refactor a lot of patchpoint/stackmap related code to simplify and make it
target independent.
Most of the x86 specific stackmap/patchpoint handling was necessitated by the
use of the native address-mode format for frame index operands. PEI has now
been modified to treat stackmap/patchpoint similarly to DEBUG_INFO, allowing
us to use a simple, platform independent register/offset pair for frame
indexes on stackmap/patchpoints.
Notes:
- Folding is now platform independent and automatically supported.
- Emiting patchpoints with direct memory references now just involves calling
the TargetLoweringBase::emitPatchPoint utility method from the target's
XXXTargetLowering::EmitInstrWithCustomInserter method. (See
X86TargetLowering for an example).
- No more ugly platform-specific operand parsers.
This patch shouldn't change the generated output for X86.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@195944
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Hao Liu [Fri, 29 Nov 2013 02:11:22 +0000 (02:11 +0000)]
AArch64: The pattern match should check the range of the immediate value.
Or we can generate some illegal instructions.
E.g. shrn2 v0.4s, v1.2d, #35. The legal range should be in [1, 16].
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@195941
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Jiangning Liu [Fri, 29 Nov 2013 01:38:08 +0000 (01:38 +0000)]
Add missing test case for bsl_f64 support of AArch64 NEON.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@195939
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Jiangning Liu [Fri, 29 Nov 2013 01:37:15 +0000 (01:37 +0000)]
Add missing pattern for supporting intrinsic function vbsl_f64 with
argument double floating point.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@195938
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Kevin Qin [Fri, 29 Nov 2013 01:29:16 +0000 (01:29 +0000)]
[AArch64 NEON]Fix a assertion failure when disassemble SHLL instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@195936
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Stephen Canon [Thu, 28 Nov 2013 21:38:05 +0000 (21:38 +0000)]
Rein in overzealous InstCombine of fptrunc(OP(fpextend, fpextend)).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@195934
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Rafael Espindola [Thu, 28 Nov 2013 20:12:44 +0000 (20:12 +0000)]
Refactor to remove a bit of duplication. No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@195933
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Benjamin Kramer [Thu, 28 Nov 2013 19:58:56 +0000 (19:58 +0000)]
Silence sign-compare warning and reduce nesting.
No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@195932
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Rafael Espindola [Thu, 28 Nov 2013 19:35:07 +0000 (19:35 +0000)]
Remove an always true parameter.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@195931
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NAKAMURA Takumi [Thu, 28 Nov 2013 17:04:31 +0000 (17:04 +0000)]
[CMake] Let add_public_tablegen_target() provide intrinsics_gen, too.
I think, in principle, intrinsics_gen may be added explicitly.
That said, it can be added incidentally, since each target already has dependencies to llvm-tblgen.
Almost all source files depend on both CommonTaleGen and intrinsics_gen.
Explicit add_dependencies() have been pruned under lib/Target.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@195929
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NAKAMURA Takumi [Thu, 28 Nov 2013 17:04:13 +0000 (17:04 +0000)]
[CMake] Also OptionTests can be free from add_dependencies() with add_public_tablegen_target().
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@195928
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NAKAMURA Takumi [Thu, 28 Nov 2013 17:04:04 +0000 (17:04 +0000)]
[CMake] Let add_public_tablegen_target responsible to provide dependency to CommonTableGen.
add_public_tablegen_target adds *CommonTableGen to LLVM_COMMON_DEPENDS.
LLVM_COMMON_DEPENDS affects add_llvm_library (and other add_target stuff) within its scope.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@195927
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Rafael Espindola [Thu, 28 Nov 2013 17:00:49 +0000 (17:00 +0000)]
The global prefix is always one char. Don't use a string for it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@195926
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NAKAMURA Takumi [Thu, 28 Nov 2013 15:30:37 +0000 (15:30 +0000)]
[CMake] Prune include_directories() in llvm/lib/Target, take #2.
I forgot to commit them. They were staging in my local repo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@195924
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Daniel Sanders [Thu, 28 Nov 2013 15:26:33 +0000 (15:26 +0000)]
[mips] Revert test commit r195922.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@195923
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Daniel Sanders [Thu, 28 Nov 2013 15:25:43 +0000 (15:25 +0000)]
[mips] A test commit to test my Herald and Audit workflow
Will be reverted in the next commit
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@195922
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NAKAMURA Takumi [Thu, 28 Nov 2013 14:53:30 +0000 (14:53 +0000)]
[CMake] Prune include_directories() in llvm/lib/Target. add_llvm_target() sets them.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@195921
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NAKAMURA Takumi [Thu, 28 Nov 2013 14:52:52 +0000 (14:52 +0000)]
Add newline at eof.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@195920
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Daniel Sanders [Thu, 28 Nov 2013 09:36:44 +0000 (09:36 +0000)]
As myself as code-owner of the MIPS backend (lib/Target/Mips/*)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@195915
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Peter Zotov [Thu, 28 Nov 2013 09:03:28 +0000 (09:03 +0000)]
[OCaml] Add a slash accidentally omitted from Makefile
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@195912
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Rafael Espindola [Thu, 28 Nov 2013 08:59:52 +0000 (08:59 +0000)]
Use the mangler consistently instead of using getGlobalPrefix directly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@195911
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Hal Finkel [Thu, 28 Nov 2013 06:05:59 +0000 (06:05 +0000)]
Don't share functional units among the PPC itineraries
Instead of sharing functional unit names between the various PPC itineraries,
give each core its own unit names prefixed with the core name. This follows
the convention used by other backends (such as ARM), and removes a non-obvious
ordering dependency between the various PPCSchedule*.td files.
No functionality change intended.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@195908
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Jiangning Liu [Thu, 28 Nov 2013 01:34:55 +0000 (01:34 +0000)]
Remove the variable only used by assert to avoid the build failure
caused by build options [-Werror,-Wunused-variable].
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@195905
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Hao Liu [Thu, 28 Nov 2013 01:07:45 +0000 (01:07 +0000)]
AArch64: Fix a bug about disassembling post-index load single element to 4 vectors
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@195903
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Reed Kotler [Thu, 28 Nov 2013 00:56:37 +0000 (00:56 +0000)]
Check in conditional branches for constant islands. Still need to finish
conditional branches for very large targets. That will be the next small
patch. Everything now should in principle work as good (functionality
wise) as without constant islands so we decided at Mips/Imagination to
make constant islands the default for Mips16 now so that it will get
excercised a lot and this port is still experimentatl though hopefully soon
we will change the status. Some more cleanup and code review is in order
but things are converging fast.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@195902
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Akira Hatanaka [Wed, 27 Nov 2013 23:58:32 +0000 (23:58 +0000)]
[mips] Redefine TAILCALL as a pseudo instruction.
No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@195896
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David Blaikie [Wed, 27 Nov 2013 23:53:52 +0000 (23:53 +0000)]
DebugInfo: Do not include variables only referenced by templates in aranges.
ARanges included even extern variables referenced by pointer non-type
template parameters even though that variable isn't part of this
compilation unit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@195895
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Akira Hatanaka [Wed, 27 Nov 2013 23:47:25 +0000 (23:47 +0000)]
Add MipsOptimizePICCall.cpp to CMakeLists.txt.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@195894
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Akira Hatanaka [Wed, 27 Nov 2013 23:38:42 +0000 (23:38 +0000)]
[mips] Implement the following optimizations using dominance information to
make PIC calls a little more efficient:
1. Remove instructions setting up $gp if it is known that a function has been
called at least once.
2. Save the address of a called function in a register instead of loading
it from the GOT at every call site.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@195892
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Hal Finkel [Wed, 27 Nov 2013 23:26:09 +0000 (23:26 +0000)]
Add IIC_ prefix to PPC instruction-class names
This adds the IIC_ prefix to the instruction itinerary class names, giving the
PPC backend a naming convention for itinerary classes that is more consistent
with that used by the X86 and ARM backends.
Instruction scheduling in the PPC backend needs a bunch of cleanup and
improvement (especially for the ooo cores). This is just a preliminary step.
No functionality change intended.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@195890
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Rafael Espindola [Wed, 27 Nov 2013 21:57:54 +0000 (21:57 +0000)]
Don't set GlobalPrefix to the default value.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@195884
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Rafael Espindola [Wed, 27 Nov 2013 21:52:37 +0000 (21:52 +0000)]
The R600 has its own asm printer which doesn't use GlobalPrefix. Drop it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@195883
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Tom Stellard [Wed, 27 Nov 2013 21:23:39 +0000 (21:23 +0000)]
R600: Expand vector FABS
NOTE: This is a candidate for the 3.4 branch.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@195881
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Tom Stellard [Wed, 27 Nov 2013 21:23:35 +0000 (21:23 +0000)]
R600/SI: Implement spilling of SGPRs v5
SGPRs are spilled into VGPRs using the {READ,WRITE}LANE_B32 instructions.
v2:
- Fix encoding of Lane Mask
- Use correct register flags, so we don't overwrite the low dword
when restoring multi-dword registers.
v3:
- Register spilling seems to hang the GPU, so replace all shaders
that need spilling with a dummy shader.
v4:
- Fix *LANE definitions
- Change destination reg class for 32-bit SMRD instructions
v5:
- Remove small optimization that was crashing Serious Sam 3.
https://bugs.freedesktop.org/show_bug.cgi?id=68224
https://bugs.freedesktop.org/show_bug.cgi?id=71285
NOTE: This is a candidate for the 3.4 branch.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@195880
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Tom Stellard [Wed, 27 Nov 2013 21:23:29 +0000 (21:23 +0000)]
R600/SI: Use SGPR_32 register class for 32-bit SMRD outputs
Writing to the M0 register from an SMRD instruction hangs the GPU, so
we need to use the SGPR_32 register class, which does not include M0.
NOTE: This is a candidate for the 3.4 branch.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@195879
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Tom Stellard [Wed, 27 Nov 2013 21:23:20 +0000 (21:23 +0000)]
R600: Add support for ISD::FROUND
NOTE: This is a candidate for the 3.4 branch.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@195878
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Lang Hames [Wed, 27 Nov 2013 20:10:16 +0000 (20:10 +0000)]
Show stackmap entry encodings in stackmap debug logs. This makes it easier to
cross-reference debug output with encoded stack-maps, and to create stackmap
test-cases.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@195874
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Rafael Espindola [Wed, 27 Nov 2013 19:22:14 +0000 (19:22 +0000)]
Use FileCheck and expand the test a bit.
In particular, check the name of the symbol we are putting in the constant pool.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@195865
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Rafael Espindola [Wed, 27 Nov 2013 18:38:14 +0000 (18:38 +0000)]
Remove dead code.
MO_ExternalSymbol and MO_JumpTableIndex don't show up in inline asm.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@195861
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Rafael Espindola [Wed, 27 Nov 2013 18:26:51 +0000 (18:26 +0000)]
Convert two if sequences to switches.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@195859
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Rafael Espindola [Wed, 27 Nov 2013 18:18:24 +0000 (18:18 +0000)]
Use a switch.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@195857
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Rafael Espindola [Wed, 27 Nov 2013 15:52:11 +0000 (15:52 +0000)]
Use the same tls section name as msvc.
We currently error in clang with:
"error: thread-local storage is unsupported for the current target", but we
can start to get the llvm level ready.
When compiling
template<typename T>
struct foo {
static __declspec(thread) int bar;
};
template<typename T>
__declspec(therad) int foo<T>::bar;
template struct foo<int>;
msvc produces
SECTION HEADER #3
.tls$ name
0 physical address
0 virtual address
4 size of raw data
12F file pointer to raw data (
0000012F to
00000132)
0 file pointer to relocation table
0 file pointer to line numbers
0 number of relocations
0 number of line numbers
C0301040 flags
Initialized Data
COMDAT; sym= "public: static int foo<int>::bar" (?bar@?$foo@H@@2HA)
4 byte align
Read Write
gcc produces a ".data$__emutls_v.<symbol>" for the testcase with
__declspec(thread) replaced with thread_local.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@195849
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Rafael Espindola [Wed, 27 Nov 2013 15:13:06 +0000 (15:13 +0000)]
Remove more dead code now that this is only used for inline asm.
MO_ConstantPoolIndex is handled in printLeaMemReference.
MO_JumpTableIndex and MO_ExternalSymbol don't show up in inline asm.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@195847
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Jiangning Liu [Wed, 27 Nov 2013 14:02:25 +0000 (14:02 +0000)]
Fix the AArch64 NEON bug exposed by checking constant integer argument range of ACLE intrinsics.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@195843
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Peter Zotov [Wed, 27 Nov 2013 11:03:18 +0000 (11:03 +0000)]
[OCaml] Embed rpath into stub libraries and native executables
This commit embeds a set of linker flags with hardcoded paths to
the LLVM shared library on --enable-shared builds into .cmxa files
and stub dynamic libraries. This solution closely follows existing
rules for rpath in the LLVM tools, which had to be modified because
of differences in toolchain.
Without this patch, OCaml tests as well as opam bindings broke,
as neither of those updates LD_LIBRARY_PATH to include
the $prefix/lib directory.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@195834
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Rafael Espindola [Wed, 27 Nov 2013 07:34:09 +0000 (07:34 +0000)]
Convert more methods in static helpers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@195826
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Rafael Espindola [Wed, 27 Nov 2013 07:14:26 +0000 (07:14 +0000)]
Convert these methods into static functions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@195825
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Rafael Espindola [Wed, 27 Nov 2013 06:53:13 +0000 (06:53 +0000)]
Cleanup and test X86AsmPrinter::printPCRelImm.
It is only used for asm printing.
On X86 we put basic block addresses on register before passing them to inline
asm, so the MO_MachineBasicBlock case was dead.
MO_ExternalSymbol was dead since any symbol being passed to inline asm
is represented as MO_GlobalAddress.
The MO_GlobalAddress and MO_Register cases were not tested.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@195824
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Sean Silva [Wed, 27 Nov 2013 04:55:23 +0000 (04:55 +0000)]
[docs] Mention gotcha regarding implicit BB numbering
Impetus for the clarification by Mikael Lyngvig.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@195812
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Hal Finkel [Wed, 27 Nov 2013 03:12:56 +0000 (03:12 +0000)]
Fix comment in PPCA2Model
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@195807
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Rafael Espindola [Wed, 27 Nov 2013 02:25:20 +0000 (02:25 +0000)]
Remove dead argument.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@195806
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Chad Rosier [Wed, 27 Nov 2013 01:45:58 +0000 (01:45 +0000)]
[AArch64] Add support for NEON scalar floating-point absolute difference.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@195803
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Chandler Carruth [Wed, 27 Nov 2013 01:32:17 +0000 (01:32 +0000)]
[PM] Remove the underspecified 'getRoot' method from CallGraph. It's
only user was an ancient SCC printing bit of the opt tool which really
should be walking the call graph the same way the CGSCC pass manager
does.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@195800
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Rafael Espindola [Wed, 27 Nov 2013 01:18:37 +0000 (01:18 +0000)]
Use simple section names for COMDAT sections on COFF.
With this patch we use simple names for COMDAT sections (like .text or .bss).
This matches the MSVC behavior.
When merging it is the COMDAT symbol that is used to decide if two sections
should be merged, so there is no point in building a fancy name.
This survived a bootstrap on mingw32.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@195798
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Chandler Carruth [Tue, 26 Nov 2013 22:36:41 +0000 (22:36 +0000)]
[PM] [cleanup] Replace a reserved identifier "_Self" with the injected
class name. I think we're no longer using any compilers with
sufficiently broken ICN for this use case, but I'll watch the bots and
introduce a typedef without a reserved name if any yell at me.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@195793
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Nadav Rotem [Tue, 26 Nov 2013 22:24:25 +0000 (22:24 +0000)]
PR1860 - We can't save a list of ExtractElement instructions to CSE because some of these instructions
may be removed and optimized in future iterations. Instead we save a list of basic blocks that we need to CSE.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@195791
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Eric Christopher [Tue, 26 Nov 2013 22:23:27 +0000 (22:23 +0000)]
80-column fixups.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@195790
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Chad Rosier [Tue, 26 Nov 2013 22:17:37 +0000 (22:17 +0000)]
[AArch64] Add support for NEON scalar floating-point to integer convert
instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@195788
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Arnold Schwaighofer [Tue, 26 Nov 2013 22:11:23 +0000 (22:11 +0000)]
LoopVectorizer: Truncate i64 trip counts of i32 phis if necessary
In signed arithmetic we could end up with an i64 trip count for an i32 phi.
Because it is signed arithmetic we know that this is only defined if the i32
does not wrap. It is therefore safe to truncate the i64 trip count to a i32
value.
Fixes PR18049.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@195787
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Chandler Carruth [Tue, 26 Nov 2013 20:55:11 +0000 (20:55 +0000)]
[PM] [cleanup] Run clang-format over this file. If fixes many
inconsistencies that I'll just need to fix myself as I edit things.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@195784
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Chandler Carruth [Tue, 26 Nov 2013 20:51:48 +0000 (20:51 +0000)]
[PM] [cleanup] Update doxygen comments to use the new style, add some
doxygen comments, make existing comments doxygen comments etc.
Also, switch commented-out debug helpers to #if-0-ed out debug helpers.
No functionality changed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@195783
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Peter Zotov [Tue, 26 Nov 2013 20:40:34 +0000 (20:40 +0000)]
[OCaml] Embed the flags necessary for linking with libLLVM.so into .cmxa files
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@195782
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Reed Kotler [Tue, 26 Nov 2013 20:38:40 +0000 (20:38 +0000)]
Fix a bug related to constant islands for Mips16 and mips16/32 dual mode.
The determination of when we are doing constant pools was being made too
early in the asm printer.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@195781
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Diego Novillo [Tue, 26 Nov 2013 20:37:33 +0000 (20:37 +0000)]
Refactor some code in SampleProfile.cpp
I'm adding new functionality in the sample profiler. This will
require more data to be kept around for each function, so I moved
the structure SampleProfile that we keep for each function into
a separate class.
There are no functional changes in this patch. It simply provides
a new home where to place all the new data that I need to propagate
weights through edges.
There are some other name and minor edits throughout.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@195780
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Michael Liao [Tue, 26 Nov 2013 20:31:31 +0000 (20:31 +0000)]
Fix PR18054
- Fix bug in (vsext (vzext x)) -> (vsext x) in SIGN_EXTEND_IN_REG
lowering where we need to check whether x is a vector type (in-reg
type) of i8, i16 or i32; otherwise, that optimization is not valid.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@195779
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