Pattern match vmrg* instructions, which are now lowered by the CFE into shuffles.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27457 91177308-0d34-0410-b5e6-96231b3b80d8

Infer element types for shuffle masks

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27456 91177308-0d34-0410-b5e6-96231b3b80d8

rename a method, to avoid confusion with llvm intrinsics.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27455 91177308-0d34-0410-b5e6-96231b3b80d8

test vperm promotion

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27454 91177308-0d34-0410-b5e6-96231b3b80d8

remove two done items

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27453 91177308-0d34-0410-b5e6-96231b3b80d8

Lower vperm(x,y, mask) -> shuffle(x,y,mask) if mask is constant.  This allows
us to compile oh-so-realistic stuff like this:

 vec_vperm(A, B, (vector unsigned char){14});

to:
        vspltb v0, v0, 14

instead of:

        vspltisb v0, 14
        vperm v0, v2, v1, v0

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27452 91177308-0d34-0410-b5e6-96231b3b80d8

this is no longer an intrinsic.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27451 91177308-0d34-0410-b5e6-96231b3b80d8

Support pattern matching vsldoi(x,y) and vsldoi(x,x), which allows the f.e. to
lower it and LLVM to have one fewer intrinsic.  This implements
CodeGen/PowerPC/vec_shuffle.ll

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27450 91177308-0d34-0410-b5e6-96231b3b80d8

new testcase

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27449 91177308-0d34-0410-b5e6-96231b3b80d8

Compile the vpkuhum/vpkuwum intrinsics into vpkuhum/vpkuwum instead of into
vperm with a perm mask lvx'd from the constant pool.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27448 91177308-0d34-0410-b5e6-96231b3b80d8

Add support for building the LLVM libraries and tools as a Mac OS/X
universal binary, by specifying UNIVERSAL=1 on the make command line.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27447 91177308-0d34-0410-b5e6-96231b3b80d8

POR encoded as PAND, yikes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27446 91177308-0d34-0410-b5e6-96231b3b80d8

An entry about comi / ucomi intrinsics.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27445 91177308-0d34-0410-b5e6-96231b3b80d8

Support for comi / ucomi intrinsics.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27444 91177308-0d34-0410-b5e6-96231b3b80d8

Added comi and ucomi SSE intrinsics.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27443 91177308-0d34-0410-b5e6-96231b3b80d8

Add all of the data stream intrinsics and instructions.  woo

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27442 91177308-0d34-0410-b5e6-96231b3b80d8

add altivec ds* intrinsics

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27441 91177308-0d34-0410-b5e6-96231b3b80d8

Fix a typo

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27440 91177308-0d34-0410-b5e6-96231b3b80d8

Fix CodeGen/PowerPC/2006-04-05-splat-ish.ll

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27439 91177308-0d34-0410-b5e6-96231b3b80d8

new testcase that was miscompiled to vspltisb

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27438 91177308-0d34-0410-b5e6-96231b3b80d8

Handle canonical form of e.g.
vector_shuffle v1, v1, <0, 4, 1, 5, 2, 6, 3, 7>

This is turned into
vector_shuffle v1, <undef>, <0, 0, 1, 1, 2, 2, 3, 3>
by dag combiner.

It would match a {p}unpckl on x86.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27437 91177308-0d34-0410-b5e6-96231b3b80d8

Make a vector live across blocks have the correct Vec type.  This fixes
CodeGen/X86/2006-04-04-CrossBlockCrash.ll

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27436 91177308-0d34-0410-b5e6-96231b3b80d8

new testcase

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27435 91177308-0d34-0410-b5e6-96231b3b80d8

Bogus assert

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27434 91177308-0d34-0410-b5e6-96231b3b80d8

Fallthrough to expand if a VECTOR_SHUFFLE cannot be custom lowered.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27433 91177308-0d34-0410-b5e6-96231b3b80d8

Exapnd a VECTOR_SHUFFLE to a BUILD_VECTOR if target asks for it to be expanded
or custom lowering fails.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27432 91177308-0d34-0410-b5e6-96231b3b80d8

Fix more tablegen depedency issues in Visual Studio.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27431 91177308-0d34-0410-b5e6-96231b3b80d8

Separate out to 2 test cases

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27430 91177308-0d34-0410-b5e6-96231b3b80d8

make this test less exacting

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27429 91177308-0d34-0410-b5e6-96231b3b80d8

revert this, this is safe, if conservative.  leave a note to that effect

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27428 91177308-0d34-0410-b5e6-96231b3b80d8

Handle v8i16 shuffle that must be broken into a pair of pshufhw / pshuflw.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27427 91177308-0d34-0410-b5e6-96231b3b80d8

Add a new shuffle test case that requires pshuflw / pshufhw pair.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27426 91177308-0d34-0410-b5e6-96231b3b80d8

add vsl

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27425 91177308-0d34-0410-b5e6-96231b3b80d8

Get the types right, third time is the charm.  Add vsl.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27424 91177308-0d34-0410-b5e6-96231b3b80d8

add vmladduhm

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27423 91177308-0d34-0410-b5e6-96231b3b80d8

correct the type of two intrinsics, add int_ppc_altivec_vmladduhm

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27422 91177308-0d34-0410-b5e6-96231b3b80d8

Add m[tf]vscr instructions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27421 91177308-0d34-0410-b5e6-96231b3b80d8

Add m[tf]vscr intrinsics.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27420 91177308-0d34-0410-b5e6-96231b3b80d8

add a note

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27419 91177308-0d34-0410-b5e6-96231b3b80d8

Add missing byte merges.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27418 91177308-0d34-0410-b5e6-96231b3b80d8

Add FP -> Int Conversions

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27417 91177308-0d34-0410-b5e6-96231b3b80d8

add average intrinsics

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27416 91177308-0d34-0410-b5e6-96231b3b80d8

add average intrinsics.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27415 91177308-0d34-0410-b5e6-96231b3b80d8

add a note

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27414 91177308-0d34-0410-b5e6-96231b3b80d8

Fix some broken logic that would cause us to codegen {2147483647,2147483647,2147483647,2147483647} as 'vspltisb v0, -1'.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27413 91177308-0d34-0410-b5e6-96231b3b80d8

Added pslldq and psrldq.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27412 91177308-0d34-0410-b5e6-96231b3b80d8

Added intrinsics to match __builtin_ia32_pslldqi128 and
__builtin_ia32_psrldqi128.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27411 91177308-0d34-0410-b5e6-96231b3b80d8

Minor fixes + naming changes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27410 91177308-0d34-0410-b5e6-96231b3b80d8

How could this ever have worked?

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27409 91177308-0d34-0410-b5e6-96231b3b80d8

PSHUF* encoding bugs.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27405 91177308-0d34-0410-b5e6-96231b3b80d8

Make sure to consider alignment of variable sized objects.
This, along with the previous dag combiner fix, fixes
CodeGen/Alpha/2006-04-04-zextload.ll

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27403 91177308-0d34-0410-b5e6-96231b3b80d8

Do not create ZEXTLOAD's unless we are before legalize or the operation is
legal.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27402 91177308-0d34-0410-b5e6-96231b3b80d8

New testcase

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27401 91177308-0d34-0410-b5e6-96231b3b80d8

Ask legalize to promote all vector shuffles to be v16i8 instead of having to
handle all 4 PPC vector types.   This simplifies the matching code and allows
us to eliminate a bunch of patterns.  This also adds cases we were missing,
such as CodeGen/PowerPC/vec_splat.ll:splat_h.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27400 91177308-0d34-0410-b5e6-96231b3b80d8

* Add supprot for SCALAR_TO_VECTOR operations where the input needs to be
  promoted/expanded (e.g. SCALAR_TO_VECTOR from i8/i16 on PPC).
* Add support for targets to request that VECTOR_SHUFFLE nodes be promoted
  to a canonical type, for example, we only want v16i8 shuffles on PPC.
* Move isShuffleLegal out of TLI into Legalize.
* Teach isShuffleLegal to allow shuffles that need to be promoted.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27399 91177308-0d34-0410-b5e6-96231b3b80d8

Move isShuffleLegal from TLI to Legalize.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27398 91177308-0d34-0410-b5e6-96231b3b80d8

new testcase

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27397 91177308-0d34-0410-b5e6-96231b3b80d8

Signed shr by a constant is not the same as sdiv by 2^k

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27395 91177308-0d34-0410-b5e6-96231b3b80d8

cmpps / cmppd encoding bug

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27393 91177308-0d34-0410-b5e6-96231b3b80d8

Fix the types for these intrinsics.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27392 91177308-0d34-0410-b5e6-96231b3b80d8

Constant fold bitconvert(undef)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27391 91177308-0d34-0410-b5e6-96231b3b80d8

Allow targets to have fine grained control over which types various ops get
promoted to, if they desire.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27389 91177308-0d34-0410-b5e6-96231b3b80d8

Compact some intrinsic definitions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27388 91177308-0d34-0410-b5e6-96231b3b80d8

Plug in the byte and short splats

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27387 91177308-0d34-0410-b5e6-96231b3b80d8

Revert accidentally committed hunks.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27386 91177308-0d34-0410-b5e6-96231b3b80d8

Make sure to mark unsupported SCALAR_TO_VECTOR operations as expand.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27385 91177308-0d34-0410-b5e6-96231b3b80d8

Some SSE1 intrinsics: min, max, sqrt, etc.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27384 91177308-0d34-0410-b5e6-96231b3b80d8

revert previous patch

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27383 91177308-0d34-0410-b5e6-96231b3b80d8

Use movlpd to: store lower f64 extracted from v2f64.
Use movhpd to: store upper f64 extracted from v2f64.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27382 91177308-0d34-0410-b5e6-96231b3b80d8

Force use of a frame-pointer if there is anything on the stack that is aligned
more than the OS keeps the stack aligned.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27381 91177308-0d34-0410-b5e6-96231b3b80d8

The stack alignment is now computed dynamically, just verify it is correct.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27380 91177308-0d34-0410-b5e6-96231b3b80d8

Remove unused method

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27379 91177308-0d34-0410-b5e6-96231b3b80d8

Keep track of max stack alignment as objects are added.  Remove an obsolete method.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27378 91177308-0d34-0410-b5e6-96231b3b80d8

- More efficient extract_vector_elt with shuffle and movss, movsd, movd, etc.
- Some bug fixes and naming inconsistency fixes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27377 91177308-0d34-0410-b5e6-96231b3b80d8

Align vectors to the size in bytes, not bits.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27376 91177308-0d34-0410-b5e6-96231b3b80d8

Add a missing check, this fixes UnitTests/Vector/sumarray.c

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27375 91177308-0d34-0410-b5e6-96231b3b80d8

Add a missing check, which broke a bunch of vector tests.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27374 91177308-0d34-0410-b5e6-96231b3b80d8

shrinkify intrinsics more by using some local classes

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27373 91177308-0d34-0410-b5e6-96231b3b80d8

Add the full set of min/max instructions

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27372 91177308-0d34-0410-b5e6-96231b3b80d8

Add some classes to make it easier to define intrinsics.  Add min/max intrinsics.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27371 91177308-0d34-0410-b5e6-96231b3b80d8

support x * (c1 + c2) where c1 and c2 are pow2s.  special case for c2 == 4

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27370 91177308-0d34-0410-b5e6-96231b3b80d8

test powers of 2

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27369 91177308-0d34-0410-b5e6-96231b3b80d8

mul by const conversion sequences.  more coming soon

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27368 91177308-0d34-0410-b5e6-96231b3b80d8

back this out

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27367 91177308-0d34-0410-b5e6-96231b3b80d8

test some more mul by constant removal

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27366 91177308-0d34-0410-b5e6-96231b3b80d8

Make sure mul by constant 5 is turned into a s4addq

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27365 91177308-0d34-0410-b5e6-96231b3b80d8

This should be a win of every arch

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27364 91177308-0d34-0410-b5e6-96231b3b80d8

This makes McCat/12-IOtest go 8x faster or so

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27363 91177308-0d34-0410-b5e6-96231b3b80d8

This will be needed soon

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27362 91177308-0d34-0410-b5e6-96231b3b80d8

For PR722:
Change the check for llvm-gcc from using LLVMGCCDIR to LLVMGCC. This checks
for the actual tool rather than the directory in which the tool resides. In
the case of this bug, it is possible that the directory exists but that the
tools in that directory do not. This fix should avoid the makefile from
erroneously proceeding without the actual tools being available.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27361 91177308-0d34-0410-b5e6-96231b3b80d8

add a note

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27360 91177308-0d34-0410-b5e6-96231b3b80d8

Inform the dag combiner that the predicate compares only return a low bit.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27359 91177308-0d34-0410-b5e6-96231b3b80d8

relax assertion

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27358 91177308-0d34-0410-b5e6-96231b3b80d8

Allow targets to compute masked bits for intrinsics.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27357 91177308-0d34-0410-b5e6-96231b3b80d8

Add a little dag combine to compile this:

int %AreSecondAndThirdElementsBothNegative(<4 x float>* %in) {
entry:
        %tmp1 = load <4 x float>* %in           ; <<4 x float>> [#uses=1]
        %tmp = tail call int %llvm.ppc.altivec.vcmpgefp.p( int 1, <4 x float> < float 0x7FF8000000000000, float 0.000000e+00, float 0.000000e+00, float 0x7FF8000000000000 >, <4 x float> %tmp1 )           ; <int> [#uses=1]
        %tmp = seteq int %tmp, 0                ; <bool> [#uses=1]
        %tmp3 = cast bool %tmp to int           ; <int> [#uses=1]
        ret int %tmp3
}

into this:

_AreSecondAndThirdElementsBothNegative:
        mfspr r2, 256
        oris r4, r2, 49152
        mtspr 256, r4
        li r4, lo16(LCPI1_0)
        lis r5, ha16(LCPI1_0)
        lvx v0, 0, r3
        lvx v1, r5, r4
        vcmpgefp. v0, v1, v0
        mfcr r3, 2
        rlwinm r3, r3, 27, 31, 31
        mtspr 256, r2
        blr

instead of this:

_AreSecondAndThirdElementsBothNegative:
        mfspr r2, 256
        oris r4, r2, 49152
        mtspr 256, r4
        li r4, lo16(LCPI1_0)
        lis r5, ha16(LCPI1_0)
        lvx v0, 0, r3
        lvx v1, r5, r4
        vcmpgefp. v0, v1, v0
        mfcr r3, 2
        rlwinm r3, r3, 27, 31, 31
        xori r3, r3, 1
        cntlzw r3, r3
        srwi r3, r3, 5
        mtspr 256, r2
        blr

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27356 91177308-0d34-0410-b5e6-96231b3b80d8

vector casts of casts are eliminable.  Transform this:

        %tmp = cast <4 x uint> %tmp to <4 x int>                ; <<4 x int>> [#uses=1]
        %tmp = cast <4 x int> %tmp to <4 x float>               ; <<4 x float>> [#uses=1]

into:

        %tmp = cast <4 x uint> %tmp to <4 x float>              ; <<4 x float>> [#uses=1]

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27355 91177308-0d34-0410-b5e6-96231b3b80d8

vector casts never reinterpret bits

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27354 91177308-0d34-0410-b5e6-96231b3b80d8

Allow transforming this:

        %tmp = cast <4 x uint>* %testData to <4 x int>*         ; <<4 x int>*> [#uses=1]
        %tmp = load <4 x int>* %tmp             ; <<4 x int>> [#uses=1]

to this:

        %tmp = load <4 x uint>* %testData               ; <<4 x uint>> [#uses=1]
        %tmp = cast <4 x uint> %tmp to <4 x int>                ; <<4 x int>> [#uses=1]

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27353 91177308-0d34-0410-b5e6-96231b3b80d8

Turn altivec lvx/stvx intrinsics into loads and stores.  This allows the
elimination of one load from this:

int AreSecondAndThirdElementsBothNegative( vector float *in ) {
#define QNaN 0x7FC00000
const vector unsigned int testData = (vector unsigned int)( QNaN, 0, 0, QNaN );
vector float test = vec_ld( 0, (float*) &testData );
return ! vec_any_ge( test, *in );
}

Now generating:

_AreSecondAndThirdElementsBothNegative:
        mfspr r2, 256
        oris r4, r2, 49152
        mtspr 256, r4
        li r4, lo16(LCPI1_0)
        lis r5, ha16(LCPI1_0)
        addi r6, r1, -16
        lvx v0, r5, r4
        stvx v0, 0, r6
        lvx v1, 0, r3
        vcmpgefp. v0, v0, v1
        mfcr r3, 2
        rlwinm r3, r3, 27, 31, 31
        xori r3, r3, 1
        cntlzw r3, r3
        srwi r3, r3, 5
        mtspr 256, r2
        blr

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27352 91177308-0d34-0410-b5e6-96231b3b80d8

Remove done item

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27351 91177308-0d34-0410-b5e6-96231b3b80d8