Johnny Chen [Tue, 5 Apr 2011 00:16:18 +0000 (00:16 +0000)]
Fix SRS/SRSW encoding bits.
rdar://problem/
9230801 ARM disassembler discrepancy: erroneously accepting SRS
Plus add invalid-RFEorLDMIA-arm.txt test which should have been checked in with
http://llvm.org/viewvc/llvm-project?view=rev&revision=128859.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128864
91177308-0d34-0410-b5e6-
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Johnny Chen [Mon, 4 Apr 2011 23:57:05 +0000 (23:57 +0000)]
A8.6.105 MUL
Inst{15-12} should be specified as 0b0000.
rdar://problem/
9231168 ARM disassembler discrepancy: erroneously accepting MUL
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128862
91177308-0d34-0410-b5e6-
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Bill Wendling [Mon, 4 Apr 2011 23:42:51 +0000 (23:42 +0000)]
Add info on where to get 2.9 final svn sources.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128860
91177308-0d34-0410-b5e6-
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Johnny Chen [Mon, 4 Apr 2011 23:39:08 +0000 (23:39 +0000)]
RFE encoding should also specify the "should be" encoding bits.
rdar://problem/
9229922 ARM disassembler discrepancy: erroneously accepting RFE
Also LDC/STC instructions are predicated while LDC2/STC2 instructions are not, fixed while
doing regression testings.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128859
91177308-0d34-0410-b5e6-
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Jim Grosbach [Mon, 4 Apr 2011 23:20:40 +0000 (23:20 +0000)]
Add missing file from r128851.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128856
91177308-0d34-0410-b5e6-
96231b3b80d8
Jim Grosbach [Mon, 4 Apr 2011 23:04:39 +0000 (23:04 +0000)]
Layer the memory manager between the JIT and the runtime Dyld.
The JITMemory manager references LLVM IR constructs directly, while the
runtime Dyld works at a lower level and can handle objects which may not
originate from LLVM IR. Introduce a new layer for the memory manager to
handle the interface between them. For the MCJIT, this layer will be almost
entirely simply a call-through w/ translation between the IR objects and
symbol names.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128851
91177308-0d34-0410-b5e6-
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Joerg Sonnenberger [Mon, 4 Apr 2011 21:38:17 +0000 (21:38 +0000)]
Make OpcodeMask an unsigned long long literal to deal with overflow.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128847
91177308-0d34-0410-b5e6-
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Jakob Stoklund Olesen [Mon, 4 Apr 2011 21:00:03 +0000 (21:00 +0000)]
Allow coalescing with reserved physregs in certain cases:
When a virtual register has a single value that is defined as a copy of a
reserved register, permit that copy to be joined. These virtual register are
usually copies of the stack pointer:
%vreg75<def> = COPY %ESP; GR32:%vreg75
MOV32mr %vreg75, 1, %noreg, 0, %noreg, %vreg74<kill>
MOV32mi %vreg75, 1, %noreg, 8, %noreg, 0
MOV32mi %vreg75<kill>, 1, %noreg, 4, %noreg, 0
CALLpcrel32 ...
Coalescing these virtual registers early decreases register pressure.
Previously, they were coalesced by RALinScan::attemptTrivialCoalescing after
register allocation was completed.
The lower register pressure causes the mcinst-lowering-cmp0.ll test case to fail
because it depends on linear scan spilling a particular register.
I am deleting 2008-08-05-SpillerBug.ll because it is counting the number of
instructions emitted, and its revision history shows the 'correct' count being
edited many times.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128845
91177308-0d34-0410-b5e6-
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Jakob Stoklund Olesen [Mon, 4 Apr 2011 20:59:59 +0000 (20:59 +0000)]
Extract physreg joining policy to a separate method.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128844
91177308-0d34-0410-b5e6-
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Johnny Chen [Mon, 4 Apr 2011 20:35:31 +0000 (20:35 +0000)]
Fix incorrect alignment for NEON VST2b32_UPD.
rdar://problem/
9225433
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128841
91177308-0d34-0410-b5e6-
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Devang Patel [Mon, 4 Apr 2011 19:51:17 +0000 (19:51 +0000)]
Update BreakpointPrinter to emit original function names only.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128839
91177308-0d34-0410-b5e6-
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Jakob Stoklund Olesen [Mon, 4 Apr 2011 17:57:29 +0000 (17:57 +0000)]
Insert code in the right location when lowering PowerPC atomics.
This causes defs to dominate uses, no instructions after terminators, and other
goodness.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128836
91177308-0d34-0410-b5e6-
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Jakob Stoklund Olesen [Mon, 4 Apr 2011 17:57:26 +0000 (17:57 +0000)]
Disable the PowerPC/Atomics-64 test.
The code inserted by PPCTargetLowering::EmitInstrWithCustomInserter for ppc64 is
wrong, and I don't know how to fix it. It seems to be using the correct register
classes for pointers, but it inserts all 32-bit instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128835
91177308-0d34-0410-b5e6-
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Eric Christopher [Mon, 4 Apr 2011 17:36:11 +0000 (17:36 +0000)]
Remove unused function.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128834
91177308-0d34-0410-b5e6-
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Bruno Cardoso Lopes [Mon, 4 Apr 2011 17:18:19 +0000 (17:18 +0000)]
- Implement asm parsing support for LDRSBT, LDRHT, LDRSHT and STRHT
also fix the encoding of the later.
- Add a new encoding bit to describe the index mode used in AM3.
- Teach printAddrMode3Operand to check by the addressing mode which
index mode to print.
- Testcases.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128832
91177308-0d34-0410-b5e6-
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Chris Lattner [Mon, 4 Apr 2011 17:17:57 +0000 (17:17 +0000)]
silence an unused function warning.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128831
91177308-0d34-0410-b5e6-
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Akira Hatanaka [Mon, 4 Apr 2011 17:11:07 +0000 (17:11 +0000)]
Move transformation of JmpLink and related nodes done during instruction selection to Legalize phase.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128830
91177308-0d34-0410-b5e6-
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Jakob Stoklund Olesen [Mon, 4 Apr 2011 17:07:09 +0000 (17:07 +0000)]
PowerPC atomic pseudos clobber CR0, they don't read it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128829
91177308-0d34-0410-b5e6-
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Jakob Stoklund Olesen [Mon, 4 Apr 2011 17:07:06 +0000 (17:07 +0000)]
Use X0 instead of R0 for the zero register on ppc64.
The 32-bit R0 cannot be used where a 64-bit register is expected.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128828
91177308-0d34-0410-b5e6-
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Jakob Stoklund Olesen [Mon, 4 Apr 2011 17:07:03 +0000 (17:07 +0000)]
Fix PowerPC tests to be register allocator independent.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128827
91177308-0d34-0410-b5e6-
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Joerg Sonnenberger [Mon, 4 Apr 2011 16:58:13 +0000 (16:58 +0000)]
Add support for the VIA PadLock instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128826
91177308-0d34-0410-b5e6-
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Joerg Sonnenberger [Mon, 4 Apr 2011 16:25:38 +0000 (16:25 +0000)]
Use array_lengthof
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128823
91177308-0d34-0410-b5e6-
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Joerg Sonnenberger [Mon, 4 Apr 2011 15:58:30 +0000 (15:58 +0000)]
Expand Op0Mask by one bit in preparation for the PadLock prefixes.
Define most shift masks incrementally to reduce the redundant
hard-coding. Introduce new shift for the VEX flags to replace the
magic constant 32 in various places.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128822
91177308-0d34-0410-b5e6-
96231b3b80d8
Jakob Stoklund Olesen [Mon, 4 Apr 2011 15:32:15 +0000 (15:32 +0000)]
Stop caching basic block index ranges now that SlotIndexes can keep up.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128821
91177308-0d34-0410-b5e6-
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Jakob Stoklund Olesen [Mon, 4 Apr 2011 15:32:11 +0000 (15:32 +0000)]
Delete leftover data members.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128820
91177308-0d34-0410-b5e6-
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Joerg Sonnenberger [Mon, 4 Apr 2011 14:42:22 +0000 (14:42 +0000)]
Change loops to derive the number of tables automatically
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128818
91177308-0d34-0410-b5e6-
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Duncan Sands [Mon, 4 Apr 2011 11:09:08 +0000 (11:09 +0000)]
Dragonegg release notes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128812
91177308-0d34-0410-b5e6-
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Jay Foad [Mon, 4 Apr 2011 07:44:02 +0000 (07:44 +0000)]
Remove some support for ReturnInsts with multiple operands, and for
returning a scalar value in a function whose return type is a single-
element structure or array.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128810
91177308-0d34-0410-b5e6-
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Tobias Grosser [Mon, 4 Apr 2011 07:19:18 +0000 (07:19 +0000)]
Region: Allow user control the printing style of the print function.
Contributed by: etherzhhb@gmail.com
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128808
91177308-0d34-0410-b5e6-
96231b3b80d8
Peter Collingbourne [Mon, 4 Apr 2011 00:57:03 +0000 (00:57 +0000)]
IntrusiveRefCntPtr: in RefCountedBase and RefCountedBaseVPTR, make
ref_cnt mutable and Retain/Release const to enable reference counted
pointers to const objects
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128804
91177308-0d34-0410-b5e6-
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Eli Friedman [Mon, 4 Apr 2011 00:37:38 +0000 (00:37 +0000)]
Attempt to fix breakage from r128782 reported by Francois Pichet on
llvm-commits. (Not sure why it only breaks on Windows; maybe it has
something to do with the iterator representation...)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128802
91177308-0d34-0410-b5e6-
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Eric Christopher [Sun, 3 Apr 2011 23:51:47 +0000 (23:51 +0000)]
Start migrating mach-o dumping facilities to the object file out of a
separate executable.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128801
91177308-0d34-0410-b5e6-
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Eric Christopher [Sun, 3 Apr 2011 23:07:51 +0000 (23:07 +0000)]
Move Object.cpp out of VMCore and into Object.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128800
91177308-0d34-0410-b5e6-
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Eric Christopher [Sun, 3 Apr 2011 22:53:19 +0000 (22:53 +0000)]
Assorted bugfixes in object file handling:
- Adds support for sniffing PE/COFF files on win32 (.exe and .dll)
which are COFF files that have an MS-DOS compatibility stub on
the front of them.
- Fixes a bug in the COFFObjectFile's support for the Microsoft COFF
extension for long symbol names, wherein it was attempting to parse
the leading '/' in an extended symbol name reference as part of the
integer offset.
- Fixes bugs in COFFObjectFile and ELFObjectFile wherein section
and symbol iterators were being returned with uninitialized bytes;
the type DataRefImpl is a union between 2 32-bit words (d.a and d.b)
and a single intptr_t word (p). Only p was being initialized, so in
32-bit builds the result would be iterators with random upper 32-bit
words in their DataRefImpls. This caused random failures when
seeking around in object files.
Patch by Graydon Hoare!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128799
91177308-0d34-0410-b5e6-
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Eric Christopher [Sun, 3 Apr 2011 22:34:07 +0000 (22:34 +0000)]
Add a set of C bindings for the Object interface.
Patch by Patrick Walton!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128798
91177308-0d34-0410-b5e6-
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Frits van Bommel [Sun, 3 Apr 2011 19:46:28 +0000 (19:46 +0000)]
Remove the LLVMContext& arguments from *Folder constructors, as they don't seem to be used anywhere.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128793
91177308-0d34-0410-b5e6-
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Oscar Fuentes [Sun, 3 Apr 2011 16:12:38 +0000 (16:12 +0000)]
Fix typos on LLVM.cmake. Export LLVM_ON_UNIX & LLVM_ON_WIN32.
Patch by arrowdodger!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128789
91177308-0d34-0410-b5e6-
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Eli Friedman [Sat, 2 Apr 2011 22:45:17 +0000 (22:45 +0000)]
PR9446: RecursivelyDeleteTriviallyDeadInstructions can delete the instruction
after the given instruction; make sure to handle that case correctly.
(It's difficult to trigger; the included testcase involves a dead
block, but I don't think that's a requirement.)
While I'm here, get rid of the unnecessary warning about
SimplifyInstructionsInBlock, since it should work correctly as far as I know.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128782
91177308-0d34-0410-b5e6-
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Eli Friedman [Sat, 2 Apr 2011 22:11:56 +0000 (22:11 +0000)]
Don't assume something which might be a constant expression is an instruction.
Based on PR9429, but no testcase because I can't figure out how to trigger it
anymore given other changes to the relevant code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128781
91177308-0d34-0410-b5e6-
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Benjamin Kramer [Sat, 2 Apr 2011 18:50:58 +0000 (18:50 +0000)]
While SimplifyDemandedBits constant folds this, we can't rely on it here.
It's possible to craft an input that hits the recursion limits in a way
that SimplifyDemandedBits doesn't simplify the icmp but ComputeMaskedBits
can infer which bits are zero.
No test case as it depends on too many other things. Fixes PR9609.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128777
91177308-0d34-0410-b5e6-
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Oscar Fuentes [Sat, 2 Apr 2011 13:21:12 +0000 (13:21 +0000)]
Handle changing of LLVM_ENABLE_FFI.
If someone first configure build with LLVM_ENABLE_FFI=1 and then turn it
off, the build will fail in lib/ExecutionEngine/Interpreter because
Interpreter will try still to #include <ffi/ffi.h>, but there are no
include_directories(${FFI_INCLUDE_DIR}) now.
This patch unset()'s HAVE_FFI_H and HAVE_FFI_FFI_H from cache file if
LLVM_ENABLE_FFI=0. This forces CMake to update config.h.
Patch by arrowdodger!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128769
91177308-0d34-0410-b5e6-
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Che-Liang Chiou [Sat, 2 Apr 2011 08:51:39 +0000 (08:51 +0000)]
ptx: support setp's 4-operand format
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128767
91177308-0d34-0410-b5e6-
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Jakob Stoklund Olesen [Sat, 2 Apr 2011 06:03:38 +0000 (06:03 +0000)]
Use InterferenceCache in RegAllocGreedy.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128765
91177308-0d34-0410-b5e6-
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Jakob Stoklund Olesen [Sat, 2 Apr 2011 06:03:35 +0000 (06:03 +0000)]
Add an InterferenceCache class for caching per-block interference ranges.
When the greedy register allocator is splitting multiple global live ranges, it
tends to look at the same interference data many times. The InterferenceCache
class caches queries for unaltered LiveIntervalUnions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128764
91177308-0d34-0410-b5e6-
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Jakob Stoklund Olesen [Sat, 2 Apr 2011 06:03:31 +0000 (06:03 +0000)]
Use basic block numbers as indexes when mapping slot index ranges.
This is more compact and faster than using DenseMap.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128763
91177308-0d34-0410-b5e6-
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Cameron Zwarich [Sat, 2 Apr 2011 02:40:43 +0000 (02:40 +0000)]
Do some peephole optimizations to remove pointless VMOVs from Neon to integer
registers that arise from argument shuffling with the soft float ABI. These
instructions are particularly slow on Cortex A8. This fixes one half of
<rdar://problem/
8674845>.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128759
91177308-0d34-0410-b5e6-
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Cameron Zwarich [Sat, 2 Apr 2011 02:40:26 +0000 (02:40 +0000)]
Add a RemoveFromWorklist method to DCI. This is needed to do some complicated
transformations in target-specific DAG combines without causing DAGCombiner to
delete the same node twice. If you know of a better way to avoid this (see my
next patch for an example), please let me know.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128758
91177308-0d34-0410-b5e6-
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Johnny Chen [Sat, 2 Apr 2011 02:24:54 +0000 (02:24 +0000)]
Fixed a bug in disassembly of STR_POST, where the immediate is the second operand in am2offset;
instead of the second operand in addrmode_imm12.
rdar://problem/
9225289
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128757
91177308-0d34-0410-b5e6-
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Akira Hatanaka [Sat, 2 Apr 2011 00:26:12 +0000 (00:26 +0000)]
Undo changes mistakenly made in revision 128750.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128751
91177308-0d34-0410-b5e6-
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Akira Hatanaka [Sat, 2 Apr 2011 00:15:58 +0000 (00:15 +0000)]
Insert space before ';' to prevent warnings.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128750
91177308-0d34-0410-b5e6-
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Johnny Chen [Fri, 1 Apr 2011 23:30:25 +0000 (23:30 +0000)]
Fixed MOVr for "should be" encoding bits for Inst{19-16} = 0b0000.
rdar://problem/
9224276
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128749
91177308-0d34-0410-b5e6-
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Johnny Chen [Fri, 1 Apr 2011 23:15:50 +0000 (23:15 +0000)]
MOVs should have Inst{19-16} as 0b0000, otherwise, the instruction is UNPREDICTABLE.
rdar://problem/
9224120
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128748
91177308-0d34-0410-b5e6-
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Johnny Chen [Fri, 1 Apr 2011 22:32:51 +0000 (22:32 +0000)]
Fix the instruction table entries for AI1_adde_sube_s_irs multiclass definition so that
all the instruction have:
let Inst{31-27} = 0b1110; // non-predicated
Before, the ARM decoder was confusing:
> 0x40 0xf3 0xb8 0x80
as:
Opcode=16 Name=ADCSSrs Format=ARM_FORMAT_DPSOREGFRM(5)
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
-------------------------------------------------------------------------------------------------
| 1: 0: 0: 0| 0: 0: 0: 0| 1: 0: 1: 1| 1: 0: 0: 0| 1: 1: 1: 1| 0: 0: 1: 1| 0: 1: 0: 0| 0: 0: 0: 0|
-------------------------------------------------------------------------------------------------
adcs pc, r8, r0, asr #6
since the cond field for ADCSSrs is a wild card, and so is ADCrs, with the ADCSSrs having Inst{20} as '1'.
Now, the AR decoder behaves correctly:
> 0x40 0xf3 0xb8 0x80
> END
Executing command: /Volumes/data/lldb/llvm/Debug+Asserts/bin/llvm-mc -disassemble -triple=arm-apple-darwin -debug-only=arm-disassembler mc-input.txt
Opcode=19 Name=ADCrs Format=ARM_FORMAT_DPSOREGFRM(5)
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
-------------------------------------------------------------------------------------------------
| 1: 0: 0: 0| 0: 0: 0: 0| 1: 0: 1: 1| 1: 0: 0: 0| 1: 1: 1: 1| 0: 0: 1: 1| 0: 1: 0: 0| 0: 0: 0: 0|
-------------------------------------------------------------------------------------------------
adcshi pc, r8, r0, asr #6
>
rdar://problem/
9223094
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128746
91177308-0d34-0410-b5e6-
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Benjamin Kramer [Fri, 1 Apr 2011 22:29:18 +0000 (22:29 +0000)]
Fix comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128745
91177308-0d34-0410-b5e6-
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Benjamin Kramer [Fri, 1 Apr 2011 22:22:11 +0000 (22:22 +0000)]
Tweaks to the icmp+sext-to-shifts optimization to address Frits' comments:
- Localize the check if an icmp has one use to a place where we know we're
introducing something that's likely more expensive than a sext from i1.
- Add an assert to make sure a case that would lead to a miscompilation is
folded away earlier.
- Fix a typo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128744
91177308-0d34-0410-b5e6-
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Evan Cheng [Fri, 1 Apr 2011 22:09:28 +0000 (22:09 +0000)]
Avoid de-referencing pass beginning of a basic block. No small test case possible. rdar://
9216009
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128743
91177308-0d34-0410-b5e6-
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Akira Hatanaka [Fri, 1 Apr 2011 21:56:02 +0000 (21:56 +0000)]
Remove redundant code. There are assignments to variables Base and Offset right after the code that is removed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128742
91177308-0d34-0410-b5e6-
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Akira Hatanaka [Fri, 1 Apr 2011 21:41:06 +0000 (21:41 +0000)]
Simplifies logic for printing target flags.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128741
91177308-0d34-0410-b5e6-
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Oscar Fuentes [Fri, 1 Apr 2011 21:39:38 +0000 (21:39 +0000)]
CMake: remove debug code from previous commit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128740
91177308-0d34-0410-b5e6-
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Owen Anderson [Fri, 1 Apr 2011 21:07:39 +0000 (21:07 +0000)]
When the architecture is explicitly armv6 or thumbv6, we need to mark the object file appropriately.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128739
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Jim Grosbach [Fri, 1 Apr 2011 20:26:57 +0000 (20:26 +0000)]
LDRD/STRD instructions should print both Rt and Rt2 in the asm string.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128736
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Daniel Dunbar [Fri, 1 Apr 2011 20:23:52 +0000 (20:23 +0000)]
tlbgen/MC: StringRef's to temporary objects considered harmful.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128735
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Johnny Chen [Fri, 1 Apr 2011 20:21:38 +0000 (20:21 +0000)]
Fix a LDRT/LDRBT decoding bug where for Encoding A2, if Inst{4} != 0, we should reject the instruction
as invalid.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128734
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Benjamin Kramer [Fri, 1 Apr 2011 20:15:16 +0000 (20:15 +0000)]
Fix build.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128733
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Benjamin Kramer [Fri, 1 Apr 2011 20:09:10 +0000 (20:09 +0000)]
InstCombine: Turn icmp + sext into bitwise/integer ops when the input has only one unknown bit.
int test1(unsigned x) { return (x&8) ? 0 : -1; }
int test3(unsigned x) { return (x&8) ? -1 : 0; }
before (x86_64):
_test1:
andl $8, %edi
cmpl $1, %edi
sbbl %eax, %eax
ret
_test3:
andl $8, %edi
cmpl $1, %edi
sbbl %eax, %eax
notl %eax
ret
after:
_test1:
shrl $3, %edi
andl $1, %edi
leal -1(%rdi), %eax
ret
_test3:
shll $28, %edi
movl %edi, %eax
sarl $31, %eax
ret
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128732
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Benjamin Kramer [Fri, 1 Apr 2011 20:09:03 +0000 (20:09 +0000)]
InstCombine: Move (sext icmp) transforms into their own method. No intended functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128731
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Evan Cheng [Fri, 1 Apr 2011 19:57:01 +0000 (19:57 +0000)]
Add comments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128730
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Evan Cheng [Fri, 1 Apr 2011 19:42:22 +0000 (19:42 +0000)]
Assign node order numbers to results of call instruction lowering. This should improve src line debug info when sdisel is used. rdar://
9199118
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128728
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Oscar Fuentes [Fri, 1 Apr 2011 19:36:06 +0000 (19:36 +0000)]
Fix assignment of -fPIC to CMAKE_C_FLAGS. Configure llvm-config.in.in
with the contents of CMAKE_C(XX)_FLAGS too, else `llvm-config
--c(xx)flags' doesn't tell the absolute truth.
This comes from PR9603 and is based on a patch by Ryuta Suzuki!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128727
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Akira Hatanaka [Fri, 1 Apr 2011 18:57:38 +0000 (18:57 +0000)]
Modifies MipsAsmPrinter::isBlockOnlyReachableByFallthrough so that it handles delay slots correctly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128724
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Johnny Chen [Fri, 1 Apr 2011 18:26:38 +0000 (18:26 +0000)]
Fix LDRi12 immediate operand, which was changed to be the second operand in $addrmode_imm12 => (ops GPR:$base, i32imm:$offsimm).
rdar://problem/
9219356
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128722
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Devang Patel [Fri, 1 Apr 2011 18:03:58 +0000 (18:03 +0000)]
Update CMakeLists.txt
Patch by arrowdoger.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128719
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Akira Hatanaka [Fri, 1 Apr 2011 17:39:08 +0000 (17:39 +0000)]
Add code for analyzing FP branches. Clean up branch Analysis functions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128718
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Benjamin Kramer [Fri, 1 Apr 2011 09:20:31 +0000 (09:20 +0000)]
Initialize HasVMLxForwarding.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128709
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Jay Foad [Fri, 1 Apr 2011 08:00:58 +0000 (08:00 +0000)]
Various Instructions' resizeOperands() methods are only used to grow the
list of operands. Simplify and rename them accordingly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128708
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Evan Cheng [Fri, 1 Apr 2011 06:27:25 +0000 (06:27 +0000)]
Add test case.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128707
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Evan Cheng [Fri, 1 Apr 2011 03:36:33 +0000 (03:36 +0000)]
FileCheck'ify test.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128706
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Duncan Sands [Fri, 1 Apr 2011 03:34:54 +0000 (03:34 +0000)]
While testing dragonegg I noticed that isCastable and getCastOpcode
had gotten out of sync: isCastable didn't think it was possible to
cast the x86_mmx type to anything, while it did think it possible
to cast an i64 to x86_mmx.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128705
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Andrew Trick [Fri, 1 Apr 2011 02:22:47 +0000 (02:22 +0000)]
Add annotations to tablegen-generated processor itineraries, or replace them with something meaningful. I want to be able to read and debug the generated tables.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128703
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Andrew Trick [Fri, 1 Apr 2011 01:56:55 +0000 (01:56 +0000)]
whitespace
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128701
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Evan Cheng [Fri, 1 Apr 2011 00:42:02 +0000 (00:42 +0000)]
Issue libcalls __udivmod*i4 / __divmod*i4 for div / rem pairs.
rdar://
8911343
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128696
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Matt Beaumont-Gay [Fri, 1 Apr 2011 00:06:01 +0000 (00:06 +0000)]
Remove unused variables
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128692
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Jakob Stoklund Olesen [Thu, 31 Mar 2011 23:31:50 +0000 (23:31 +0000)]
Fix Thumb and Thumb2 tests to be register allocator independent.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128690
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Bruno Cardoso Lopes [Thu, 31 Mar 2011 23:26:08 +0000 (23:26 +0000)]
Apply again changes to support ARM memory asm parsing. I removed
all LDR/STR changes and left them to a future patch. Passing all
checks now.
- Implement asm parsing support for LDRT, LDRBT, STRT, STRBT and
fix the encoding wherever is possible.
- Add a new encoding bit to describe the index mode used and teach
printAddrMode2Operand to check by the addressing mode which index
mode to print.
- Testcases
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128689
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Jakob Stoklund Olesen [Thu, 31 Mar 2011 23:02:17 +0000 (23:02 +0000)]
The basic register allocator must also use the inline spiller.
It is using a trivial rewriter that doesn't know how to insert spill code
requested by the standard spiller.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128688
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Jakob Stoklund Olesen [Thu, 31 Mar 2011 23:02:15 +0000 (23:02 +0000)]
Provide a legal pointer register class when targeting thumb1.
The LocalStackSlotAllocation pass was creating illegal registers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128687
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Jakob Stoklund Olesen [Thu, 31 Mar 2011 23:02:12 +0000 (23:02 +0000)]
Fix SystemZ tests
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128686
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Nadav Rotem [Thu, 31 Mar 2011 22:57:29 +0000 (22:57 +0000)]
Instcombile optimization: extractelement(cast) -> cast(extractelement)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128683
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Jakob Stoklund Olesen [Thu, 31 Mar 2011 22:14:03 +0000 (22:14 +0000)]
Fix ARM tests to be register allocator independent.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128680
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Benjamin Kramer [Thu, 31 Mar 2011 21:35:49 +0000 (21:35 +0000)]
InstCombine: APFloat can't perform arithmetic on PPC double doubles, don't even try.
Thanks Eli!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128676
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Johnny Chen [Thu, 31 Mar 2011 20:54:30 +0000 (20:54 +0000)]
Add a test case for a malformed LDC/LDC2 instructions with PUDW = 0b0000, which
amounts to an UNDEFINED instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128668
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Evan Cheng [Thu, 31 Mar 2011 19:38:48 +0000 (19:38 +0000)]
Distribute (A + B) * C to (A * C) + (B * C) to make use of NEON multiplier
accumulator forwarding:
vadd d3, d0, d1
vmul d3, d3, d2
=>
vmul d3, d0, d2
vmla d3, d1, d2
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128665
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Johnny Chen [Thu, 31 Mar 2011 19:28:35 +0000 (19:28 +0000)]
Fix single word and unsigned byte data transfer instruction encodings so that
Inst{4} = 0.
rdar://problem/
9213022
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128662
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Jakob Stoklund Olesen [Thu, 31 Mar 2011 18:42:43 +0000 (18:42 +0000)]
Fix Mips, Sparc, and XCore tests that were dependent on register allocation.
Add an extra run with -regalloc=basic to keep them honest.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128654
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Akira Hatanaka [Thu, 31 Mar 2011 18:26:17 +0000 (18:26 +0000)]
Added support for FP conditional move instructions and fixed bugs in handling of FP comparisons.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128650
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Nick Lewycky [Thu, 31 Mar 2011 18:20:19 +0000 (18:20 +0000)]
Pick better examples. "fpext float 3.1415 to double" won't parse because 3.1415
isn't an exact float. Also "fpext float 1.0 to float" is invalid IR because
it's not performing an extension.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128647
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Jakob Stoklund Olesen [Thu, 31 Mar 2011 17:55:25 +0000 (17:55 +0000)]
Don't completely eliminate identity copies that also modify super register liveness.
Turn them into noop KILL instructions instead. This lets the scavenger know when
super-registers are killed and defined.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128645
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Johnny Chen [Thu, 31 Mar 2011 17:53:50 +0000 (17:53 +0000)]
Add BLXi to the instruction table for disassembly purpose.
A8.6.23 BLX (immediate)
rdar://problem/
9212921
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128644
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Jakob Stoklund Olesen [Thu, 31 Mar 2011 17:52:41 +0000 (17:52 +0000)]
Allow kill flags on two-address instructions. They are harmless.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128643
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Jakob Stoklund Olesen [Thu, 31 Mar 2011 17:23:25 +0000 (17:23 +0000)]
Mark all uses as <undef> when joining a copy.
This way, shrinkToUses() will ignore the instruction that is about to be
deleted, and we avoid leaving invalid live ranges that SplitKit doesn't like.
Fix a misunderstanding in MachineVerifier about <def,undef> operands. The
<undef> flag is valid on def operands where it has the same meaning as <undef>
on a use operand. It only applies to sub-register defines which also read the
full register.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128642
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