Fix a typo.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136133 91177308-0d34-0410-b5e6-96231b3b80d8

Fix over-zealous rename from r136095.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136132 91177308-0d34-0410-b5e6-96231b3b80d8

XFAIL this test while I investigate it; it's failing for an unexpected reason.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136131 91177308-0d34-0410-b5e6-96231b3b80d8

Add obvious missing case to switch.  PR10497.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136130 91177308-0d34-0410-b5e6-96231b3b80d8

Fix a couple minor mistakes pointed out by Bill in adding 'fence' instruction.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136124 91177308-0d34-0410-b5e6-96231b3b80d8

Fix llvm-mc target detection code to match llc.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136115 91177308-0d34-0410-b5e6-96231b3b80d8

Updating stale documentation on regalloc modes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136112 91177308-0d34-0410-b5e6-96231b3b80d8

Use the correct for for the version. It's little endian and my brain is
obviously big endian. :-)
PR10502

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136111 91177308-0d34-0410-b5e6-96231b3b80d8

ARM diagnostics for ldrexd/stredx out of order paired register operands.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136110 91177308-0d34-0410-b5e6-96231b3b80d8

Remove now unused patterns. 0 insertions(+), 98 deletions(-)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136109 91177308-0d34-0410-b5e6-96231b3b80d8

Cleanup old matching for PUNPCK* variants

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136108 91177308-0d34-0410-b5e6-96231b3b80d8

While extracting lexical scopes from machine instruction stream, work on one machine basic block at a time.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136106 91177308-0d34-0410-b5e6-96231b3b80d8

ARM parsing and encoding tests for load/store exclusive instructions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136105 91177308-0d34-0410-b5e6-96231b3b80d8

ARM fix for LDREX source register encoding.

rdar://9842203

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136102 91177308-0d34-0410-b5e6-96231b3b80d8

SCEV: Added a data structure for storing not-taken info per loop
exit. Added an interfaces for querying either the loop's exact/max
backedge taken count or a specific loop exit's not-taken count.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136100 91177308-0d34-0410-b5e6-96231b3b80d8

Strip trailing whitespace.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136099 91177308-0d34-0410-b5e6-96231b3b80d8

ARM assembly parsing and encoding for SWP[B] instructions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136098 91177308-0d34-0410-b5e6-96231b3b80d8

ARM SWP instructions store, too, not just load.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136096 91177308-0d34-0410-b5e6-96231b3b80d8

Clean up the ARM asm parser a bit.

No intendeded functional change. Just cleaning up a bit to make things more
self-consistent in layout and style.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136095 91177308-0d34-0410-b5e6-96231b3b80d8

ARM fix asm parsing range check for [0,31] immediates.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136091 91177308-0d34-0410-b5e6-96231b3b80d8

ARM parsing and encoding for SVC instruction.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136090 91177308-0d34-0410-b5e6-96231b3b80d8

ARM assembly parsing and encoding tests for SUB instruction.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136089 91177308-0d34-0410-b5e6-96231b3b80d8

Update ARM STM tests. Fix check: prefix for diagnostic tests.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136088 91177308-0d34-0410-b5e6-96231b3b80d8

Teach the Triple class about kfreebsd (FreeBSD kernel with
a GNU userspace).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136085 91177308-0d34-0410-b5e6-96231b3b80d8

Add LLVMAddAlwaysInlinerPass to the C API.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136083 91177308-0d34-0410-b5e6-96231b3b80d8

LLVM 3.0 is here, remove old do nothing method.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136082 91177308-0d34-0410-b5e6-96231b3b80d8

SrcDef is only written and never read.  Remove it.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136080 91177308-0d34-0410-b5e6-96231b3b80d8

Add helper function for getting true/false constants in a uniform
way for i1 and vector of i1 types.  Use these to make some code
more self-documenting.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136079 91177308-0d34-0410-b5e6-96231b3b80d8

Clean up the HTML here a bit.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136074 91177308-0d34-0410-b5e6-96231b3b80d8

Fix typo in comment.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136068 91177308-0d34-0410-b5e6-96231b3b80d8

Don't try to dereference syms[0] on an empty vector. Reported by Todd Jackson
and Jeffrey Bosboom!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136066 91177308-0d34-0410-b5e6-96231b3b80d8

The compact unwinding offsets are divided by 8 on 64-bit machines.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136065 91177308-0d34-0410-b5e6-96231b3b80d8

Describe the reasoning for compact unwind in better terms. Thanks to Nick Kledzik for the description.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136064 91177308-0d34-0410-b5e6-96231b3b80d8

Add 256-bit isel for movsldup/movshdup

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136051 91177308-0d34-0410-b5e6-96231b3b80d8

More movsldup/movshdup cleanup. Rewrite the mask matching function and add
support for 256-bit versions (but no instruction selection yet, coming next).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136050 91177308-0d34-0410-b5e6-96231b3b80d8

More cleanup, subtarget info isn't used here.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136049 91177308-0d34-0410-b5e6-96231b3b80d8

Add 128-bit AVX versions of movshdup/mosldup

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136048 91177308-0d34-0410-b5e6-96231b3b80d8

Cleanup movsldup/movshdup matching.
27 insertions(+), 62 deletions(-)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136047 91177308-0d34-0410-b5e6-96231b3b80d8

Revert to RA_Assign when a virtreg separates into components.

When dead code elimination deletes a PHI value, the virtual register may
split into multiple connected components. In that case, revert each
component to the RS_Assign stage.

The new components are guaranteed to be smaller (the original value
numbers are distributed among the components), so this will always be
making progress. The components are now allowed to evict other live
ranges or be split again.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136034 91177308-0d34-0410-b5e6-96231b3b80d8

Rename createCodeEmitter to createMCCodeEmitter; createObjectStreamer to createMCObjectStreamer.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136031 91177308-0d34-0410-b5e6-96231b3b80d8

Remove a file from CMakeLists.txt that Evan removed in r136027.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136030 91177308-0d34-0410-b5e6-96231b3b80d8

Rename TargetAsmParser to MCTargetAsmParser and TargetAsmLexer to MCTargetAsmLexer; rename createAsmLexer to createMCAsmLexer and createAsmParser to createMCAsmParser.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136027 91177308-0d34-0410-b5e6-96231b3b80d8

Still more library dependency updates. This reflects the ever decreasing
dependence on CodeGen layers and backends from the MC layers.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136024 91177308-0d34-0410-b5e6-96231b3b80d8

Clean up a pile of hacks in our CMake build relating to TableGen.

The first problem to fix is to stop creating synthetic *Table_gen
targets next to all of the LLVM libraries. These had no real effect as
CMake specifies that add_custom_command(OUTPUT ...) directives (what the
'tablegen(...)' stuff expands to) are implicitly added as dependencies
to all the rules in that CMakeLists.txt.

These synthetic rules started to cause problems as we started more and
more heavily using tablegen files from *subdirectories* of the one where
they were generated. Within those directories, the set of tablegen
outputs was still available and so these synthetic rules added them as
dependencies of those subdirectories. However, they were no longer
properly associated with the custom command to generate them. Most of
the time this "just worked" because something would get to the parent
directory first, and run tablegen there. Once run, the files existed and
the build proceeded happily. However, as more and more subdirectories
have started using this, the probability of this failing to happen has
increased. Recently with the MC refactorings, it became quite common for
me when touching a large enough number of targets.

To add insult to injury, several of the backends *tried* to fix this by
adding explicit dependencies back to the parent directory's tablegen
rules, but those dependencies didn't work as expected -- they weren't
forming a linear chain, they were adding another thread in the race.

This patch removes these synthetic rules completely, and adds a much
simpler function to declare explicitly that a collection of tablegen'ed
files are referenced by other libraries. From that, we can add explicit
dependencies from the smaller libraries (such as every architectures
Desc library) on this and correctly form a linear sequence. All of the
backends are updated to use it, sometimes replacing the existing attempt
at adding a dependency, sometimes adding a previously missing dependency
edge.

Please let me know if this causes any problems, but it fixes a rather
persistent and problematic source of build flakiness on our end.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136023 91177308-0d34-0410-b5e6-96231b3b80d8

ARM assembly parsing and encoding for SSAX, SSUB16 and SSUB8.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136013 91177308-0d34-0410-b5e6-96231b3b80d8

TargetAsmBackend has been renamed to MCAsmBackend.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136012 91177308-0d34-0410-b5e6-96231b3b80d8

Rename TargetAsmBackend to MCAsmBackend; rename createAsmBackend to createMCAsmBackend.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136010 91177308-0d34-0410-b5e6-96231b3b80d8

Initial implementation of 'fence' instruction, the new C++0x-style replacement for llvm.memory.barrier.

This is just a LangRef entry and reading/writing/memory representation; optimizer+codegen support coming soon.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136009 91177308-0d34-0410-b5e6-96231b3b80d8

Finish adding support for lifetime intrinsics to SROA. Fixes PR10121!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136008 91177308-0d34-0410-b5e6-96231b3b80d8

I will save before I commit.
I will save before I commit.
I will save before I commit.
I will save before I commit.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136007 91177308-0d34-0410-b5e6-96231b3b80d8

ARM assembly parsing and encoding for SSAT16 instruction.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136006 91177308-0d34-0410-b5e6-96231b3b80d8

Codegen allonesvector better while using AVX: vpcmpeqd + vinsertf128
This also fixes PR10452

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136004 91177308-0d34-0410-b5e6-96231b3b80d8

Add remaining 256-bit vector bitcasts. This also fixes PR10451

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136003 91177308-0d34-0410-b5e6-96231b3b80d8

- Handle special scalar_to_vector case: splats. Using a native 128-bit
shuffle before inserting on a 256-bit vector.
- Add AVX versions of movd/movq instructions
- Introduce a few COPY patterns to match insert_subvector instructions.
This turns a trivial insert_subvector instruction into a register copy,
coalescing the xmm into a ymm and avoid emiting on more instruction.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136002 91177308-0d34-0410-b5e6-96231b3b80d8

Reintroduce r135730, this is indeed the right approach, there is no
native 256-bit vector instruction to do scalar_to_vector.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136001 91177308-0d34-0410-b5e6-96231b3b80d8

llvm-objdump: Ignore unreachable blocks when printing the CFG.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136000 91177308-0d34-0410-b5e6-96231b3b80d8

Fix include guards.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135998 91177308-0d34-0410-b5e6-96231b3b80d8

Add a note about efficient codegen for binary log.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135996 91177308-0d34-0410-b5e6-96231b3b80d8

Attempt to fix test failure reported on llvm-commits.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135995 91177308-0d34-0410-b5e6-96231b3b80d8

BranchProbability::print returns void now.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135994 91177308-0d34-0410-b5e6-96231b3b80d8

Make sure this DAGCombine actually returns an UNDEF of the correct type; PR10476.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135993 91177308-0d34-0410-b5e6-96231b3b80d8

Add BlockFrequency class.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135992 91177308-0d34-0410-b5e6-96231b3b80d8

ARM assembly parsing and encoding for SSAT instruction.

Fix the Rn register encoding for both SSAT and USAT. Update the parsing of the
shift operand to correctly handle the allowed shift types and immediate ranges
and issue meaningful diagnostics when an illegal value or shift type is
specified. Add aliases to parse an ommitted shift operand (default value of
'lsl #0').

Add tests for diagnostics and proper encoding.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135990 91177308-0d34-0410-b5e6-96231b3b80d8

Add clarifying comments for the new arguments to UnrollLoop.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135988 91177308-0d34-0410-b5e6-96231b3b80d8

Refactoring fail.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135986 91177308-0d34-0410-b5e6-96231b3b80d8

Move CBackend and CppBackend MC initialization to TargetInfo.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135982 91177308-0d34-0410-b5e6-96231b3b80d8

Get rid of an incorrect optimization for shuffles with PALIGNR and simplify isPALIGNRMask.

Addresses PR10466, although the crash from that PR only triggers in cases where DAGCombine misses optimizing a shuffle.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135980 91177308-0d34-0410-b5e6-96231b3b80d8

Fix more MC layering violations.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135979 91177308-0d34-0410-b5e6-96231b3b80d8

More MC layering violations.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135978 91177308-0d34-0410-b5e6-96231b3b80d8

Check in updated CMake dependencies after Evan's latest round of
refactorings. Several places that shouldn't have dependend on Target no
longer do. Also almost all of the CodeGen dependencies have gone away
for the MCDisassembler. Others add reasonable dependencies within the
target-specific layers.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135977 91177308-0d34-0410-b5e6-96231b3b80d8

Add a missing enumerator to this switch. Currently its in the
assert-path code, as previously we would have fallen off the end of the
function, but please review and let me know if this should go somewhere
else.

This fixes a Clang warning:
lib/MC/MCMachOStreamer.cpp:201:11: error: enumeration value 'MCSA_IndirectSymbol' not handled in switch [-Werror,-Wswitch-enum]
  switch (Attribute) {
          ^
1 error generated.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135976 91177308-0d34-0410-b5e6-96231b3b80d8

Add LLVMAddTargetLibraryInfo to the C API.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135975 91177308-0d34-0410-b5e6-96231b3b80d8

Separate MCInstPrinter registration from AsmPrinter registration.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135974 91177308-0d34-0410-b5e6-96231b3b80d8

Add missing space (this line is no longer pushing the 80-column limit).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135973 91177308-0d34-0410-b5e6-96231b3b80d8

80 columns.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135972 91177308-0d34-0410-b5e6-96231b3b80d8

Fix typo.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135971 91177308-0d34-0410-b5e6-96231b3b80d8

Simply ARM so_reg MIOperandInfo definitions.

The shift immediate encoding, printing, etc. is handled directly by the
enclosing operand definition, so it should be a vanilla immediate, not a
nested complex operand (shift_imm).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135968 91177308-0d34-0410-b5e6-96231b3b80d8

Add LLVMAddLowerExpectIntrinsicPass to the C API.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135966 91177308-0d34-0410-b5e6-96231b3b80d8

Fix last bits of MC layer issues. llvm-mc doesn't need to initialize TargetMachine's anymore.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135963 91177308-0d34-0410-b5e6-96231b3b80d8

ARM asm operand renaming. Make things a bit more explicit.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135959 91177308-0d34-0410-b5e6-96231b3b80d8

More simple cleanup of ARM asm operand definitions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135958 91177308-0d34-0410-b5e6-96231b3b80d8

Fix some typos.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135956 91177308-0d34-0410-b5e6-96231b3b80d8

An initial description of the compact unwind encoding.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135955 91177308-0d34-0410-b5e6-96231b3b80d8

Code clean up.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135954 91177308-0d34-0410-b5e6-96231b3b80d8

Refactor MBlaze target to separate MC routines from Target routines.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135953 91177308-0d34-0410-b5e6-96231b3b80d8

While building a LLVM target, put the current source directory on the
header search path.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135952 91177308-0d34-0410-b5e6-96231b3b80d8

Update the comment. This feature is available only on Darwin at the moment. Though it's not Darwin-specific.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135951 91177308-0d34-0410-b5e6-96231b3b80d8

Make assembly parser method names more consistent.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135950 91177308-0d34-0410-b5e6-96231b3b80d8

Unbreak the build.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135949 91177308-0d34-0410-b5e6-96231b3b80d8

Fix class description.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135948 91177308-0d34-0410-b5e6-96231b3b80d8

Fix #include guard directive.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135947 91177308-0d34-0410-b5e6-96231b3b80d8

Tidy up formatting.

Remove some inititalizers that are the same as the default, move defs next to
their (singular) uses and generally simplify some formatting of asm operand
definitions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135946 91177308-0d34-0410-b5e6-96231b3b80d8

Tidy up a bit.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135945 91177308-0d34-0410-b5e6-96231b3b80d8

Missed a file.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135943 91177308-0d34-0410-b5e6-96231b3b80d8

Refactor PPC target to separate MC routines from Target routines.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135942 91177308-0d34-0410-b5e6-96231b3b80d8

More refactoring.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135939 91177308-0d34-0410-b5e6-96231b3b80d8

Rename BlockFrequency to BlockFrequencyInfo and MachineBlockFrequency to
MachineBlockFrequencyInfo.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135937 91177308-0d34-0410-b5e6-96231b3b80d8

Refactor X86 target to separate MC code from Target code.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135930 91177308-0d34-0410-b5e6-96231b3b80d8

Changed disabled code into a flag.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135924 91177308-0d34-0410-b5e6-96231b3b80d8

Remove dead variable.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135923 91177308-0d34-0410-b5e6-96231b3b80d8