Dave Airlie [Tue, 3 Nov 2015 05:42:59 +0000 (15:42 +1000)]
Merge branch 'linux-4.4' of git://anongit.freedesktop.org/git/nouveau/linux-2.6 into drm-next
- Vast improvements to gk20a instmem handling.
- Improved PGOB detection + GK107 support.
- Compatibility between old/new interfaces added, final missing piece to
finally enabling userspace to start using them.
- Kepler GDDR5 PLL stability improvements
- Support for non-GPIO (PWM) voltage controllers
- G8x/GT2xx memory clock improvements
- Misc other fixes
* 'linux-4.4' of git://anongit.freedesktop.org/git/nouveau/linux-2.6: (45 commits)
drm/nouveau: bump patchlevel to indicate availability of abi16/nvif interop
drm/nouveau/abi16: implement limited interoperability with usif/nvif
drm/nouveau/abi16: introduce locked variant of nouveau_abi16_get()
drm/nouveau/abi16: remove unused argument from nouveau_abi16_get()
drm/nouveau/pci: enable c800 magic for Medion Erazer X7827
drm/nouveau/pci: enable c800 magic for Lenovo Y510P
drm/nouveau/pll/gk104: fix PLL instability due to bad configuration with gddr5
drm/nouveau/clk/g84: Enable reclocking for GDDR3 G94-G200
drm/nouveau/bus/hwsq: Implement VBLANK waiting heuristic
drm/nouveau/fb/ramnv50: Script changes for G94 and up
drm/nouveau/fb/ramnv50: Deal with cards without timing entries
drm/nouveau/fb/ramnv50: Voltage GPIOs
drm/nouveau/fb/ramgt215: Restructure r111100 calculation for DDR2
drm/nouveau/fb/ramgt215: Change FBVDD/Q when BIOS asks for it
drm/nouveau/fb/ramgt215: Transform GPIO ramfuc method from FBVREF-specific to generic
drm/nouveau/bios/rammap: Identify DLLoff for >= GF100
drm/nouveau/pci: Handle 5-bit and 8-bit tag field
drm/nouveau/disp,pm: constify nvkm_object_func structures
drm/nouveau/gr: add FERMI_COMPUTE_B class to GF110+
drm/nouveau/gr: document mp error 0x10
...
Dave Airlie [Tue, 3 Nov 2015 05:42:10 +0000 (15:42 +1000)]
Merge branch 'exynos-drm-next' of git://git./linux/kernel/git/daeinki/drm-exynos into drm-next
This pull request includes comprehensive cleanups to HDMI part and
several fixups. In addition, this pull request includes also a defconfig
patch which enables mixer driver as default. For this, I got already
Acked-by from Krzysztof Kozlowski who is a Exynos SoC maintainer.
* 'exynos-drm-next' of git://git.kernel.org/pub/scm/linux/kernel/git/daeinki/drm-exynos: (34 commits)
drm/exynos/gem: remove DMA-mapping hacks used for constructing page array
ARM: exynos_defconfig: enable Exynos DRM Mixer driver
drm/exynos: simplify Kconfig component names
drm/exynos: re-arrange Kconfig entries
drm/exynos: abstract out common dependency
drm/exynos: separate Mixer and HDMI drivers
drm/exynos/mixer: replace direct cross-driver call with drm mode validation
drm/exynos: add atomic_check callback to exynos_crtc
drm/exynos/decon5433: add support for DECON-TV
drm/exynos/decon5433: remove duplicated initialization
drm/exynos/decon5433: merge different flag fields
drm/exynos/decon5433: add function to set particular register bits
drm/exynos/decon5433: fix timing registers writes
drm/exynos/decon5433: add PCLK clock
drm/exynos: cleanup name of gem object for exynos_drm
drm/exynos: fix to detach device of iommu
drm/exynos: add cursor plane support
drm/exynos: add global macro for the default primary plane
drm/exynos: fix spelling errors
drm: exynos: mixer: fix using usleep() in atomic context
...
Ben Skeggs [Tue, 3 Nov 2015 02:40:13 +0000 (12:40 +1000)]
drm/nouveau: bump patchlevel to indicate availability of abi16/nvif interop
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Tue, 3 Nov 2015 01:21:43 +0000 (11:21 +1000)]
drm/nouveau/abi16: implement limited interoperability with usif/nvif
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Tue, 3 Nov 2015 00:55:45 +0000 (10:55 +1000)]
drm/nouveau/abi16: introduce locked variant of nouveau_abi16_get()
USIF already takes the client mutex, but will need access to ABI16 data
in order to provide some limited interoperability.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Tue, 3 Nov 2015 00:17:49 +0000 (10:17 +1000)]
drm/nouveau/abi16: remove unused argument from nouveau_abi16_get()
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ilia Mirkin [Sat, 31 Oct 2015 19:06:11 +0000 (15:06 -0400)]
drm/nouveau/pci: enable c800 magic for Medion Erazer X7827
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=91557
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ilia Mirkin [Tue, 27 Oct 2015 21:39:49 +0000 (17:39 -0400)]
drm/nouveau/pci: enable c800 magic for Lenovo Y510P
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=70354#c75
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Karol Herbst [Sun, 16 Aug 2015 08:19:25 +0000 (10:19 +0200)]
drm/nouveau/pll/gk104: fix PLL instability due to bad configuration with gddr5
This patch uses an approach closer to the nvidia driver to configure
both PLLs for high gddr5 memory clocks (usually above 2400MHz)
Previously nouveau used the one PLL as it was used for the lower clocks
and just adjusted the second PLL to get as close as possible to the
requested clock. This means for my card, that I got a 4050 MHz clock
although 4008 MHz was requested.
Now the driver iterates over a list of PLL configuration also used by
the nvidia driver and then adjust the second PLL to get near the
requested clock. Also it hold to some restriction I found while
analyzing the PLL configurations
This won't fix all gddr5 high clock issues itself, but it should be
fine on hybrid gpu systems as found on many laptops these days. Also
switching while normal desktop usage should be a lot more stable than
before.
v2: move the pll code into ramgk104
Signed-off-by: Karol Herbst <nouveau@karolherbst.de>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Roy Spliet [Tue, 29 Sep 2015 23:23:52 +0000 (00:23 +0100)]
drm/nouveau/clk/g84: Enable reclocking for GDDR3 G94-G200
Your milage may vary, as it's only been tested on a single G94 and one G96.
Signed-off-by: Roy Spliet <rspliet@eclipso.eu>
Tested-by: Pierre Moreau <pierre.morrow@free.fr>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Roy Spliet [Tue, 29 Sep 2015 23:23:51 +0000 (00:23 +0100)]
drm/nouveau/bus/hwsq: Implement VBLANK waiting heuristic
Avoids waiting for VBLANKS that never arrive on headless or otherwise
unconventional set-ups. Strategy taken from MEMX.
Signed-off-by: Roy Spliet <rspliet@eclipso.eu>
Tested-by: Pierre Moreau <pierre.morrow@free.fr>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Roy Spliet [Tue, 29 Sep 2015 23:23:50 +0000 (00:23 +0100)]
drm/nouveau/fb/ramnv50: Script changes for G94 and up
10053c is not even read on some cards, and I have no idea exactly what the
criteria are. Likely NVIDIA pre-scans the VBIOS and in their driver disables
all features that are never used. The practical effect should be the same
as this implementation though.
Signed-off-by: Roy Spliet <rspliet@eclipso.eu>
Tested-by: Pierre Moreau <pierre.morrow@free.fr>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Roy Spliet [Tue, 29 Sep 2015 23:23:49 +0000 (00:23 +0100)]
drm/nouveau/fb/ramnv50: Deal with cards without timing entries
Like Pierre's G94. We might want to structure Kepler similarly in a follow-up.
Signed-off-by: Roy Spliet <rspliet@eclipso.eu>
Tested-by: Pierre Moreau <pierre.morrow@free.fr>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Roy Spliet [Tue, 29 Sep 2015 23:23:48 +0000 (00:23 +0100)]
drm/nouveau/fb/ramnv50: Voltage GPIOs
Does not seem to be necessary for NVA0, hence untested by me.
Signed-off-by: Roy Spliet <rspliet@eclipso.eu>
Tested-by: Pierre Moreau <pierre.morrow@free.fr>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Roy Spliet [Tue, 29 Sep 2015 23:23:47 +0000 (00:23 +0100)]
drm/nouveau/fb/ramgt215: Restructure r111100 calculation for DDR2
Seems to be mostly equal to DDR3 on < GT218, should improve stability for
DDR2 reclocks.
Signed-off-by: Roy Spliet <rspliet@eclipso.eu>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Roy Spliet [Tue, 29 Sep 2015 23:23:46 +0000 (00:23 +0100)]
drm/nouveau/fb/ramgt215: Change FBVDD/Q when BIOS asks for it
Signed-off-by: Roy Spliet <rspliet@eclipso.eu>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Roy Spliet [Tue, 29 Sep 2015 23:23:45 +0000 (00:23 +0100)]
drm/nouveau/fb/ramgt215: Transform GPIO ramfuc method from FBVREF-specific to generic
In preparation of changing FBVDDQ, as observed on at least one GDDR3 card.
While at it, adhere to func.log[1] properly for consistency.
Signed-off-by: Roy Spliet <rspliet@eclipso.eu>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Roy Spliet [Tue, 29 Sep 2015 23:23:44 +0000 (00:23 +0100)]
drm/nouveau/bios/rammap: Identify DLLoff for >= GF100
Signed-off-by: Roy Spliet <rspliet@eclipso.eu>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Pierre Moreau [Sat, 3 Oct 2015 19:35:16 +0000 (21:35 +0200)]
drm/nouveau/pci: Handle 5-bit and 8-bit tag field
If the hardware supports extended tag field (8-bit ones), then enable it.
This is usually done by the VBIOS, but not on some MBPs (see fdo#86537).
In case extended tag field is not supported, 5-bit tag field is used which
limits the possible number of requests to 32. Apparently bits 7:0 of
0x08841c stores some number of outstanding requests, so cap it to 32 if
extended tag is unsupported.
Fixes: fdo#86537
v2: Restrict changes to chipsets >= 0x84
v3:
* Add nvkm_pci_mask to pci.h
* Mask bit 8 before setting it
v4:
* Rename `add` argument of nvkm_pci_mask to `value`
* Move code from nvkm_pci_init to g84_pci_init and remove PCIe and chipset
checks
v5:
* Rebase code on latest PCI structure
* Restore PCIe check
* Fix namings in nvkm_pci_mask
* Rephrase part of the commit message
Signed-off-by: Pierre Moreau <pierre.morrow@free.fr>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Julia Lawall [Sun, 11 Oct 2015 12:18:09 +0000 (14:18 +0200)]
drm/nouveau/disp,pm: constify nvkm_object_func structures
These nvkm_object_func structures are never modified. All other
nvkm_object_func structures are declared as const.
Done with the help of Coccinelle.
Signed-off-by: Julia Lawall <Julia.Lawall@lip6.fr>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ilia Mirkin [Wed, 7 Oct 2015 22:39:33 +0000 (18:39 -0400)]
drm/nouveau/gr: add FERMI_COMPUTE_B class to GF110+
GF110+ supports both the A and B compute classes, make sure to accept
both.
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ilia Mirkin [Wed, 7 Oct 2015 22:39:32 +0000 (18:39 -0400)]
drm/nouveau/gr: document mp error 0x10
NVIDIA provided the documentation for mp error 0x10, INVALID_ADDR_SPACE,
which apparently happens when trying to use an atomic operation on
local or shared memory (instead of global memory).
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Sudip Mukherjee [Fri, 11 Sep 2015 09:30:56 +0000 (15:00 +0530)]
drm/nouveau: fix memory leak
If pm_runtime_get_sync() we were going to "out" but we missed freeing
vma.
Signed-off-by: Sudip Mukherjee <sudip@vectorindia.org>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Sudip Mukherjee [Wed, 2 Sep 2015 06:38:08 +0000 (12:08 +0530)]
drm/nouveau: remove unused function
coverity.com reported that memset was using a buffer of size 0, on
checking the code it turned out that the function was not being used. So
remove it.
Signed-off-by: Sudip Mukherjee <sudip@vectorindia.org>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Thu, 1 Oct 2015 05:00:23 +0000 (15:00 +1000)]
drm/nouveau/pmu/gk107: enable PGOB codepaths
Reported to be needed as per fdo#70354 comment #61.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Thu, 1 Oct 2015 04:58:04 +0000 (14:58 +1000)]
drm/nouveau/pmu/gk104: check fuse to determine presence of PGOB
Not 100% confirmed, but seems to match from the few boards I've looked
at so far.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Wed, 30 Sep 2015 23:42:54 +0000 (09:42 +1000)]
drm/nouveau/pci: prepare for chipset-specific initialisation tasks
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Thu, 1 Oct 2015 01:36:58 +0000 (11:36 +1000)]
drm/nouveau/pci/nv46: attempt to fix msi, and re-enable by default
Was not able to obtain a trace of NVRM due to kernel version annoyances,
however, experimentally confirmed that the WAR we use on NV50/G8x boards
works here too.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Wed, 30 Sep 2015 23:34:45 +0000 (09:34 +1000)]
drm/nouveau/pci/g94: split implementation from nv40
An upcoming patch will implement functionality that we don't use on any
NV40 chipset.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Wed, 30 Sep 2015 23:29:58 +0000 (09:29 +1000)]
drm/nouveau/pci/g84: split implementation from nv50
An upcoming patch will implement functionality that we don't use on the
original NV50.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Samuel Pitoiset [Thu, 24 Sep 2015 18:26:15 +0000 (20:26 +0200)]
drm/nouveau/ibus/gf100: increase wait timeout to avoid read faults
Increase clock timeout of some unknown engines in order to avoid failure
at high gpcclk rate.
This fixes IBUS read faults on my GF119 when reclocking is manually
enabled. Note that memory reclocking is completely broken and NvMemExec
has to be disabled to allow core clock reclocking only.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Martin Peres [Wed, 16 Sep 2015 19:45:33 +0000 (22:45 +0300)]
drm/nouveau/gm204/6: add voltage control using the new gk104 volt class
I got confirmation that we can read and change the voltage with the same code.
The divider is also computed correctly on the gm204 we got our hands on.
Thanks to Yoshimo on IRC for executing the tests on his gm204!
Signed-off-by: Martin Peres <martin.peres@free.fr>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Martin Peres [Wed, 9 Sep 2015 00:13:30 +0000 (02:13 +0200)]
drm/nouveau/gm107: add voltage control using the new gk104 volt class
Let's ignore the other desktop Maxwells until I get my hands on one and confirm
that we still can change the voltage.
Signed-off-by: Martin Peres <martin.peres@free.fr>
Martin Peres [Tue, 8 Sep 2015 22:34:33 +0000 (00:34 +0200)]
drm/nouveau/volt/gk104: add support for pwm and gpio modes
Most Keplers actually use the GPIO-based voltage management instead of the new
PWM-based one. Use the GPIO mode as a fallback as it already gracefully handles
the case where no GPIOs exist.
All the Maxwells seem to use the PWM method though.
v2:
- Do not forget to commit the PWM configuration change!
Signed-off-by: Martin Peres <martin.peres@free.fr>
Martin Peres [Wed, 9 Sep 2015 01:05:51 +0000 (04:05 +0300)]
drm/nouveau/volt: add support for non-vid-based voltage controllers
This patch is not ideal but it definitely beats a rewrite of the current
interface and is very self-contained.
Signed-off-by: Martin Peres <martin.peres@free.fr>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Martin Peres [Wed, 9 Sep 2015 01:05:50 +0000 (04:05 +0300)]
drm/nouveau/bios/volt: add support for pwm-based volt management
Signed-off-by: Martin Peres <martin.peres@free.fr>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Alexandre Courbot [Fri, 4 Sep 2015 10:59:34 +0000 (19:59 +0900)]
drm/nouveau/ttm: set the DMA mask for platform devices
So far the DMA mask was not set for platform devices, which limited them
to a 32-bit physical space. Allow dma_set_mask() to be called for
non-PCI devices, and also take the IOMMU bit into account since it could
restrict the physically addressable space.
Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Alexandre Courbot [Fri, 4 Sep 2015 10:59:33 +0000 (19:59 +0900)]
drm/nouveau/ttm: convert to DMA API
The pci_dma_* functions are now superseeded in the kernel by the DMA
API. Make the conversion to this more generic API.
Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Alexandre Courbot [Fri, 4 Sep 2015 10:59:32 +0000 (19:59 +0900)]
drm/nouveau/instmem/gk20a: make use of the IOMMU bit
Use the IOMMU bit specified in platform data instead of hardcoding it to
the bit used by current Tegra GPUs.
Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Alexandre Courbot [Fri, 4 Sep 2015 10:59:31 +0000 (19:59 +0900)]
drm/nouveau/platform: allow to specify the IOMMU bit
Current Tegra code taking advantage of the IOMMU assumes a hardcoded
value for the IOMMU bit. Make it a platform property instead for
flexibility.
v2 (Ben Skeggs): remove nvkm dependence on drm structures
Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Alexandre Courbot [Fri, 4 Sep 2015 10:52:11 +0000 (19:52 +0900)]
drm/nouveau/instmem/gk20a: use direct CPU access
The Great Nouveau Refactoring Take II brought us a lot of goodness,
including acquire/release methods that are called before and after an
instobj is modified. These functions can be used as synchronization
points to manage CPU/GPU coherency if we modify an instobj using the
CPU.
This patch replaces the legacy and slow PRAMIN access for gk20a instmem
with CPU mappings and writes. A LRU list is used to unmap unused
mappings after a certain threshold (currently 1MB) of mapped instobjs is
reached. This allows mappings to be reused most of the time.
Accessing instobjs using the CPU requires to maintain the GPU L2 cache,
which we do in the acquire/release functions. This triggers a lot of L2
flushes/invalidates, but most of them are performed on an empty cache
(and thus return immediately), and overall context setup performance
greatly benefits from this (from 250ms to 160ms on Jetson TK1 for a
simple libdrm program).
Making L2 management more explicit should allow us to grab some more
performance in the future.
Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Fri, 4 Sep 2015 04:40:32 +0000 (14:40 +1000)]
drm/nouveau: remove unnecessary usage of object handles
No longer required in a lot of cases, as objects are identified over NVIF
via an alternate mechanism since the rework.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Alexandre Courbot [Thu, 3 Sep 2015 08:48:15 +0000 (17:48 +0900)]
drm/nouveau/ltc/gf100: add flush/invalidate functions
Allow clients to manually flush and invalidate L2. This will be useful
for Tegra systems for which we want to write instmem using the CPU.
Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Alexandre Courbot [Thu, 3 Sep 2015 08:48:14 +0000 (17:48 +0900)]
drm/nouveau/ltc: add hooks for invalidate and flush
These are useful for systems without a coherent CPU/GPU bus. For such
systems we may need to maintain the L2 ourselves.
Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Alexandre Courbot [Thu, 3 Sep 2015 08:48:13 +0000 (17:48 +0900)]
drm/nouveau/timer: re-introduce nvkm_wait_xsec macros
Reintroduce macros allowing us to test a register against a certain
mask, since this is the most common usage pattern for the more generic
nvkm_xsec macros and makes the code more concise and readable.
Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Alexandre Courbot [Thu, 3 Sep 2015 08:39:52 +0000 (17:39 +0900)]
drm/nouveau/pmu: do not assume a PMU is present
Some devices may not have a PMU. Avoid a NULL pointer dereference in
such cases by checking whether the pointer given to nvkm_pmu_pgob() is
valid.
Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ilia Mirkin [Tue, 20 Oct 2015 05:15:39 +0000 (01:15 -0400)]
drm/nouveau/gem: return only valid domain when there's only one
On nv50+, we restrict the valid domains to just the one where the buffer
was originally created. However after the buffer is evicted to system
memory, we might move it back to a different domain that was not
originally valid. When sharing the buffer and retrieving its GEM_INFO
data, we still want the domain that will be valid for this buffer in a
pushbuf, not the one where it currently happens to be.
This resolves fdo#92504 and several others. These are due to suspend
evicting all buffers, making it more likely that they temporarily end up
in the wrong place.
Cc: stable@vger.kernel.org
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=92504
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Marek Szyprowski [Tue, 13 Oct 2015 11:47:20 +0000 (13:47 +0200)]
drm/exynos/gem: remove DMA-mapping hacks used for constructing page array
Exynos GEM objects contains an array of pointers to the pages, which the
allocated buffer consists of. Till now the code used some hacks (like
relying on DMA-mapping internal structures or using ARM-specific
dma_to_pfn helper) to build this array. This patch fixes this by adding
proper call to dma_get_sgtable_attrs() and using the acquired scatter-list
to construct needed array. This approach is more portable (work also for
ARM64) and finally fixes the layering violation that was present in this
code.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
Andrzej Hajda [Mon, 26 Oct 2015 12:03:41 +0000 (13:03 +0100)]
ARM: exynos_defconfig: enable Exynos DRM Mixer driver
Mixer driver is selected by CONFIG_DRM_EXYNOS_HDMI option. Since Exynos5433
HDMI does not require Mixer. There will be separate options to select Mixer
and HDMI. Adding new option to defconfig before Kconfig will allow to keep
bisectability.
Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Acked-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
Andrzej Hajda [Mon, 26 Oct 2015 12:03:45 +0000 (13:03 +0100)]
drm/exynos: simplify Kconfig component names
Many Exynos DRM sub-options mentions Exynos DRM in their titles.
It is redundant and can be safely shortened. The patch additionally
makes some entries more descriptive.
Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
Andrzej Hajda [Mon, 26 Oct 2015 12:03:44 +0000 (13:03 +0100)]
drm/exynos: re-arrange Kconfig entries
Exynos DRM driver have quite big number of components and options.
The patch re-arranges them into three logical groups:
- CRTCs,
- Encoders and Bridges,
- Sub-drivers.
It should make driver options more clear.
Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
Andrzej Hajda [Mon, 26 Oct 2015 12:03:43 +0000 (13:03 +0100)]
drm/exynos: abstract out common dependency
All options depends on DRM_EXYNOS so it can be moved to enclosing if clause.
Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
Andrzej Hajda [Mon, 26 Oct 2015 12:03:42 +0000 (13:03 +0100)]
drm/exynos: separate Mixer and HDMI drivers
Latest Exynos SoCs does not have Mixer IP, but they still have HDMI IP.
Their drivers should be configurable separately.
Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
Andrzej Hajda [Mon, 26 Oct 2015 12:03:40 +0000 (13:03 +0100)]
drm/exynos/mixer: replace direct cross-driver call with drm mode validation
HDMI driver called directly function from MIXER driver to invalidate modes
not supported by MIXER. The patch replaces the hack with proper .atomic_check
callback.
Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
Andrzej Hajda [Mon, 26 Oct 2015 12:03:39 +0000 (13:03 +0100)]
drm/exynos: add atomic_check callback to exynos_crtc
Some CRTCs needs mode validation, this patch adds neccessary
callback to Exynos DRM framework. It is called from DRM core
via atomic_check helper for drm_crtc.
Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
Andrzej Hajda [Tue, 20 Oct 2015 09:22:41 +0000 (18:22 +0900)]
drm/exynos/decon5433: add support for DECON-TV
DECON-TV IP is responsible for generating video stream which is transferred
to HDMI IP. It is almost fully compatible with DECON IP.
The patch is based on initial work of Hyungwon Hwang.
Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
Andrzej Hajda [Tue, 20 Oct 2015 09:22:39 +0000 (11:22 +0200)]
drm/exynos/decon5433: remove duplicated initialization
Field .commit is already initialized few lines above.
Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
Andrzej Hajda [Tue, 20 Oct 2015 09:22:38 +0000 (11:22 +0200)]
drm/exynos/decon5433: merge different flag fields
Driver uses four different fields for internal flags. They can be merged
into one.
Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
Andrzej Hajda [Tue, 20 Oct 2015 09:22:37 +0000 (11:22 +0200)]
drm/exynos/decon5433: add function to set particular register bits
The driver often sets only particular bits of configuration registers.
Using separate function to such action simplifies the code.
Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
Andrzej Hajda [Tue, 20 Oct 2015 09:22:36 +0000 (11:22 +0200)]
drm/exynos/decon5433: fix timing registers writes
All timing registers should contain values decreased by one.
Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
Andrzej Hajda [Tue, 20 Oct 2015 09:22:34 +0000 (11:22 +0200)]
drm/exynos/decon5433: add PCLK clock
PCLK clock is used by DECON IP. The patch also replaces magic number with
number of clocks in array definition.
Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
Dave Airlie [Mon, 2 Nov 2015 22:02:44 +0000 (08:02 +1000)]
Merge branch 'vmwgfx-next' of git://people.freedesktop.org/~thomash/linux into drm-next
Changes for vmwgfx for 4.4. If there is time, I'll follow up with a series
to move to threaded irqs.
* 'vmwgfx-next' of git://people.freedesktop.org/~thomash/linux:
drm/vmwgfx: Replace iowrite/ioread with volatile memory accesses
drm/vmwgfx: Turn off support for multisample count != 0 v2
drm/vmwgfx: switch from ioremap_cache to memremap
Thomas Hellstrom [Wed, 28 Oct 2015 09:44:04 +0000 (10:44 +0100)]
drm/vmwgfx: Replace iowrite/ioread with volatile memory accesses
Now that we use memremap instead of ioremap, Use WRITE_ONCE / READ_ONCE
instead of iowrite / ioread.
Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com>
Reviewed-by: Sinclair Yeh <syeh@vmware.com>
Thomas Hellstrom [Mon, 26 Oct 2015 11:42:31 +0000 (04:42 -0700)]
drm/vmwgfx: Turn off support for multisample count != 0 v2
Do this until we know how much MOB memory to allocate for these surfaces.
v2: Mask also non-DX multisample.
Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Dan Williams [Wed, 28 Oct 2015 07:19:45 +0000 (00:19 -0700)]
drm/vmwgfx: switch from ioremap_cache to memremap
Per commit
2e586a7e017a "drm/vmwgfx: Map the fifo as cached" the driver
expects the fifo registers to be cacheable. In preparation for
deprecating ioremap_cache() convert its usage in vmwgfx to memremap().
Cc: David Airlie <airlied@linux.ie>
Cc: Thomas Hellstrom <thellstrom@vmware.com>
Cc: Sinclair Yeh <syeh@vmware.com>
Cc: dri-devel@lists.freedesktop.org
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
Reviewed-by: Thomas Hellstrom <thellstrom@vmware.com>
Dave Airlie [Thu, 29 Oct 2015 23:49:06 +0000 (09:49 +1000)]
Merge tag 'topic/drm-misc-2015-10-22' of git://anongit.freedesktop.org/drm-intel into drm-next
Few more drm-misc stragglers for 4.4. Big thing is the generic probe for
imx/rockchip/armada (but the variant for msm/rpi/exynos is still missing).
Also the hdmi clocking fixes from Ville which was a lot of confusion about
which tree it should be applied to ;-)
* tag 'topic/drm-misc-2015-10-22' of git://anongit.freedesktop.org/drm-intel:
drm: correctly check failed allocation
vga_switcheroo: Constify vga_switcheroo_handler
drm/armada: Convert the probe function to the generic drm_of_component_probe()
drm/rockchip: Convert the probe function to the generic drm_of_component_probe()
drm/imx: Convert the probe function to the generic drm_of_component_probe()
drm: Introduce generic probe function for component based masters.
drm/edid: Round to closest when computing the CEA/HDMI alternate clock
drm/edid: Fix up clock for CEA/HDMI modes specified via detailed timings
Dave Airlie [Thu, 29 Oct 2015 23:48:28 +0000 (09:48 +1000)]
Merge branch 'drm-next-4.4' of git://people.freedesktop.org/~agd5f/linux into drm-next
More amdgpu and radeon stuff for drm-next. Stoney support is the big change.
The rest is just bug fixes and code cleanups. The Stoney stuff is pretty
low impact with respect to existing chips.
* 'drm-next-4.4' of git://people.freedesktop.org/~agd5f/linux:
drm/amdgpu: change VM size default to 64GB
drm/amdgpu: add Stoney pci ids
drm/amdgpu: update the core VI support for Stoney
drm/amdgpu: add VCE support for Stoney (v2)
drm/amdgpu: add UVD support for Stoney
drm/amdgpu: add GFX support for Stoney (v2)
drm/amdgpu: add SDMA support for Stoney (v2)
drm/amdgpu: add DCE support for Stoney
drm/amdgpu: Update SMC/DPM for Stoney
drm/amdgpu: add GMC support for Stoney
drm/amdgpu: add Stoney chip family
drm/amdgpu: fix the broken vm->mutex V2
drm/amdgpu: remove the unnecessary parameter adev for amdgpu_fence_wait_any()
drm/amdgpu: remove the exclusive lock
drm/amdgpu: remove old lockup detection infrastructure
drm: fix trivial typos
drm/amdgpu/dce: simplify suspend/resume
drm/amdgpu/gfx8: set TC_WB_ACTION_EN in RELEASE_MEM packet
drm/radeon: Use rdev->gem.mutex to protect hyperz/cmask owners
Dave Airlie [Thu, 29 Oct 2015 23:45:33 +0000 (09:45 +1000)]
Merge tag 'drm-intel-next-fixes-2015-10-22' of git://anongit.freedesktop.org/drm-intel into drm-next
Bunch of -fixes for 4.4. Well not just, I've left the mmio/register work
from Ville in here since it's low-risk but lots of churn all over.
* tag 'drm-intel-next-fixes-2015-10-22' of git://anongit.freedesktop.org/drm-intel: (23 commits)
drm/i915: Use round to closest when computing the CEA 1.001 pixel clocks
drm/i915: Kill the leftover RMW from ivb_sprite_disable()
drm/i915: restore ggtt double-bind avoidance
drm/i915/skl: Enable pipe gamma for sprite planes.
drm/i915/skl+: Enable pipe CSC on cursor planes. (v2)
MAINTAINERS: add link to the Intel Graphics for Linux web site
drm/i915: Move skl/bxt gt specific workarounds to ring init
drm/i915: Drop i915_gem_obj_is_pinned() from set-cache-level
drm/i915: revert a few more watermark commits
drm/i915: Remove dev_priv argument from NEEDS_FORCE_WAKE
drm/i915: Clean up LVDS register handling
drm/i915: Throw out some useless variables
drm/i915: Parametrize and fix SWF registers
drm/i915: s/PIPE_FRMCOUNT_GM45/PIPE_FRMCOUNT_G4X/ etc.
drm/i915: Turn GEN5_ASSERT_IIR_IS_ZERO() into a function
drm/i915: Fix a few bad hex numbers in register defines
drm/i915: Protect register macro arguments
drm/i915: Include gpio_mmio_base in GMBUS reg defines
drm/i915: Parametrize HSW video DIP data registers
drm/i915: Eliminate weird parameter inversion from BXT PPS registers
...
Joonyoung Shim [Fri, 2 Oct 2015 00:33:47 +0000 (09:33 +0900)]
drm/exynos: cleanup name of gem object for exynos_drm
Struct of gem object in exynos_drm driver is struct exynos_drm_gem_obj.
It's too long and we can know its meaning of name without _obj postfix.
We use several names to variable name of gem object for exynos_drm -
exynos_gem_obj, gem_obj and obj. Especially "obj" name can cause
misunderstanding with variable name "obj" of struct drm_gem_object.
This will clean about name of gem object for exynos_drm as follows.
s/struct exynos_drm_gem_obj/struct exynos_drm_gem
s/exynos_gem_obj or gem_obj or obj/exynos_gem
Signed-off-by: Joonyoung Shim <jy0922.shim@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
Joonyoung Shim [Fri, 2 Oct 2015 00:30:38 +0000 (09:30 +0900)]
drm/exynos: fix to detach device of iommu
The arm_iommu_detach_device() is a function to detach device of iommu
attached by arm_iommu_attach_device(). The exynos-drm uses
arm_iommu_attach_device() so it should use arm_iommu_detach_device() to
detach device of iommu, not iommu_detach_device().
The drm_release_iommu_mapping() is a function to release mapping of
iommu created by arm_iommu_create_mapping(). It is called by
exynos_drm_unload() so shouldn't be called by drm_iommu_detach_device().
Signed-off-by: Joonyoung Shim <jy0922.shim@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
Gustavo Padovan [Fri, 4 Sep 2015 22:05:57 +0000 (19:05 -0300)]
drm/exynos: add cursor plane support
Set one of the planes for each crtc driver as a cursor plane enabled
window managers to fully work on exynos.
Signed-off-by: Gustavo Padovan <gustavo.padovan@collabora.co.uk>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
Gustavo Padovan [Mon, 12 Oct 2015 13:07:48 +0000 (22:07 +0900)]
drm/exynos: add global macro for the default primary plane
Define DEFAULT_WIN as zero to help set the primary plane on all CRTCs.
Some CRTCs were defining a variable to store the default window, but that
is not necessary as the default (primary) window is always the window zero.
Signed-off-by: Gustavo Padovan <gustavo.padovan@collabora.co.uk>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
Ingi Kim [Fri, 2 Oct 2015 08:59:26 +0000 (17:59 +0900)]
drm/exynos: fix spelling errors
This patch fixes spelling errors in drm fimc/gsc
inavild -> invaild
Signed-off-by: Ingi Kim <ingi2.kim@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
Tomasz Stanislawski [Fri, 25 Sep 2015 12:48:29 +0000 (14:48 +0200)]
drm: exynos: mixer: fix using usleep() in atomic context
This patch fixes calling usleep_range() after taking reg_slock
using spin_lock_irqsave(). The mdelay() is used instead.
Waiting in atomic context is not the best idea in general.
Hopefully, waiting occurs only when Video Processor fails
to reset correctly.
Signed-off-by: Tomasz Stanislawski <t.stanislaws@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
Andrzej Hajda [Fri, 25 Sep 2015 12:48:28 +0000 (14:48 +0200)]
drm/exynos/hdmi: remove unused field
The patch removes unused hdmi_context field.
Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
Reviewed-by: Gustavo Padovan <gustavo.padovan@collabora.co.uk>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
Andrzej Hajda [Fri, 25 Sep 2015 12:48:27 +0000 (14:48 +0200)]
drm/exynos/hdmi: improve HDMI/ACR related code
Simple formula can be used to calculate CTS and N coefficients.
Additionaly ACR registers have different offsets for different versions
of IP.
Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
Andrzej Hajda [Fri, 25 Sep 2015 12:48:26 +0000 (14:48 +0200)]
drm/exynos/hdmi: convert container_of macro to inline function
Inline function is safer than macro, also the name has been changed to
be consistent with other inline function encoder_to_hdmi.
Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
Reviewed-by: Gustavo Padovan <gustavo.padovan@collabora.co.uk>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
Andrzej Hajda [Fri, 25 Sep 2015 12:48:25 +0000 (14:48 +0200)]
drm/exynos/hdmi: remove deprecated hdmi_resources structure
hdmi_resources structure was filled by old platform data code and is not
necessary anymore. The patch removes it at groups together resource related
fields in hdmi_context.
Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
Andrzej Hajda [Fri, 25 Sep 2015 12:48:24 +0000 (14:48 +0200)]
drm/exynos/hdmi: convert to gpiod API
The patch converts API to gpiod and moves initialization code
to hdmi_resources_init.
Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
Andrzej Hajda [Fri, 25 Sep 2015 12:48:23 +0000 (14:48 +0200)]
drm/exynos/hdmi: simplify clock re-parenting
Driver tries to disable sclk_hdmi during re-parenting, to avoid possible
glitches. It is ineffective as the clock is used also by other devices (mixer).
Anyway driver works without disabling sclk_hdmi.
Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
Andrzej Hajda [Fri, 25 Sep 2015 12:48:22 +0000 (14:48 +0200)]
drm/exynos/hdmi: use constant size array for regulators
Driver always uses the same number of regulators, so there is no point in
dynamic allocation.
Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
Reviewed-by: Gustavo Padovan <gustavo.padovan@collabora.co.uk>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
Andrzej Hajda [Fri, 25 Sep 2015 12:48:21 +0000 (14:48 +0200)]
drm/exynos/hdmi: use optional regulator_get for hdmi-en
hdmi-en is an optional regulator so it should be better handled by
devm_regulator_get_optional call.
Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
Andrzej Hajda [Fri, 25 Sep 2015 12:48:20 +0000 (14:48 +0200)]
drm/exynos/hdmi: fix removal order
DRM device should be destroyed before releasing resources.
Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
Reviewed-by: Gustavo Padovan <gustavo.padovan@collabora.co.uk>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
Andrzej Hajda [Fri, 25 Sep 2015 12:48:19 +0000 (14:48 +0200)]
drm/exynos/hdmi: replace all writeb with writel
Registers are 32-bit, even if only lower 8-bits are used.
Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
Reviewed-by: Gustavo Padovan <gustavo.padovan@collabora.co.uk>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
Andrzej Hajda [Fri, 25 Sep 2015 12:48:18 +0000 (14:48 +0200)]
drm/exynos/hdmi: simplify HDMI-PHY power sequence
Currently driver tries to set specific HDMI-PHY registers in three situations:
- before reset,
- before power off,
- after applying HDMI-PHY configuration.
First two cases seems to be unnecessary - register contents will be lost
anyway. The third case can be merged with HDMI-PHY configuration by fixing
the last byte of configuration data.
The patch has been tested with following platforms:
- exynos4210-universal_c210,
- exynos4412-odroidu3,
- exynos5422-odroidxu3.
Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
Reviewed-by: Gustavo Padovan <gustavo.padovan@collabora.co.uk>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
Andrzej Hajda [Fri, 25 Sep 2015 12:48:17 +0000 (14:48 +0200)]
drm/exynos/hdmi: move PLL stabilization check code to separate function
The patch moves PLL stabilization check to separate function, adjust timeout
parameters and de-duplicates code common for both HW variants.
Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
Reviewed-by: Gustavo Padovan <gustavo.padovan@collabora.co.uk>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
Andrzej Hajda [Fri, 25 Sep 2015 12:48:16 +0000 (14:48 +0200)]
drm/exynos/hdmi: use mappings for registers with IP dependent address
Some registers resides at different offsets depending on device version.
This patch adds infrastructure for mapping such registers to proper address
based on hdmi_type. It adds also mappings to some registers.
Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
Reviewed-by: Gustavo Padovan <gustavo.padovan@collabora.co.uk>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
Andrzej Hajda [Fri, 25 Sep 2015 12:48:14 +0000 (14:48 +0200)]
drm/exynos/hdmi: remove support for deprecated compatible
This compatible was marked as deprecated in Jun 2013 and it is not used since
then. Additionally its driver data points to wrong pll settings, so it
cannot work anyway.
Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
Reviewed-by: Gustavo Padovan <gustavo.padovan@collabora.co.uk>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
Dave Airlie [Fri, 23 Oct 2015 01:54:03 +0000 (11:54 +1000)]
Merge branch 'msm-next' of git://people.freedesktop.org/~robclark/linux into drm-next
A bit smaller pull this time. Few minor things, plus initial support
for msm8996 (snapdragon 820).. Sorry, a bit latish, was hoping to get
some 8960/8064 DSI stuff included. But still waiting on the v2 of the
patchset (just pending some minor review comments). It would be nice
to get the DSI patches merged since it would help some folks trying to
get upstream kernel running on n4/n7 and xperia z and wanting to write
some more panel drivers. Also, waiting for OCMEM driver to get merged
via other trees and then I have a small bit to go along with that to
make the gpu actually work on devices w/ OCMEM (snapdragon 800, 805,
etc). So maybe a second later pull req, time permitting.
* 'msm-next' of git://people.freedesktop.org/~robclark/linux:
drm/msm: Remove local fbdev emulation Kconfig option
drm/msm/mdp5: Basic support for MDP5 v1.7 (MSM8996)
drm/msm/mdp: Add Software Pixel Extension support
drm/msm/mdp5: Use the newly introduced enum mdp_component_type
drm/msm/hdmi: Add basic HDMI support for msm8996
drm/msm/mdp5: Avoid printing error messages for optional clocks
drm/msm: Fix IOMMU clean up path in case msm_iommu_new() fails
drm/msm/mdp5: remove the cfg pointer from SMP struct
drm/msm/dsi: Updata LNn_CFG4 register settings for 28nm PHY
drm: msm: dsi: Don't attempt changing voltage of switches
drm/msm: update generated headers
Archit Taneja [Mon, 13 Jul 2015 06:42:07 +0000 (12:12 +0530)]
drm/msm: Remove local fbdev emulation Kconfig option
DRM_MSM_FBDEV config is used to enable/disable fbdev emulation for the
msm kms driver.
Replace this with the top level DRM_FBDEV_EMULATION config option where
applicable. This also prevents build breaks caused by undefined
drm_fb_helper_* functions when legacy fbdev support was disabled.
Signed-off-by: Archit Taneja <architt@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
Stephane Viau [Tue, 15 Sep 2015 12:41:53 +0000 (08:41 -0400)]
drm/msm/mdp5: Basic support for MDP5 v1.7 (MSM8996)
This change adds the basic MDP5 support for MSM8996.
Signed-off-by: Stephane Viau <sviau@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
Stephane Viau [Tue, 15 Sep 2015 12:41:52 +0000 (08:41 -0400)]
drm/msm/mdp: Add Software Pixel Extension support
In order to produce an image, the scalar needs to be fed extra
pixels. These top/bottom/left/right values depend on a various of
factors, including resolution, scaling type, phase step and
initial phase.
Pixel Extension are programmed by hardware in most targets - and
can be overwritten by software. For some targets (e.g.: msm8996),
software *must* program those registers.
In order to ease this computation, let's always use bilinear
filters, which are easier to program from kernel. Eventually,
all of these values will come down from user space for better
quality.
Signed-off-by: Stephane Viau <sviau@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
Stephane Viau [Tue, 15 Sep 2015 12:41:51 +0000 (08:41 -0400)]
drm/msm/mdp5: Use the newly introduced enum mdp_component_type
When calculating phase steps, let's use the same enum
mdp_component_type in order to ease the readability; 0/1 indexes
are a bit confusing and we now have explicit values to index
this type of arrays.
Signed-off-by: Stephane Viau <sviau@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
Stephane Viau [Tue, 15 Sep 2015 12:41:49 +0000 (08:41 -0400)]
drm/msm/hdmi: Add basic HDMI support for msm8996
The HDMI controller is new in MDP5 v1.7. As of now, this change
doesn't reflect the novelty and only adds the basics so the probe
gets triggered.
Signed-off-by: Stephane Viau <sviau@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
Stephane Viau [Tue, 15 Sep 2015 12:41:47 +0000 (08:41 -0400)]
drm/msm/mdp5: Avoid printing error messages for optional clocks
The current behavior is to try to get optional clocks and print a
dev_err message in case of failure. This looks rather confusing
and may increase with the amount of optional clocks.
We may need a cleaner way to handle per-device clocks but in the
meantime, let's reduce the amount of dev_err messages during the
probe.
Signed-off-by: Stephane Viau <sviau@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
Stephane Viau [Tue, 15 Sep 2015 12:41:46 +0000 (08:41 -0400)]
drm/msm: Fix IOMMU clean up path in case msm_iommu_new() fails
msm_iommu_new() can fail and this change makes sure that we
detect the failure and free the allocated domain before going
any further.
Signed-off-by: Stephane Viau <sviau@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
Stephane Viau [Tue, 15 Sep 2015 12:41:44 +0000 (08:41 -0400)]
drm/msm/mdp5: remove the cfg pointer from SMP struct
We want to make sure we control all the information being passed
down to SMP block. Having access to the cfg pointer here may create
bad things in the future.
Signed-off-by: Stephane Viau <sviau@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
Hai Li [Fri, 11 Sep 2015 19:56:09 +0000 (15:56 -0400)]
drm/msm/dsi: Updata LNn_CFG4 register settings for 28nm PHY
The current settings for 28nm PHY data lane CFG4 registers do
not work with certain panels. This change is to modify them to
hw recommended values.
Signed-off-by: Hai Li <hali@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
Bjorn Andersson [Tue, 18 Aug 2015 17:34:32 +0000 (10:34 -0700)]
drm: msm: dsi: Don't attempt changing voltage of switches
In some configurations the supplies are voltage switches and not LDOs,
making the set voltage call to fail. Check with the regulator framework
if the supply can change voltage before attempting.
Signed-off-by: Bjorn Andersson <bjorn.andersson@sonymobile.com>
Reviewed-by: Archit Taneja <architt@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
Rob Clark [Thu, 22 Oct 2015 16:36:57 +0000 (12:36 -0400)]
drm/msm: update generated headers
Signed-off-by: Rob Clark <robdclark@gmail.com>