Duncan P. N. Exon Smith [Tue, 20 Oct 2015 19:36:39 +0000 (19:36 +0000)]
bugpoint: Remove implicit ilist iterator conversions, NFC
This is the last of the implicit ilist iterator conversions in LLVM.
Still up for debate whether we let these bitrot back:
http://lists.llvm.org/pipermail/llvm-dev/2015-October/091617.html
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250852
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Krzysztof Parzyszek [Tue, 20 Oct 2015 19:33:46 +0000 (19:33 +0000)]
[Hexagon] Capture aggregate variables by reference, not value
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250851
91177308-0d34-0410-b5e6-
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Krzysztof Parzyszek [Tue, 20 Oct 2015 19:30:21 +0000 (19:30 +0000)]
[Hexagon] Do not fall-through if there is no CFG edge
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250850
91177308-0d34-0410-b5e6-
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Krzysztof Parzyszek [Tue, 20 Oct 2015 19:26:36 +0000 (19:26 +0000)]
[Hexagon] Use symbolic name for subregister instead of hardcoded number
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250849
91177308-0d34-0410-b5e6-
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Krzysztof Parzyszek [Tue, 20 Oct 2015 19:21:05 +0000 (19:21 +0000)]
[Hexagon] Change Based->Base in getBasedWithImmOffset
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250848
91177308-0d34-0410-b5e6-
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Krzysztof Parzyszek [Tue, 20 Oct 2015 19:04:53 +0000 (19:04 +0000)]
[Hexagon] Remove the remnants of isConstExtProfitable
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250845
91177308-0d34-0410-b5e6-
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Duncan P. N. Exon Smith [Tue, 20 Oct 2015 18:30:20 +0000 (18:30 +0000)]
unittests: Remove implicit ilist iterator conversions, NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250843
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Duncan P. N. Exon Smith [Tue, 20 Oct 2015 18:17:05 +0000 (18:17 +0000)]
llvm-diff: Remove implicit ilist iterator conversions, NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250842
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Chris Bieneman [Tue, 20 Oct 2015 18:16:37 +0000 (18:16 +0000)]
[CMake] All the checks for if LLVM_VERSION_* variables are set need to be if(DEFINED ...)
This is because if you set one of the variables to 0, if(NOT ...) is true, which isn't what you actually want. Should have thought that through better the first time.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250841
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Chris Bieneman [Tue, 20 Oct 2015 16:42:58 +0000 (16:42 +0000)]
[CMake] Refactor subdirectory inclusion code to take a project name.
Summary:
This refactoring makes some of the code used to control including subdirectories parameterized so it can be re-used elsewhere.
Specifically I want to re-use this code in clang to be able to turn off specific tool subdirectories.
Reviewers: chapuni, filcab, bogner, Bigcheese
Subscribers: emaste, llvm-commits
Differential Revision: http://reviews.llvm.org/D13783
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250835
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Artyom Skrobov [Tue, 20 Oct 2015 15:06:37 +0000 (15:06 +0000)]
Two switch blocks in VectorLegalizer::LegalizeOp already have a
default: llvm_unreachable("This action is not supported yet!");
-- so I'm adding one to the third switch block, too.
This is a follow-up fix for http://reviews.llvm.org/D13862
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250830
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Jonas Paulsson [Tue, 20 Oct 2015 15:05:58 +0000 (15:05 +0000)]
[SystemZ] Use LivePhysRegs helper class in SystemZShortenInst.cpp.
Don't use home brewed liveness tracking code for phys regs, since
this class does the job.
Reviewed by Ulrich Weigand.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250829
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Jonas Paulsson [Tue, 20 Oct 2015 15:05:54 +0000 (15:05 +0000)]
[SystemZ] Comment fix in test/CodeGen/SystemZ/fp-cmp-05.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250828
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Artyom Skrobov [Tue, 20 Oct 2015 13:14:52 +0000 (13:14 +0000)]
Adding support for TargetLoweringBase::LibCall
Summary:
TargetLoweringBase::Expand is defined as "Try to expand this to other ops,
otherwise use a libcall." For ISD::UDIV and ISD::SDIV, the choice between
the two possibilities was defined in a rather convoluted way:
- if DIVREM is legal, expand to DIVREM
- if DIVREM has a custom lowering, expand to DIVREM
- if DIVREM libcall is defined and a remainder from the same division is
computed elsewhere, expand to a DIVREM libcall
- else, expand to a DIV libcall
This had the undesirable effect that if both DIV and DIVREM are implemented
as libcalls, then ISD::UDIV and ISD::SDIV are expanded to the heavier DIVREM
libcall, even when the remainder isn't used.
The new code adds a new LegalizeAction, TargetLoweringBase::LibCall, so that
backends can directly control whether they prefer an expansion or a conversion
to a libcall. This makes the generic lowering code even more generic,
allowing its reuse in a wider range of target-specific configurations.
The useful effect is that ARM backend will now generate a call
to __aeabi_{i,u}div rather than __aeabi_{i,u}divmod in cases where
it doesn't need the remainder. There's no functional change outside
the ARM backend.
Reviewers: t.p.northover, rengolin
Subscribers: t.p.northover, llvm-commits, aemerson
Differential Revision: http://reviews.llvm.org/D13862
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250826
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Artyom Skrobov [Tue, 20 Oct 2015 13:06:02 +0000 (13:06 +0000)]
Combining DIV+REM->DIVREM doesn't belong in LegalizeDAG; move it over into DAGCombiner.
Summary:
In addition to moving the code over, this patch amends the DIV,REM -> DIVREM
combining to run on all affected nodes at once: if the nodes are converted
to DIVREM one at a time, then the resulting DIVREM may get legalized by the
backend into something target-specific that we won't be able to recognize
and correlate with the remaining nodes.
The motivation is to "prepare terrain" for D13862: when we set DIV and REM
to be legalized to libcalls, instead of the DIVREM, we otherwise lose the
ability to combine them together. To prevent this, we need to take the
DIV,REM -> DIVREM combining out of the lowering stage.
Reviewers: RKSimon, eli.friedman, rengolin
Subscribers: john.brawn, rengolin, llvm-commits
Differential Revision: http://reviews.llvm.org/D13733
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250825
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Igor Breger [Tue, 20 Oct 2015 11:56:42 +0000 (11:56 +0000)]
AVX512: Implemented encoding and intrinsics for VPBROADCASTB/W/D/Q instructions.
Differential Revision: http://reviews.llvm.org/D13884
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250819
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Andrea Di Biagio [Tue, 20 Oct 2015 11:20:13 +0000 (11:20 +0000)]
[x86] Fix AVX maskload/store intrinsic prototypes.
The mask value type for maskload/maskstore GCC builtins is never a vector of
packed floats/doubles.
This patch fixes the following issues:
1. The mask argument for builtin_ia32_maskloadpd and builtin_ia32_maskstorepd
should be of type llvm_v2i64_ty and not llvm_v2f64_ty.
2. The mask argument for builtin_ia32_maskloadpd256 and
builtin_ia32_maskstorepd256 should be of type llvm_v4i64_ty and not
llvm_v4f64_ty.
3. The mask argument for builtin_ia32_maskloadps and builtin_ia32_maskstoreps
should be of type llvm_v4i32_ty and not llvm_v4f32_ty.
4. The mask argument for builtin_ia32_maskloadps256 and
builtin_ia32_maskstoreps256 should be of type llvm_v8i32_ty and not
llvm_v8f32_ty.
Differential Revision: http://reviews.llvm.org/D13776
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250817
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Keno Fischer [Tue, 20 Oct 2015 10:13:55 +0000 (10:13 +0000)]
Fix missing INITIALIZE_PASS_DEPENDENCY for AddressSanitizer
Summary: In r231241, TargetLibraryInfoWrapperPass was added to
`getAnalysisUsage` for `AddressSanitizer`, but the corresponding
`INITIALIZE_PASS_DEPENDENCY` was not added.
Reviewers: dvyukov, chandlerc, kcc
Subscribers: kcc, llvm-commits
Differential Revision: http://reviews.llvm.org/D13629
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250813
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Manuel Klimek [Tue, 20 Oct 2015 08:21:01 +0000 (08:21 +0000)]
Make class final to pacify -Wnon-virtual-dtor.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250805
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Matt Arsenault [Tue, 20 Oct 2015 04:35:43 +0000 (04:35 +0000)]
AMDGPU: Add MachineInstr overloads for instruction format tests
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250797
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Lang Hames [Tue, 20 Oct 2015 04:35:02 +0000 (04:35 +0000)]
[Orc] Make CompileOnDemandLayer::findSymbol call BaseLayer::findSymbol if no
symbol definition is found in the logical dylibs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250796
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Matt Arsenault [Tue, 20 Oct 2015 03:59:58 +0000 (03:59 +0000)]
AMDGPU: Stop reserving v[254:255]
This wasn't doing anything useful. They weren't explicitly used
anywhere, and the RegScavenger ignores reserved registers.
This for some reason caused a random scheduling change in the test.
Getting the check lines to pass is too frustrating, and there's probably
not too much value in checking the vector case's operands N times.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250794
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JF Bastien [Tue, 20 Oct 2015 01:26:54 +0000 (01:26 +0000)]
WebAssembly: fix call/return syntax.
They are now typeless, unlike other operations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250793
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Duncan P. N. Exon Smith [Tue, 20 Oct 2015 01:18:39 +0000 (01:18 +0000)]
MSP430: Remove implicit ilist iterator conversions, NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250792
91177308-0d34-0410-b5e6-
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Duncan P. N. Exon Smith [Tue, 20 Oct 2015 01:12:49 +0000 (01:12 +0000)]
AsmParser: Remove implicit ilist iterator conversions, NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250791
91177308-0d34-0410-b5e6-
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Duncan P. N. Exon Smith [Tue, 20 Oct 2015 01:12:46 +0000 (01:12 +0000)]
SystemZ: Remove implicit ilist iterator conversion, NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250790
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Duncan P. N. Exon Smith [Tue, 20 Oct 2015 01:07:42 +0000 (01:07 +0000)]
XCore: Remove implicit ilist iterator conversions, NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250788
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Duncan P. N. Exon Smith [Tue, 20 Oct 2015 01:07:37 +0000 (01:07 +0000)]
PowerPC: Remove implicit ilist iterator conversions, NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250787
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Sanjoy Das [Tue, 20 Oct 2015 01:06:31 +0000 (01:06 +0000)]
[RS4GC] Remove a redundant linear search, NFCI
Since LiveVariables is uniqued (we just created it from a `DenseSet`),
`FindIndex(LiveVariables, LiveVariables[i])` is always `i`.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250786
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Sanjoy Das [Tue, 20 Oct 2015 01:06:28 +0000 (01:06 +0000)]
[RS4GC] Clean up `find_index`; NFC
- Bring it up to the LLVM Coding Style
- Sink it inside `CreateGCRelocates`, which is its only user
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250785
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Sanjoy Das [Tue, 20 Oct 2015 01:06:24 +0000 (01:06 +0000)]
[RS4GC] Re-purpose `normalizeForInvokeSafepoint`; NFC.
`normalizeForInvokeSafepoint` in RewriteStatepointsForGC.cpp, as it is
written today, deals with `gc.relocate` and `gc.result` uses of a
statepoint equally well. This change documents this fact and adds a
test case.
There is no functional change here -- only documentation of existing
functionality.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250784
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Sanjoy Das [Tue, 20 Oct 2015 01:06:17 +0000 (01:06 +0000)]
[RS4GC] Minor cleanup to `normalizeForInvokeSafepoint`; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250783
91177308-0d34-0410-b5e6-
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Duncan P. N. Exon Smith [Tue, 20 Oct 2015 00:59:43 +0000 (00:59 +0000)]
Sparc: Remove implicit ilist iterator conversions, NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250781
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Duncan P. N. Exon Smith [Tue, 20 Oct 2015 00:54:09 +0000 (00:54 +0000)]
NVPTX: Remove implicit ilist iterator conversions, NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250779
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Duncan P. N. Exon Smith [Tue, 20 Oct 2015 00:46:39 +0000 (00:46 +0000)]
Hexagon: Remove implicit ilist iterator conversions, NFC
There are two things out of the ordinary in this commit. First, I made
a loop obviously "infinite" in HexagonInstrInfo.cpp. After checking if
an instruction was at the beginning of a basic block (in which case,
`break`), the loop decremented and checked the iterator for `nullptr` as
the loop condition. This has never been possible (the prev pointers are
always been circular, so even with the weird ilist/iplist
implementation, this isn't been possible), so I removed the condition.
Second, in HexagonAsmPrinter.cpp there was another case of comparing a
`MachineBasicBlock::instr_iterator` against `MachineBasicBlock::end()`
(which returns `MachineBasicBlock::iterator`). While not incorrect,
it's fragile. I switched this to `::instr_end()`.
All that said, no functionality change intended here.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250778
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JF Bastien [Tue, 20 Oct 2015 00:37:42 +0000 (00:37 +0000)]
WebAssembly: fix syntax for br_if.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250777
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Duncan P. N. Exon Smith [Tue, 20 Oct 2015 00:36:08 +0000 (00:36 +0000)]
AsmPrinter: Remove implicit ilist iterator conversion, NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250776
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Duncan P. N. Exon Smith [Tue, 20 Oct 2015 00:15:20 +0000 (00:15 +0000)]
Mips: Remove implicit ilist iterator conversions, NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250769
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Duncan P. N. Exon Smith [Tue, 20 Oct 2015 00:06:41 +0000 (00:06 +0000)]
CppBackend: Remove implicit ilist iterator conversions, NFC
Mostly just converted to range-based for loops. May have converted a
couple of extra loops as a drive-by (not sure).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250766
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Duncan P. N. Exon Smith [Tue, 20 Oct 2015 00:02:50 +0000 (00:02 +0000)]
BPF: Remove implicit ilist iterator conversion, NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250765
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Duncan P. N. Exon Smith [Mon, 19 Oct 2015 23:25:57 +0000 (23:25 +0000)]
ARM: Remove implicit ilist iterator conversions, NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250759
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Lang Hames [Mon, 19 Oct 2015 23:23:17 +0000 (23:23 +0000)]
[Orc] Fix MSVC bugs introduced in r250749.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250758
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Duncan P. N. Exon Smith [Mon, 19 Oct 2015 23:20:14 +0000 (23:20 +0000)]
ObjCARC: Remove implicit ilist iterator conversions, NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250756
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Cong Hou [Mon, 19 Oct 2015 23:16:40 +0000 (23:16 +0000)]
Enhance loop rotation with existence of profile data in MachineBlockPlacement pass.
Currently, in MachineBlockPlacement pass the loop is rotated to let the best exit to be the last BB in the loop chain, to maximize the fall-through from the loop to outside. With profile data, we can determine the cost in terms of missed fall through opportunities when rotating a loop chain and select the best rotation. Basically, there are three kinds of cost to consider for each rotation:
1. The possibly missed fall through edge (if it exists) from BB out of the loop to the loop header.
2. The possibly missed fall through edges (if they exist) from the loop exits to BB out of the loop.
3. The missed fall through edge (if it exists) from the last BB to the first BB in the loop chain.
Therefore, the cost for a given rotation is the sum of costs listed above. We select the best rotation with the smallest cost. This is only for PGO mode when we have more precise edge frequencies.
Differential revision: http://reviews.llvm.org/D10717
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250754
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Lang Hames [Mon, 19 Oct 2015 22:49:18 +0000 (22:49 +0000)]
[Orc] Use '= default' for move constructor/assignment as per dblaikie's review.
Thanks Dave!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250749
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Duncan P. N. Exon Smith [Mon, 19 Oct 2015 22:23:36 +0000 (22:23 +0000)]
Linker: Remove implicit ilist iterator conversion, NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250748
91177308-0d34-0410-b5e6-
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David Blaikie [Mon, 19 Oct 2015 22:15:55 +0000 (22:15 +0000)]
Fix -Wdeprecated regarding ORC copying ValueMaterializers
As usual, this is a polymorphic hierarchy without polymorphic ownership,
so simply make the dtor protected non-virtual, protected default copy
ctor/assign, and make derived classes final. The derived classes will
pick up correct default public copy ops (and dtor) implicitly.
(wish I could add -Wdeprecated to the build, but last time I tried it
triggered on some system headers I still need to look into/figure out)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250747
91177308-0d34-0410-b5e6-
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Michael Liao [Mon, 19 Oct 2015 22:08:14 +0000 (22:08 +0000)]
[InstCombine] Optimize icmp of inc/dec at RHS
Allow LLVM to optimize the sequence like the following:
%inc = add nsw i32 %i, 1
%cmp = icmp slt %n, %inc
into:
%cmp = icmp sle i32 %n, %i
The case is not handled previously due to the complexity of compuation of %n.
Hence, LLVM cannot swap operands of icmp accordingly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250746
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Duncan P. N. Exon Smith [Mon, 19 Oct 2015 22:06:09 +0000 (22:06 +0000)]
Vectorize: Remove implicit ilist iterator conversions, NFC
Besides the usual, I finally added an overload to
`BasicBlock::splitBasicBlock()` that accepts an `Instruction*` instead
of `BasicBlock::iterator`. Someone can go back and remove this overload
later (after updating the callers I'm going to skip going forward), but
the most common call seems to be
`BB->splitBasicBlock(BB->getTerminator(), ...)` and I'm not sure it's
better to add `->getIterator()` to every one than have the overload.
It's pretty hard to get the usage wrong.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250745
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Sanjay Patel [Mon, 19 Oct 2015 21:59:12 +0000 (21:59 +0000)]
[CGP] transform select instructions into branches and sink expensive operands
This was originally checked in at r250527, but reverted at r250570 because of PR25222.
There were at least 2 problems:
1. The cost check was checking for an instruction with an exact cost of TCC_Expensive;
that should have been >=.
2. The cause of the clang stage 1 failures was illegally sinking 'call' instructions;
we can't sink instructions that may have side effects / are not safe to execute speculatively.
Fixed those conditions in sinkSelectOperand() and added test cases.
Original commit message:
This is a follow-up to the discussion in D12882.
Ideally, we would like SimplifyCFG to be able to form select instructions even when the operands
are expensive (as defined by the TTI cost model) because that may expose further optimizations.
However, we would then like a later pass like CodeGenPrepare to undo that transformation if the
target would likely benefit from not speculatively executing an expensive op (this patch).
Once we have this safety mechanism in place, we can adjust SimplifyCFG to restore its
select-formation behavior that changed with r248439.
Differential Revision: http://reviews.llvm.org/D13297
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250743
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Duncan P. N. Exon Smith [Mon, 19 Oct 2015 21:48:29 +0000 (21:48 +0000)]
X86: Remove implicit ilist iterator conversions, NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250741
91177308-0d34-0410-b5e6-
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Lang Hames [Mon, 19 Oct 2015 20:37:52 +0000 (20:37 +0000)]
[RuntimeDyld][COFF] Fix some endianness issues, re-enable the regression test.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250733
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Owen Anderson [Mon, 19 Oct 2015 19:27:40 +0000 (19:27 +0000)]
Restore the original behavior of SelectionDAG::getTargetIndex().
It looks like an extra negation snuck in as apart of restoring it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250726
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Krzysztof Parzyszek [Mon, 19 Oct 2015 19:10:48 +0000 (19:10 +0000)]
[Hexagon] Remove unnecessary argument sign extends
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250724
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Teresa Johnson [Mon, 19 Oct 2015 19:06:06 +0000 (19:06 +0000)]
Pass FunctionInfoIndex by reference to WriteFunctionSummaryToFile (NFC)
Implemented suggestion by dblakie in review for r250704.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250723
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Lang Hames [Mon, 19 Oct 2015 18:59:22 +0000 (18:59 +0000)]
[Orc] Add explicit move constructor and assignment operator to make MSVC happy.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250722
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Benjamin Kramer [Mon, 19 Oct 2015 18:41:23 +0000 (18:41 +0000)]
Add missing override noticed by Clang's -Winconsistent-missing-override.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250720
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Jun Bum Lim [Mon, 19 Oct 2015 18:34:53 +0000 (18:34 +0000)]
[AArch64]Merge halfword loads into a 32-bit load
Convert two halfword loads into a single 32-bit word load with bitfield extract
instructions. For example :
ldrh w0, [x2]
ldrh w1, [x2, #2]
becomes
ldr w0, [x2]
ubfx w1, w0, #16, #16
and w0, w0, #ffff
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250719
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Krzysztof Parzyszek [Mon, 19 Oct 2015 18:30:27 +0000 (18:30 +0000)]
[Hexagon] Fix debug information for local objects
- Isolate the check for the existence of a stack frame into hasFP.
- Implement getFrameIndexReference for DWARF address computation.
- Use getFrameIndexReference for offset computation in eliminateFrameIndex.
- Preserve debug information for dynamically allocated stack objects.
- Prefer FP to access local objects at -O0.
- Add experimental code to skip allocframe when not strictly necessary
(disabled by default).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250718
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Benjamin Kramer [Mon, 19 Oct 2015 18:26:16 +0000 (18:26 +0000)]
Put back SelectionDAG::getTargetIndex.
While technically this is untested dead code, it has out-of-tree users.
This reverts a part of r250434.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250717
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Lang Hames [Mon, 19 Oct 2015 17:53:43 +0000 (17:53 +0000)]
[Orc] Lambda needs to capture 'this'.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250716
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Lang Hames [Mon, 19 Oct 2015 17:49:37 +0000 (17:49 +0000)]
[Orc] Remove extraneous semicolon that found its way into r250712.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250715
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Krzysztof Parzyszek [Mon, 19 Oct 2015 17:46:01 +0000 (17:46 +0000)]
[Hexagon] Delay emission of CFI instructions
Emit the CFI instructions after all code transformation have been done.
This will avoid any interference between CFI instructions and packetization.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250714
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Matthias Braun [Mon, 19 Oct 2015 17:44:22 +0000 (17:44 +0000)]
Revert "RegisterPressure: allocatable physreg uses are always kills"
This reverts commit r250596.
Reverted for now as the commit triggers assert in the AMDGPU target
pending investigation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250713
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Lang Hames [Mon, 19 Oct 2015 17:43:51 +0000 (17:43 +0000)]
[Orc] Add support for emitting indirect stubs directly into the JIT target's
memory, rather than representing the stubs in IR. Update the CompileOnDemand
layer to use this functionality.
Directly emitting stubs is much cheaper than building them in IR and codegen'ing
them (see below). It also plays well with remote JITing - stubs can be emitted
directly in the target process, rather than having to send them over the wire.
The downsides are:
(1) Care must be taken when resolving symbols, as stub symbols are held in a
separate symbol table. This is only a problem for layer writers and other
people using this API directly. The CompileOnDemand layer hides this detail.
(2) Aliases of function stubs can't be symbolic any more (since there's no
symbol definition in IR), but must be converted into a constant pointer
expression. This means that modules containing aliases of stubs cannot be
cached. In practice this is unlikely to be a problem: There's no benefit to
caching such a module anyway.
On balance I think the extra performance is more than worth the trade-offs: In a
simple stress test with 10000 dummy functions requiring stubs and a single
executed "hello world" main function, directly emitting stubs reduced user time
for JITing / executing by over 90% (1.5s for IR stubs vs 0.1s for direct
emission).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250712
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Teresa Johnson [Mon, 19 Oct 2015 15:23:03 +0000 (15:23 +0000)]
Convert gold-plugin unnecessary unique_ptr into local (NFC)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250704
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Teresa Johnson [Mon, 19 Oct 2015 15:21:46 +0000 (15:21 +0000)]
Fix required library for r250699 to BitWriter instead of BitReader.
This should fix the mingw3 bot failure.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250703
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Teresa Johnson [Mon, 19 Oct 2015 15:19:02 +0000 (15:19 +0000)]
Fix windows bot failures from r250699 by removing "/" from expected path
in test output.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250701
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Teresa Johnson [Mon, 19 Oct 2015 14:30:44 +0000 (14:30 +0000)]
llvm-lto support for generating combined function indexes
Summary:
This patch adds support to llvm-lto that mirrors the support added by
r249270 to the gold plugin. This enables better testing of combined
index generation for ThinLTO.
Added a new test, and this support will be used in the test in D13515.
Reviewers: joker.eph
Subscribers: llvm-commits
Differential Revision: http://reviews.llvm.org/D13847
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250699
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Benjamin Kramer [Mon, 19 Oct 2015 13:05:25 +0000 (13:05 +0000)]
Remove CRLF newlines. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250698
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Asiri Rathnayake [Mon, 19 Oct 2015 11:44:24 +0000 (11:44 +0000)]
Fix mapping of @llvm.arm.ssat/usat intrinsics to ssat/usat instructions
The mapping of these two intrinsics in ARMInstrInfo.td had a small
omission which lead to their operands not being validated/transformed
before being lowered into usat and ssat instructions. This can cause
incorrect instructions to be emitted.
I've also added tests for the remaining two saturating arithmatic
intrinsics @llvm.arm.qadd and @llvm.arm.qsub as they are missing
codegen tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250697
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James Molloy [Mon, 19 Oct 2015 08:54:59 +0000 (08:54 +0000)]
[GlobalsAA] Fix a really horrible iterator invalidation bug
We were keeping a reference to an object in a DenseMap then mutating it. At the end of the function we were attempting to clone that reference into other keys in the DenseMap, but DenseMap may well decide to resize its hashtable which would invalidate the reference!
It took an extremely complex testcase to catch this - many thanks to Zhendong Su for catching it in PR25225.
This fixes PR25225.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250692
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Elena Demikhovsky [Mon, 19 Oct 2015 07:43:38 +0000 (07:43 +0000)]
Removed parameter "Consecutive" from isLegalMaskedLoad() / isLegalMaskedStore().
Originally I planned to use the same interface for masked gather/scatter and set isConsecutive to "false" in this case.
Now I'm implementing masked gather/scatter and see that the interface is inconvenient. I want to add interfaces isLegalMaskedGather() / isLegalMaskedScatter() instead of using the "Consecutive" parameter in the existing interfaces.
Differential Revision: http://reviews.llvm.org/D13850
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250686
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Zlatko Buljan [Mon, 19 Oct 2015 07:16:26 +0000 (07:16 +0000)]
[mips][microMIPS] Implement ADDQ.PH, ADDQ_S.W, ADDQH.PH, ADDQH.W, ADDSC, ADDU.PH, ADDU_S.QB, ADDWC and ADDUH.QB instructions
Differential Revision: http://reviews.llvm.org/D13130
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250685
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Zlatko Buljan [Mon, 19 Oct 2015 06:34:44 +0000 (06:34 +0000)]
[mips][microMIPS] Implement ABSQ.QB, ABSQ_S.PH, ABSQ_S.W, ABSQ_S.QB, INSV, MADD, MADDU, MSUB, MSUBU, MULT and MULTU instructions
Differential Revision: http://reviews.llvm.org/D13721
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250683
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Xinliang David Li [Mon, 19 Oct 2015 04:17:10 +0000 (04:17 +0000)]
[PGO] Eliminate prof data register calls on FreeBSD platform
This is a follow up patch of r250199 after verifying the start/stop
section symbols work as spected on FreeBSD.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250679
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Jakub Staszak [Sun, 18 Oct 2015 19:34:10 +0000 (19:34 +0000)]
Preserve CFG in MergedLoadStoreMotion. This fixes PR24426.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250660
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Rafael Espindola [Sun, 18 Oct 2015 14:04:56 +0000 (14:04 +0000)]
Add hashing and DenseMapInfo for ArrayRef
Sometimes it is more natural to use a ArrayRef<uint8_t> than a StringRef to
represent a range of bytes that is not, semantically, a string.
This will be used in lld in a sec.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250658
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Simon Pilgrim [Sun, 18 Oct 2015 12:54:37 +0000 (12:54 +0000)]
[X86][SSE] Add vector bit rotation tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250656
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Simon Pilgrim [Sun, 18 Oct 2015 12:33:54 +0000 (12:33 +0000)]
Use SDValue bool check. NFCI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250653
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Simon Pilgrim [Sun, 18 Oct 2015 11:47:23 +0000 (11:47 +0000)]
Move one-use variable inside test. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250651
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Asaf Badouh [Sun, 18 Oct 2015 11:04:38 +0000 (11:04 +0000)]
[X86][AVX512DQ] add scalar fpclass
Differential Revision: http://reviews.llvm.org/D13769
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250650
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Igor Breger [Sun, 18 Oct 2015 09:56:39 +0000 (09:56 +0000)]
AVX512: Lowering i8/i16 vector CTLZ using the dword LZCNT vector instruction
Differential Revision: http://reviews.llvm.org/D13632
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250649
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Craig Topper [Sun, 18 Oct 2015 05:29:05 +0000 (05:29 +0000)]
[Sparc] Use MCPhysReg instead of unsigned to size static arrays of registers. Should reduce the table size.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250644
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Craig Topper [Sun, 18 Oct 2015 05:15:38 +0000 (05:15 +0000)]
Use array_lengthof. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250643
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Craig Topper [Sun, 18 Oct 2015 05:15:34 +0000 (05:15 +0000)]
Make a bunch of static arrays const.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250642
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Lang Hames [Sun, 18 Oct 2015 01:41:37 +0000 (01:41 +0000)]
[RuntimeDyld] Add support for absolute symbols.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250639
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Xinliang David Li [Sun, 18 Oct 2015 01:02:29 +0000 (01:02 +0000)]
Minor Instr PGO code restructuring
1. Key constant values (version, magic) and data structures related to raw and
indexed profile format are moved into one centralized file: InstrProf.h.
2. Utility function such as MD5Hash computation is also moved to the common
header to allow sharing with other components in the future.
3. A header data structure is introduced for Indexed format so that the reader
and writer can always be in sync.
4. Added some comments to document different places where multiple definition
of the data structure must be kept in sync (reader/writer, runtime, lowering
etc). No functional change is intended.
Differential Revision: http://reviews.llvm.org/D13758
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250638
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Sanjoy Das [Sun, 18 Oct 2015 00:29:27 +0000 (00:29 +0000)]
[SCEV] Fix whitespace issues and remove extra braces; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250636
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Sanjoy Das [Sun, 18 Oct 2015 00:29:23 +0000 (00:29 +0000)]
[SCEV] Use std::all_of and std::any_of; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250635
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Sanjoy Das [Sun, 18 Oct 2015 00:29:20 +0000 (00:29 +0000)]
[SCEV] Use auto where it helps remove line breaks; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250634
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Sanjoy Das [Sun, 18 Oct 2015 00:29:16 +0000 (00:29 +0000)]
[SCEV] Use range for loops; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250633
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Craig Topper [Sat, 17 Oct 2015 21:32:28 +0000 (21:32 +0000)]
Use std::find instead of manual loop.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250624
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Craig Topper [Sat, 17 Oct 2015 21:32:26 +0000 (21:32 +0000)]
Use std::is_sorted to replace a custom version. Also replace a comparison predicate struct with a lambda.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250623
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Simon Pilgrim [Sat, 17 Oct 2015 19:04:24 +0000 (19:04 +0000)]
[X86][XOP] Add VPROT instruction opcodes
Added X86ISD opcodes for VPROT vector rotate by variable and by immediate.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250620
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Craig Topper [Sat, 17 Oct 2015 18:22:46 +0000 (18:22 +0000)]
Remove unnecessary 'const' pointed out by David Blaikie.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250619
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Simon Pilgrim [Sat, 17 Oct 2015 18:21:53 +0000 (18:21 +0000)]
[X86][XOP] Add VPROT rotate by immediate intrinsics tests
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250618
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Simon Pilgrim [Sat, 17 Oct 2015 16:49:43 +0000 (16:49 +0000)]
[DAG] Ensure vector constant folding uses correct scalar undef types
Minor fix to D13665 found during post-commit review.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250616
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Craig Topper [Sat, 17 Oct 2015 16:37:13 +0000 (16:37 +0000)]
Replace a custom table sort check with std::is_sorted. Change a function to take ArrayRef instead of pointer and length. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250615
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Craig Topper [Sat, 17 Oct 2015 16:37:11 +0000 (16:37 +0000)]
Use std::begin/end and std::is_sorted to simplify some code. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250614
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