Jakob Stoklund Olesen [Wed, 7 Dec 2011 00:22:07 +0000 (00:22 +0000)]
Add MachineOperand IsInternalRead flag.
This flag is used when bundling machine instructions. It indicates
whether the operand reads a value defined inside or outside its bundle.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145997
91177308-0d34-0410-b5e6-
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Eli Friedman [Wed, 7 Dec 2011 00:11:56 +0000 (00:11 +0000)]
Fix an optimization involving EXTRACT_SUBVECTOR in DAGCombine so it behaves correctly. PR11494.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145996
91177308-0d34-0410-b5e6-
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Jakub Staszak [Wed, 7 Dec 2011 00:08:00 +0000 (00:08 +0000)]
Remove unneeded type.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145995
91177308-0d34-0410-b5e6-
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Jim Grosbach [Wed, 7 Dec 2011 00:02:17 +0000 (00:02 +0000)]
ARM: Parameterize the immediate operand type for NEON VSHLL.
No functional change yet. Will be implementing range-checked immediates
for better diagnostics and disambiguation of instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145994
91177308-0d34-0410-b5e6-
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Jakub Staszak [Tue, 6 Dec 2011 23:59:33 +0000 (23:59 +0000)]
- Remove unneeded #includes.
- Remove unused types/fields.
- Add some constantness.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145993
91177308-0d34-0410-b5e6-
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Jim Grosbach [Tue, 6 Dec 2011 23:43:54 +0000 (23:43 +0000)]
Extend AsmMatcher token literal matching to allow aliasing.
For example, ARM allows:
vmov.u32 s4, #0 -> vmov.i32, #0
'u32' is a more specific designator for the 32-bit integer type specifier
and is legal for any instruction which accepts 'i32' as a datatype suffix.
We want to say,
def : TokenAlias<".u32", ".i32">;
This works by marking the match class of 'From' as a subclass of the
match class of 'To'.
rdar://
10435076
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145992
91177308-0d34-0410-b5e6-
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Jakub Staszak [Tue, 6 Dec 2011 23:33:07 +0000 (23:33 +0000)]
Make Release Notes HTML 4.01 Strict.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145991
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Daniel Dunbar [Tue, 6 Dec 2011 23:13:42 +0000 (23:13 +0000)]
llvm-build: Don't generate duplicate dependencies when LLVMBuild files define
multiple components.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145989
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Anshuman Dasgupta [Tue, 6 Dec 2011 23:12:42 +0000 (23:12 +0000)]
Add documentation for machine-independent DFA packetizer
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145988
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Jakob Stoklund Olesen [Tue, 6 Dec 2011 22:41:31 +0000 (22:41 +0000)]
Revert r145971: "Use conservative size estimate for tBR_JTr."
This caused more offset errors.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145980
91177308-0d34-0410-b5e6-
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Jakub Staszak [Tue, 6 Dec 2011 22:31:27 +0000 (22:31 +0000)]
Add link to builtin_expect in Release Notes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145979
91177308-0d34-0410-b5e6-
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Bill Wendling [Tue, 6 Dec 2011 22:18:12 +0000 (22:18 +0000)]
Re-enable compact unwind. It seems to work now. <rdar://problem/
10441838>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145977
91177308-0d34-0410-b5e6-
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Bill Wendling [Tue, 6 Dec 2011 22:14:27 +0000 (22:14 +0000)]
Explicitly check for the different SUB instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145976
91177308-0d34-0410-b5e6-
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Evan Cheng [Tue, 6 Dec 2011 22:12:01 +0000 (22:12 +0000)]
First chunk of MachineInstr bundle support.
1. Added opcode BUNDLE
2. Taught MachineInstr class to deal with bundled MIs
3. Changed MachineBasicBlock iterator to skip over bundled MIs; added an iterator to walk all the MIs
4. Taught MachineBasicBlock methods about bundled MIs
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145975
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Jim Grosbach [Tue, 6 Dec 2011 22:07:02 +0000 (22:07 +0000)]
Tidy up. Fix naming convention stuff for some internal functions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145974
91177308-0d34-0410-b5e6-
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Jakob Stoklund Olesen [Tue, 6 Dec 2011 21:55:39 +0000 (21:55 +0000)]
Use conservative size estimate for tBR_JTr.
This pseudo-instruction contains a .align directive in its expansion, so
the total size may vary by 2 bytes.
It is too difficult to accurately keep track of this alignment
directive, just use the worst-case size instead.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145971
91177308-0d34-0410-b5e6-
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Jakob Stoklund Olesen [Tue, 6 Dec 2011 21:55:35 +0000 (21:55 +0000)]
Remove alignment from deserted constant islands.
ARMConstantIslandPass may sometimes leave empty constant islands behind
(it really shouldn't). Remove the alignment from the empty islands so
the size calculations are still correct.
This should fix the many Thumb1 assembler errors in the nightly test
suite.
The reduced test case for this problem is way too big. That is to be
expected for ARMConstantIslandPass bugs.
<rdar://problem/
10534709>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145970
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Bill Wendling [Tue, 6 Dec 2011 21:34:01 +0000 (21:34 +0000)]
Encode the total stack if there isn't a frame.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145969
91177308-0d34-0410-b5e6-
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Bill Wendling [Tue, 6 Dec 2011 21:23:42 +0000 (21:23 +0000)]
* Add a macro to remove a magic number.
* Rename variables to reflect what they're actually used for.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145968
91177308-0d34-0410-b5e6-
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Jakob Stoklund Olesen [Tue, 6 Dec 2011 21:08:39 +0000 (21:08 +0000)]
Pretty-print basic block alignment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145965
91177308-0d34-0410-b5e6-
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Jakub Staszak [Tue, 6 Dec 2011 20:56:36 +0000 (20:56 +0000)]
Add link to llvm.expect in Release Notes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145964
91177308-0d34-0410-b5e6-
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Hal Finkel [Tue, 6 Dec 2011 20:55:46 +0000 (20:55 +0000)]
delaying restore-cr changed assigned registers in some tests
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145963
91177308-0d34-0410-b5e6-
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Hal Finkel [Tue, 6 Dec 2011 20:55:41 +0000 (20:55 +0000)]
add a test case that uses RESTORE_CR
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145962
91177308-0d34-0410-b5e6-
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Hal Finkel [Tue, 6 Dec 2011 20:55:36 +0000 (20:55 +0000)]
add RESTORE_CR and support CR unspills
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145961
91177308-0d34-0410-b5e6-
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Hal Finkel [Tue, 6 Dec 2011 20:52:56 +0000 (20:52 +0000)]
remove old FIXME
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145960
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Bill Wendling [Tue, 6 Dec 2011 19:16:17 +0000 (19:16 +0000)]
Check the correct value for small stack sizes. Also modify some comments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145954
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Bill Wendling [Tue, 6 Dec 2011 19:09:06 +0000 (19:09 +0000)]
For a small sized stack, we encode that value directly with no "stack adjust" value.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145952
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Justin Holewinski [Tue, 6 Dec 2011 17:39:48 +0000 (17:39 +0000)]
PTX: Continue to fix up the register mess.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145947
91177308-0d34-0410-b5e6-
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Justin Holewinski [Tue, 6 Dec 2011 17:39:46 +0000 (17:39 +0000)]
PTX: Encode registers as unsigned values in the MC asm printer instead of using external symbols
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145946
91177308-0d34-0410-b5e6-
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Sebastian Pop [Tue, 6 Dec 2011 17:34:16 +0000 (17:34 +0000)]
use space star instead of star space
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145944
91177308-0d34-0410-b5e6-
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Sebastian Pop [Tue, 6 Dec 2011 17:34:11 +0000 (17:34 +0000)]
add missing point at the end of sentences
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145943
91177308-0d34-0410-b5e6-
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Benjamin Kramer [Tue, 6 Dec 2011 16:14:29 +0000 (16:14 +0000)]
Simplify common predecessor finding.
- Walking over pred_begin/pred_end is an expensive operation.
- PHINodes contain a value for each predecessor anyway.
- While it may look like we used to save a few iterations with the set,
be aware that getIncomingValueForBlock does a linear search on
the values of the phi node.
- Another -5% on ARMDisassembler.cpp (Release build). This was the last
entry in the profile that was obviously wasting time.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145937
91177308-0d34-0410-b5e6-
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Benjamin Kramer [Tue, 6 Dec 2011 11:50:26 +0000 (11:50 +0000)]
Push StringRefs through the metadata interface.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145934
91177308-0d34-0410-b5e6-
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Craig Topper [Tue, 6 Dec 2011 09:31:36 +0000 (09:31 +0000)]
Add X86ISD::HADD/HSUB to getTargetNodeName
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145929
91177308-0d34-0410-b5e6-
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Craig Topper [Tue, 6 Dec 2011 09:04:59 +0000 (09:04 +0000)]
Fix a bunch of SSE/AVX patterns to use v2i64/v4i64 loads since all other integer vector loads are promoted to those.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145927
91177308-0d34-0410-b5e6-
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Craig Topper [Tue, 6 Dec 2011 08:21:25 +0000 (08:21 +0000)]
Merge floating point and integer UNPCK X86ISD node types.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145926
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NAKAMURA Takumi [Tue, 6 Dec 2011 06:48:26 +0000 (06:48 +0000)]
test/MC: Introduce MC/MachO/ARM, and relocate relax-thumb2-branches.s into it.
FIXME: Restore more other arch-dependent MachO tests. (eg. r126401 and r133856)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145925
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Craig Topper [Tue, 6 Dec 2011 05:31:16 +0000 (05:31 +0000)]
Clean up some of the shuffle decoding code for UNPCK instructions. Add instruction commenting for AVX/AVX2 forms for integer UNPCKs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145924
91177308-0d34-0410-b5e6-
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Jim Grosbach [Tue, 6 Dec 2011 05:28:00 +0000 (05:28 +0000)]
ARM mode 'mul' operand ordering tweak.
Same as r145922, just for ARM mode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145923
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Jim Grosbach [Tue, 6 Dec 2011 05:03:45 +0000 (05:03 +0000)]
Thumb2: MUL two-operand form encoding operand order fix.
Fix the alias to encode 'mul r5, r6' as if it were 'mul r5, r6, r5' so we
match gas.
rdar://
10532439
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145922
91177308-0d34-0410-b5e6-
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Craig Topper [Tue, 6 Dec 2011 04:59:07 +0000 (04:59 +0000)]
Merge isSHUFPMask and isCommutedSHUFPMask into single function that can do both. Do the same for the 256-bit version. Use loops to reduce size of isVSHUFPYMask. Fix test cases that were incorrectly passing due to isCommutedSHUFPMask not checking for the vector being 128-bit. This caused some 256-bit shuffles to be incorrectly commuted.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145921
91177308-0d34-0410-b5e6-
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Jim Grosbach [Tue, 6 Dec 2011 04:49:29 +0000 (04:49 +0000)]
Thumb2 encoding choice correction for PLD.
Using encoding T1 for offset of #0 and encoding T2 for #-0.
rdar://
10532413
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145919
91177308-0d34-0410-b5e6-
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NAKAMURA Takumi [Tue, 6 Dec 2011 03:56:05 +0000 (03:56 +0000)]
test/MC: Move relax-thumb2-branches.s from MC/MachO/ to MC/ARM.
MC/MachO assumes x86.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145916
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Dan Gohman [Tue, 6 Dec 2011 03:35:58 +0000 (03:35 +0000)]
Fix a subtle semantic issue with poison values that came up in
recent discussions. Poison can't make every value that depends on
it act in maximally undefined ways, because the optimizer may still
hoist code following the usual rules for undef. Make Poison invoke
its full undefined behavior only when it reaches an instruction with
externally visible side effects.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145913
91177308-0d34-0410-b5e6-
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Bruno Cardoso Lopes [Tue, 6 Dec 2011 03:34:48 +0000 (03:34 +0000)]
Use branches instead of jumps + variable cleanup. Testcase coming next. Patch by Jack Carter
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145912
91177308-0d34-0410-b5e6-
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Bruno Cardoso Lopes [Tue, 6 Dec 2011 03:34:42 +0000 (03:34 +0000)]
Explicit symbols for gnu mimicing relocations. Patch by Jack Carter
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145911
91177308-0d34-0410-b5e6-
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Bruno Cardoso Lopes [Tue, 6 Dec 2011 03:34:36 +0000 (03:34 +0000)]
Add register HWR29 numbering. Patch by Jack Carter
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145910
91177308-0d34-0410-b5e6-
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Dan Gohman [Tue, 6 Dec 2011 03:31:14 +0000 (03:31 +0000)]
Line up the comments in a code example.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145908
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Dan Gohman [Tue, 6 Dec 2011 03:18:47 +0000 (03:18 +0000)]
Rename "Trap Values" to "Poison Values", to better reflect their
purpose, and to avoid ambiguity with other uses of the word "trap"
in LangRef.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145907
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Andrew Trick [Tue, 6 Dec 2011 03:13:31 +0000 (03:13 +0000)]
LSR: prune undesirable formulae early.
It's always good to prune early, but formulae that are unsatisfactory
in their own right need to be removed before running any other pruning
heuristics. We easily avoid generating such formulae, but we need them
as an intermediate basis for forming other good formulae.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145906
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Evan Cheng [Tue, 6 Dec 2011 02:49:06 +0000 (02:49 +0000)]
Mix some minor misuse of MachineBasicBlock iterator.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145903
91177308-0d34-0410-b5e6-
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Pete Cooper [Tue, 6 Dec 2011 02:06:50 +0000 (02:06 +0000)]
Removed isWinToJoinCrossClass from the register coalescer.
The new register allocator is much more able to split back up ranges too constrained by register classes.
Fixes <rdar://problem/
10466609>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145899
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Chris Lattner [Tue, 6 Dec 2011 02:00:33 +0000 (02:00 +0000)]
allow TinyPtrVector to implicitly convert to ArrayRef.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145898
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Lang Hames [Tue, 6 Dec 2011 01:57:59 +0000 (01:57 +0000)]
Kill off the LoopSplitter. It's not being used or maintained.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145897
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Bill Wendling [Tue, 6 Dec 2011 01:57:48 +0000 (01:57 +0000)]
Add a comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145896
91177308-0d34-0410-b5e6-
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Jim Grosbach [Tue, 6 Dec 2011 01:53:17 +0000 (01:53 +0000)]
Tidy up value checking.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145895
91177308-0d34-0410-b5e6-
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NAKAMURA Takumi [Tue, 6 Dec 2011 01:48:32 +0000 (01:48 +0000)]
MipsAsmBackend.cpp, PPCAsmBackend.cpp: Fix -Asserts build to appease msvc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145894
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Lang Hames [Tue, 6 Dec 2011 01:45:57 +0000 (01:45 +0000)]
Update PBQP's analysis usage to reflect the requirements of the inline spiller.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145893
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Chad Rosier [Tue, 6 Dec 2011 01:44:17 +0000 (01:44 +0000)]
[arm-fast-isel] Doublewords only require word-alignment.
rdar://
10528060
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145891
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Jakob Stoklund Olesen [Tue, 6 Dec 2011 01:43:02 +0000 (01:43 +0000)]
Align ARM constant pool islands via their basic block.
Previously, all ARM::CONSTPOOL_ENTRY instructions had a hardwired
alignment of 4 bytes emitted by ARMAsmPrinter. Now the same alignment
is set on the basic block.
This is in preparation of supporting ARM constant pool islands with
different alignments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145890
91177308-0d34-0410-b5e6-
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Jakob Stoklund Olesen [Tue, 6 Dec 2011 01:26:19 +0000 (01:26 +0000)]
Use logarithmic units for basic block alignment.
This was actually a bit of a mess. TLI.setPrefLoopAlignment was clearly
documented as taking log2(bytes) units, but the x86 target would still
set a preferred loop alignment of '16'.
CodePlacementOpt passed this number on to the basic block, and
AsmPrinter interpreted it as bytes.
Now both MachineFunction and MachineBasicBlock use logarithmic
alignments.
Obviously, MachineConstantPool still measures alignments in bytes, so we
can emulate the thrill of using as.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145889
91177308-0d34-0410-b5e6-
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Bill Wendling [Tue, 6 Dec 2011 01:26:14 +0000 (01:26 +0000)]
The compact encoding of the registers are 3-bits each. Make sure we shift the
value over that much.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145888
91177308-0d34-0410-b5e6-
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Jim Grosbach [Tue, 6 Dec 2011 01:08:19 +0000 (01:08 +0000)]
Fix ARM handling of tBcc branch relaxation.
rdar://
10069056
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145885
91177308-0d34-0410-b5e6-
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Jakob Stoklund Olesen [Tue, 6 Dec 2011 00:51:12 +0000 (00:51 +0000)]
Use an existing function.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145883
91177308-0d34-0410-b5e6-
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Jakob Stoklund Olesen [Tue, 6 Dec 2011 00:51:09 +0000 (00:51 +0000)]
Fix unclear wording.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145882
91177308-0d34-0410-b5e6-
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Jim Grosbach [Tue, 6 Dec 2011 00:47:03 +0000 (00:47 +0000)]
Move target-specific logic out of generic MCAssembler.
Whether a fixup needs relaxation for the associated instruction is a
target-specific function, as the FIXME indicated. Create a hook for that
and use it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145881
91177308-0d34-0410-b5e6-
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Nick Lewycky [Tue, 6 Dec 2011 00:29:13 +0000 (00:29 +0000)]
Expose a switch for the new gcov format.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145880
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Chad Rosier [Tue, 6 Dec 2011 00:19:08 +0000 (00:19 +0000)]
Probably not a good idea to convert a single vector load into a memcpy. We
don't do this now, but add a test case to prevent this from happening in the
future.
Additional test for rdar://
9892684
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145879
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Jim Grosbach [Tue, 6 Dec 2011 00:13:09 +0000 (00:13 +0000)]
Tidy up. Hard tabs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145878
91177308-0d34-0410-b5e6-
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Jim Grosbach [Tue, 6 Dec 2011 00:12:12 +0000 (00:12 +0000)]
Tidy up. Hard tabs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145877
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Nick Lewycky [Tue, 6 Dec 2011 00:11:58 +0000 (00:11 +0000)]
All these arguments are default anyways.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145876
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Jim Grosbach [Tue, 6 Dec 2011 00:11:13 +0000 (00:11 +0000)]
Tidy up. 80 columns.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145875
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Jim Grosbach [Tue, 6 Dec 2011 00:03:48 +0000 (00:03 +0000)]
Switch MCAssembler to method names starting w/ lower-case.
per http://llvm.org/docs/CodingStandards.html#ll_naming
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145873
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Jim Grosbach [Mon, 5 Dec 2011 23:45:46 +0000 (23:45 +0000)]
Simple branch relaxation for Thumb2 Bcc instructions.
Not right yet, as the rules for when to relax in the MCAssembler aren't
(yet) correct for ARM. This is a step in the proper direction, though.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145871
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Jim Grosbach [Mon, 5 Dec 2011 23:20:14 +0000 (23:20 +0000)]
Tidy up.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145870
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Nick Lewycky [Mon, 5 Dec 2011 23:07:05 +0000 (23:07 +0000)]
Silence tsan false-positives (tsan can't track things which are only safe due to
memory fences) in statistics registration, which works the same way that
ManagedStatic registration does.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145869
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Chad Rosier [Mon, 5 Dec 2011 22:53:09 +0000 (22:53 +0000)]
Update comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145866
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Chad Rosier [Mon, 5 Dec 2011 22:37:00 +0000 (22:37 +0000)]
Make the MemCpyOptimizer a bit more aggressive. I can't think of a scenerio
where this would be bad as the backend shouldn't have a problem inlining small
memcpys.
rdar://
10510150
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145865
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Jim Grosbach [Mon, 5 Dec 2011 22:27:04 +0000 (22:27 +0000)]
Tweak ADDrr fix. Bad check for explicit .w
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145863
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Jim Grosbach [Mon, 5 Dec 2011 22:21:28 +0000 (22:21 +0000)]
Update tests for r145860. Add a few new ones.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145861
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Jim Grosbach [Mon, 5 Dec 2011 22:16:39 +0000 (22:16 +0000)]
Thumb2 prefer ADD register encoding T2 to T3 when possible.
rdar://
10529664
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145860
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Bill Wendling [Mon, 5 Dec 2011 21:27:54 +0000 (21:27 +0000)]
Move 'returns_twice' definition into alphabetical place.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145854
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Akira Hatanaka [Mon, 5 Dec 2011 21:26:34 +0000 (21:26 +0000)]
Add definitions of 64-bit extract and insert instrucions and make
PerformANDCombine and PerformOrCombine aware of them. Test cases are included
too.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145853
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Akira Hatanaka [Mon, 5 Dec 2011 21:14:28 +0000 (21:14 +0000)]
Split ExtIns into two base classes and have instructions EXT and INS derive from
them.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145852
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Jim Grosbach [Mon, 5 Dec 2011 21:06:26 +0000 (21:06 +0000)]
Thumb2 prefer encoding T3 to T4 for ADD/SUB immediate instructions.
rdar://
10529348
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145851
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Akira Hatanaka [Mon, 5 Dec 2011 21:03:03 +0000 (21:03 +0000)]
Have LowerJumpTable support Mips64. Modify 2010-07-20-Switch.ll to test N64 and
O32 with relocation-model=pic too.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145850
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Jim Grosbach [Mon, 5 Dec 2011 20:29:59 +0000 (20:29 +0000)]
ARM assembly parsing for the rest of the VMUL data type aliases.
Finish up rdar://
10522016.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145846
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Jim Grosbach [Mon, 5 Dec 2011 20:12:26 +0000 (20:12 +0000)]
Fix previous commit. Oops.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145844
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Jim Grosbach [Mon, 5 Dec 2011 20:09:44 +0000 (20:09 +0000)]
Tidy up. No functional change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145843
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Jim Grosbach [Mon, 5 Dec 2011 19:55:46 +0000 (19:55 +0000)]
ARM assmebler parsing for two-operand VMUL instructions.
Combined destination and first source operand for f32 variant of the VMUL
(by scalar) instruction.
rdar://
10522016
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145842
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Anna Zaks [Mon, 5 Dec 2011 19:17:04 +0000 (19:17 +0000)]
Change the Dominators recalculate() function to only rely on GraphTraits
This is a patch by Guoping Long!
As part of utilizing LLVM Dominator computation in Clang, made two changes to LLVM dominators tree implementation:
- (1) Change the recalculate() template function to only rely on GraphTraits.
- (2) Add a size() method to GraphTraits template class to query the number of nodes in the graph.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145837
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Hal Finkel [Mon, 5 Dec 2011 17:55:22 +0000 (17:55 +0000)]
Add test case - this input used to crash because of duplicate generation of SPILL_CRs
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145820
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Hal Finkel [Mon, 5 Dec 2011 17:55:17 +0000 (17:55 +0000)]
enable PPC register scavenging by default (update tests and remove some FIXMEs)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145819
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Hal Finkel [Mon, 5 Dec 2011 17:55:12 +0000 (17:55 +0000)]
don't include CR bit subregs in callee-saved list
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145818
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Hal Finkel [Mon, 5 Dec 2011 17:55:06 +0000 (17:55 +0000)]
remove wasted space for extra bit copies of CR2 subregs
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145817
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Hal Finkel [Mon, 5 Dec 2011 17:54:17 +0000 (17:54 +0000)]
add register pressure for CR regs
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145816
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Benjamin Kramer [Mon, 5 Dec 2011 17:23:27 +0000 (17:23 +0000)]
Add a little heuristic to Value::isUsedInBasicBlock to speed it up for small basic blocks.
- Calling getUser in a loop is much more expensive than iterating over a few instructions.
- Use it instead of the open-coded loop in AddrModeMatcher.
- 5% speedup on ARMDisassembler.cpp Release builds.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145810
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NAKAMURA Takumi [Mon, 5 Dec 2011 07:54:57 +0000 (07:54 +0000)]
test/CodeGen/X86/pointer-vector.ll: Add explicit -mtriple=i686-linux.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145805
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Craig Topper [Mon, 5 Dec 2011 07:27:14 +0000 (07:27 +0000)]
Remove some leftover remnants that once tried to create 64-bit MMX PALIGNR instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145804
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Craig Topper [Mon, 5 Dec 2011 06:56:46 +0000 (06:56 +0000)]
Clean up and optimizations to the X86 shuffle lowering code. No functional change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145803
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