Tom Stellard [Thu, 10 Oct 2013 17:11:19 +0000 (17:11 +0000)]
R600/SI: Mark the EXEC register as reserved
This prevents the machine verifier from complaining about uses of
an undefined physical register.
Reviewed-by: Vincent Lejeune<vljn at ovi.com>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192364
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Tom Stellard [Thu, 10 Oct 2013 17:11:12 +0000 (17:11 +0000)]
R600: Use StructurizeCFGPass for non SI targets
StructurizeCFG pass allows to make complex cfg reducible ; it allows a lot of
shader from shadertoy (which exhibits complex control flow constructs) to works
correctly with respect to CFG handling (and allow us to detect potential bug in
other part of the backend).
We provide a cmd line argument to disable the pass for debug purpose.
Patch by: Vincent Lejeune
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192363
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Hao Liu [Thu, 10 Oct 2013 17:00:52 +0000 (17:00 +0000)]
Implement AArch64 vector load/store multiple N-element structure class SIMD(lselem).
Including following 14 instructions:
4 ld1 insts: load multiple 1-element structure to sequential 1/2/3/4 registers.
ld2/ld3/ld4: load multiple N-element structure to sequential N registers (N=2,3,4).
4 st1 insts: store multiple 1-element structure from sequential 1/2/3/4 registers.
st2/st3/st4: store multiple N-element structure from sequential N registers (N = 2,3,4).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192361
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Rafael Espindola [Thu, 10 Oct 2013 15:15:17 +0000 (15:15 +0000)]
Revert "Implement AArch64 vector load/store multiple N-element structure class SIMD(lselem). Including following 14 instructions: 4 ld1 insts: load multiple 1-element structure to sequential 1/2/3/4 registers. ld2/ld3/ld4: load multiple N-element structure to sequential N registers (N=2,3,4). 4 st1 insts: store multiple 1-element structure from sequential 1/2/3/4 registers. st2/st3/st4: store multiple N-element structure from sequential N registers (N = 2,3,4)."
This reverts commit r192352. It broke the build.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192354
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Hao Liu [Thu, 10 Oct 2013 15:01:24 +0000 (15:01 +0000)]
Implement AArch64 vector load/store multiple N-element structure class SIMD(lselem).
Including following 14 instructions:
4 ld1 insts: load multiple 1-element structure to sequential 1/2/3/4 registers.
ld2/ld3/ld4: load multiple N-element structure to sequential N registers (N=2,3,4).
4 st1 insts: store multiple 1-element structure from sequential 1/2/3/4 registers.
st2/st3/st4: store multiple N-element structure from sequential N registers (N = 2,3,4).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192352
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Benjamin Kramer [Thu, 10 Oct 2013 14:35:45 +0000 (14:35 +0000)]
ARM: Put isV8EligibleForIT into the llvm namespace. While there make it inline.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192350
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Benjamin Kramer [Thu, 10 Oct 2013 12:46:23 +0000 (12:46 +0000)]
Disable function padding to get this test to pass on atom.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192348
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Tim Northover [Thu, 10 Oct 2013 09:28:20 +0000 (09:28 +0000)]
ARM: correct liveness flags during ARMLoadStoreOpt
When we had a sequence like:
s1 = VLDRS [r0, 1], Q0<imp-def>
s3 = VLDRS [r0, 2], Q0<imp-use,kill>, Q0<imp-def>
s0 = VLDRS [r0, 0], Q0<imp-use,kill>, Q0<imp-def>
s2 = VLDRS [r0, 4], Q0<imp-use,kill>, Q0<imp-def>
we were gathering the {s0, s1} loads below the s3 load. This is fine,
but confused the verifier since now the s3 load had Q0<imp-use> with
no definition above it.
This should mark such uses <undef> as well. The liveness structure at
the beginning and end of the block is unaffected, and the true sN
definitions should prevent any dodgy reorderings being introduced
elsewhere.
rdar://problem/
15124449
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192344
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Craig Topper [Thu, 10 Oct 2013 05:33:31 +0000 (05:33 +0000)]
Allow non-AVX form of pmovmskb to take a GR64 operand.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192341
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Craig Topper [Thu, 10 Oct 2013 05:01:22 +0000 (05:01 +0000)]
Remove duplicate instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192340
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Craig Topper [Thu, 10 Oct 2013 04:26:52 +0000 (04:26 +0000)]
Fix so CRC32r64r8 isn't accidentally filtered from the disassembler tables.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192339
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Akira Hatanaka [Wed, 9 Oct 2013 23:36:17 +0000 (23:36 +0000)]
[mips] Do not generate INS/EXT nodes if target does not have support for
ins/ext.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192330
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Rui Ueyama [Wed, 9 Oct 2013 23:15:49 +0000 (23:15 +0000)]
Revert "llvm-c: Make target initializer functions external functions in lib."
This reverts commit r192316. The original change introduced circular
dependencies between libTarget and backends. That would broke a build unless
link everything into one big binary.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192329
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Manman Ren [Wed, 9 Oct 2013 19:46:28 +0000 (19:46 +0000)]
Debug Info: In DIBuilder, the context and type fields of template_type and
template_value are updated to use DIRef.
A paired commit at clang is required due to changes to DIBuilder.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192320
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Anders Waldenborg [Wed, 9 Oct 2013 19:02:09 +0000 (19:02 +0000)]
llvm-c: Make target initializer functions external functions in lib.
Making them proper functions defined in the (shared)lib instead of
static inlines defined in the header files makes it possible to
actually distribute a binary compiled against the shared library
without having to worry about getting undefined symbol errors when
calling e.g LLVMInitializeAllTargetInfos because the shared library on
the other system was compiled with different targets.
Differential Revision: http://llvm-reviews.chandlerc.com/D1714
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192316
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Manman Ren [Wed, 9 Oct 2013 18:10:55 +0000 (18:10 +0000)]
Debug Info: In DIBuilder, the context field of a forward decl is updated
to use DIScopeRef.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192309
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Bill Wendling [Wed, 9 Oct 2013 17:37:04 +0000 (17:37 +0000)]
Add missing releases.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192304
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Benjamin Kramer [Wed, 9 Oct 2013 17:23:41 +0000 (17:23 +0000)]
Flip the ownership of MCStreamer and MCTargetStreamer.
MCStreamer now owns the target streamer. This prevents leaking the target
streamer.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192303
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Shuxin Yang [Wed, 9 Oct 2013 17:21:44 +0000 (17:21 +0000)]
Fix a bug in Dead Argument Elimination.
If a function seen at compile time is not necessarily the one linked to
the binary being built, it is illegal to change the actual arguments
passing to it.
e.g.
--------------------------
void foo(int lol) {
// foo() has linkage satisifying isWeakForLinker()
// "lol" is not used at all.
}
void bar(int lo2) {
// xform to foo(undef) is illegal, as compiler dose not know which
// instance of foo() will be linked to the the binary being built.
foo(lol2);
}
-----------------------------
Such functions can be captured by isWeakForLinker(). NOTE that
mayBeOverridden() is insufficient for this purpose as it dosen't include
linkage types like AvailableExternallyLinkage and LinkOnceODRLinkage.
Take link_odr* as an example, it indicates a set of *EQUIVALENT* globals
that can be merged at link-time. However, the semantic of
*EQUIVALENT*-functions includes parameters. Changing parameters breaks
the assumption.
Thank John McCall for help, especially for the explanation of subtle
difference between linkage types.
rdar://
11546243
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192302
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Rafael Espindola [Wed, 9 Oct 2013 16:07:32 +0000 (16:07 +0000)]
Add a GlobalAlias::isValidLinkage to reduce code duplication.
Thanks to Reid Kleckner for the suggestion.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192298
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Venkatraman Govindaraju [Wed, 9 Oct 2013 12:50:39 +0000 (12:50 +0000)]
[Sparc] Disable tail call optimization for sparc64.
This patch fixes PR17506.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192294
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Greg Bedwell [Wed, 9 Oct 2013 08:55:27 +0000 (08:55 +0000)]
Test commit. Remove whitespace from otherwise empty lines.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192284
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Elena Demikhovsky [Wed, 9 Oct 2013 08:16:14 +0000 (08:16 +0000)]
AVX-512: Added VRCP28 and VRSQRT28 instructions and intrinsics.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192283
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Tim Northover [Wed, 9 Oct 2013 07:53:57 +0000 (07:53 +0000)]
AArch64: enable MISched by default.
Substantial SelectionDAG scheduling is going away soon, and is
interfering with Hao's attempts to implement LDn/STn instructions, so
I say we make the leap first.
There were a few reorderings (inevitably) which broke some tests. I
tried to replace them with CHECK-DAG variants mostly, but some too
complex for that to be useful and I just reordered them.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192282
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Tim Northover [Wed, 9 Oct 2013 07:53:49 +0000 (07:53 +0000)]
AArch64: migrate ADRP relaxation test to be llvm-mc only.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192281
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Craig Topper [Wed, 9 Oct 2013 06:12:53 +0000 (06:12 +0000)]
More x86 disassembler filtering cleanup.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192279
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Andrew Trick [Wed, 9 Oct 2013 05:11:10 +0000 (05:11 +0000)]
Add missing HasAVX512 predicate.
This was only working because AVX had cheaper rules in all cases.
I'm sure there are other places in this file where predicates are missing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192276
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Craig Topper [Wed, 9 Oct 2013 05:02:29 +0000 (05:02 +0000)]
Remove some old filters from the x86 disassembler table builder.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192275
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Craig Topper [Wed, 9 Oct 2013 04:54:21 +0000 (04:54 +0000)]
Replace a couple instructions with patterns referring to other instructions with same encoding and operands. Mark a couple other instructions as CodeGenOnly since we have FR and VR instructions and only one of them is needed by the assembler/disassembler.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192274
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Craig Topper [Wed, 9 Oct 2013 04:24:38 +0000 (04:24 +0000)]
Use AVX512PIi8 for the alt forms of vcmp instructions. This adds the TB prefix and keeps the mnemonic from starting with an extra 'v'
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192272
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Craig Topper [Wed, 9 Oct 2013 03:56:16 +0000 (03:56 +0000)]
Mark some instructions as CodeGenOnly since they aren't needed by the assembler or disassembler. Disassembler already filtered them, but asm parser still had them in its tables.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192271
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Craig Topper [Wed, 9 Oct 2013 02:18:34 +0000 (02:18 +0000)]
Add in64BitMode/in32BitMode to the MMX/SSE2/AVX maskmovq/dq instructions. This way the asm parser will pick the right one based on the mode. Instruction selection already did the right thing based on the pointer size.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192266
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Rafael Espindola [Wed, 9 Oct 2013 02:05:08 +0000 (02:05 +0000)]
Add a paragraph about MCTargetStreamer.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192265
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NAKAMURA Takumi [Wed, 9 Oct 2013 01:07:31 +0000 (01:07 +0000)]
llvm/test/LTO should run also on cygwin.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192262
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Manman Ren [Wed, 9 Oct 2013 00:17:04 +0000 (00:17 +0000)]
Debug Info: In DIBuilder, the context field of a DICompositeType is updated
to use DIScopeRef.
A paired commit at clang is required due to changes to DIBuilder.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192256
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Manman Ren [Tue, 8 Oct 2013 23:49:38 +0000 (23:49 +0000)]
Debug Info: In DIBuilder, the context fields of a static member and a
typedef are updated to use DIScopeRef.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192254
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Manman Ren [Tue, 8 Oct 2013 23:28:51 +0000 (23:28 +0000)]
Debug Info: In DIBuilder, the derived-from field of DICompositeType
is updated to use DITypeRef.
A paired commit at clang is required due to changes to DIBuilder.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192251
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Manman Ren [Tue, 8 Oct 2013 22:56:31 +0000 (22:56 +0000)]
Debug Info: In DIBuilder, the derived-from field of DIDerivedType
is updated to use DITypeRef.
A paired commit at clang is required due to changes to DIBuilder.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192246
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Chad Rosier [Tue, 8 Oct 2013 22:09:04 +0000 (22:09 +0000)]
[AArch64] Add support for NEON scalar floating-point reciprocal estimate,
reciprocal exponent, and reciprocal square root estimate instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192242
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Matt Arsenault [Tue, 8 Oct 2013 21:11:12 +0000 (21:11 +0000)]
Fix duplicated assertions.
Do what some other instructions do, and add an assert method.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192236
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Chad Rosier [Tue, 8 Oct 2013 20:43:30 +0000 (20:43 +0000)]
[AArch64] Add support for NEON scalar signed/unsigned integer to floating-point
convert instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192231
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Reid Kleckner [Tue, 8 Oct 2013 20:15:11 +0000 (20:15 +0000)]
Explicitly request unsigned enum types when desired
This fixes repeated -Wmicrosoft warnings when self-hosting clang on
Windows, and gets us real unsigned enum types with MSVC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192227
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Manman Ren [Tue, 8 Oct 2013 20:06:43 +0000 (20:06 +0000)]
Debug Info: update testing to reflect r192018.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192224
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Reed Kotler [Tue, 8 Oct 2013 19:55:01 +0000 (19:55 +0000)]
Add fabsf to the list of inlined functions; otherwise
Mips16 will try and create a stub for it and this will
result in a link error because that function does not exist in libc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192223
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Manman Ren [Tue, 8 Oct 2013 19:07:44 +0000 (19:07 +0000)]
Add DbgVariable::resolve per Eric's suggestion.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192218
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Manman Ren [Tue, 8 Oct 2013 18:46:58 +0000 (18:46 +0000)]
Debug Info: rename getOriginalTypeSize to getBaseTypeSize.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192216
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Manman Ren [Tue, 8 Oct 2013 18:42:58 +0000 (18:42 +0000)]
Debug Info: take advantage of the existing CU::resolve.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192215
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Manman Ren [Tue, 8 Oct 2013 18:42:03 +0000 (18:42 +0000)]
Move DIRef::getName out of line.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192214
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Akira Hatanaka [Tue, 8 Oct 2013 18:13:24 +0000 (18:13 +0000)]
[mips] Simplify and optimize code.
No intended functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192213
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Matt Arsenault [Tue, 8 Oct 2013 18:06:36 +0000 (18:06 +0000)]
Add some xfaild R600 tests.
These are bugs to fix later.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192212
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Benjamin Kramer [Tue, 8 Oct 2013 17:44:56 +0000 (17:44 +0000)]
IRBuilder: Downgrade InsertPointGuard's instruction pointer to a raw pointer.
Sadly this loses the checking from AssertingVH, but apparently storing the
end() of a BasicBlock into an AssertingVH has bad consequences as it's not
really an instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192209
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Reed Kotler [Tue, 8 Oct 2013 17:32:33 +0000 (17:32 +0000)]
Let rotr and bswap be handled by expansion for Mips16 since we don't
have native instructions for this.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192207
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Andrew Kaylor [Tue, 8 Oct 2013 17:15:11 +0000 (17:15 +0000)]
Removing unintended code block from lli
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192205
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Eric Christopher [Tue, 8 Oct 2013 16:47:11 +0000 (16:47 +0000)]
Grammar.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192199
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Rafael Espindola [Tue, 8 Oct 2013 16:12:58 +0000 (16:12 +0000)]
Fix build on Solaris 11.
Patch by Vladimir Voskresensky. The erros were:
Path.inc:274:3: error: ‘Dl_info’ was not declared in this scope
...
and
usr/include/spawn.h:52:14: error: expected ‘,’ or ‘...’ before ‘argv’
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192185
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Rafael Espindola [Tue, 8 Oct 2013 15:07:00 +0000 (15:07 +0000)]
Only modify lto.exports.def when contents have changed.
Patch by Greg Bedwell.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192182
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Rafael Espindola [Tue, 8 Oct 2013 13:08:17 +0000 (13:08 +0000)]
Add a MCTargetStreamer interface.
This patch fixes an old FIXME by creating a MCTargetStreamer interface
and moving the target specific functions for ARM, Mips and PPC to it.
The ARM streamer is still declared in a common place because it is
used from lib/CodeGen/ARMException.cpp, but the Mips and PPC are
completely hidden in the corresponding Target directories.
I will send an email to llvmdev with instructions on how to use this.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192181
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NAKAMURA Takumi [Tue, 8 Oct 2013 10:29:09 +0000 (10:29 +0000)]
SparcJITInfo.cpp: Prune "default:" label to fix a warning. [-Wcovered-switch-default]
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192179
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NAKAMURA Takumi [Tue, 8 Oct 2013 10:29:03 +0000 (10:29 +0000)]
Prune trailing linefeeds.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192178
91177308-0d34-0410-b5e6-
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Venkatraman Govindaraju [Tue, 8 Oct 2013 07:15:22 +0000 (07:15 +0000)]
[Sparc] Implement JIT for SPARC.
No new testcases. However, this patch makes all supported JIT testcases in
test/ExecutionEngine pass on Sparc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192176
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Craig Topper [Tue, 8 Oct 2013 06:30:39 +0000 (06:30 +0000)]
Remove unneeded MMX instruction definition by moving pattern to an equivalent instruction definition and removing the filtering from the disassembler table building.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192175
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Craig Topper [Tue, 8 Oct 2013 06:12:26 +0000 (06:12 +0000)]
Fix a typo in the mattr part of the run line.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192174
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Craig Topper [Tue, 8 Oct 2013 06:06:57 +0000 (06:06 +0000)]
Explicitly disable AVX on a bunch of tests so they won't fail on AVX machines post r192171.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192173
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Craig Topper [Tue, 8 Oct 2013 05:53:50 +0000 (05:53 +0000)]
Remove some instructions that existed to provide aliases to the assembler. Can be done with InstAlias instead. Unfortunately, this was causing printer to use 'vmovq' or 'vmovd' based on what was parsed. To cleanup the inconsistencies convert all 'vmovd' with 64-bit registers to 'vmovq', but provide an alias so that 'vmovd' will still parse.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192171
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Venkatraman Govindaraju [Tue, 8 Oct 2013 02:50:29 +0000 (02:50 +0000)]
[Sparc] Do not hardcode nop in the delay slot of TLS_CALL. Use DelaySlotFiller to fill the delay slot instead.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192160
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Adrian Prantl [Tue, 8 Oct 2013 02:30:54 +0000 (02:30 +0000)]
typo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192158
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Adrian Prantl [Tue, 8 Oct 2013 02:28:20 +0000 (02:28 +0000)]
typo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192157
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Adrian Prantl [Tue, 8 Oct 2013 02:21:44 +0000 (02:21 +0000)]
Reduce testcase from 1r92011.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192156
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Nick Kledzik [Tue, 8 Oct 2013 00:59:13 +0000 (00:59 +0000)]
update mach-o EXPORT_SYMBOL_* names
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192151
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Hans Wennborg [Mon, 7 Oct 2013 22:03:23 +0000 (22:03 +0000)]
cmake: don't set LLVM_COMPILER_IS_GCC_COMPATIBLE when using clang-cl
Tip-of-tree CMake has become clang-cl aware [1]. In this case,
CMAKE_CXX_COMPILER_ID will still be Clang, but MSVC will be true.
[1] See http://cmake.org/gitweb?p=cmake.git;a=commitdiff;h=
3d8356d4
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192139
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David Majnemer [Mon, 7 Oct 2013 21:57:07 +0000 (21:57 +0000)]
Windows: Avoiding resizing, use uninitialized data() instead
This is ever-so faster but more importantly matches what we have elsewhere.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192137
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Akira Hatanaka [Mon, 7 Oct 2013 21:32:57 +0000 (21:32 +0000)]
[mips] Test case for r192124.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192135
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Arnold Schwaighofer [Mon, 7 Oct 2013 21:05:43 +0000 (21:05 +0000)]
LoopVectorize: External uses must use the last value in a reduction cycle
Otherwise, we don't perform operations that would have been performed on
the scalar version.
Fixes PR17498.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192133
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Reed Kotler [Mon, 7 Oct 2013 20:46:19 +0000 (20:46 +0000)]
Add Mips16 patterns for sign extend byte and sign extend halfword.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192130
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Manman Ren [Mon, 7 Oct 2013 19:47:53 +0000 (19:47 +0000)]
Struct byval: use the correct alignment for loads generated to load
from struct byval to registers.
We used to pass 0 which means the alignment of PtrVT. Even when the alignment
of the struct is smaller than 4, the LOADs would have alignment of 4, and
further optimizations could combine the LOADs into a ldm, which would
cause crash.
The fix is to pass the alignment of the struct byval.
rdar://problem/
15144402
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192126
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Akira Hatanaka [Mon, 7 Oct 2013 19:33:02 +0000 (19:33 +0000)]
[mips] Coding style clean up.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192125
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Akira Hatanaka [Mon, 7 Oct 2013 19:13:53 +0000 (19:13 +0000)]
[mips] Disable tail merging when long branch pass is enabled.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192124
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Benjamin Kramer [Mon, 7 Oct 2013 19:11:35 +0000 (19:11 +0000)]
X86: Fix type check. Just because an integer type is illegal doesn't mean it's i64.
Fixes PR17495, where an i24 triggered this code. It's intended to
optimize i64 loads on 32 bit x86.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192123
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Akira Hatanaka [Mon, 7 Oct 2013 19:06:57 +0000 (19:06 +0000)]
[mips] Define method MipsSubtarget::enableLongBranchPass.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192122
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Alexey Samsonov [Mon, 7 Oct 2013 19:03:24 +0000 (19:03 +0000)]
Revert r191834 until we measure the effect of this benchmarks and maybe find a better way to fix it
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192121
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Akira Hatanaka [Mon, 7 Oct 2013 18:49:46 +0000 (18:49 +0000)]
[mips] Fix definition of mfhi and mflo instructions to read from the whole
accumulator instead of its sub-registers, $hi and $lo.
We need this change to prevent a mflo following a mtlo from reading an
unpredictable/undefined value, as shown in the following example:
mult $6, $7 // result of $6 * $7 is written to $lo and $hi.
mflo $2 // read lower 32-bit result from $lo.
mtlo $4 // write to $lo. the content of $hi becomes unpredictable.
mfhi $3 // read higher 32-bit from $hi, which has an unpredictable value.
I don't have a test case for this change that reliably reproduces the problem.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192119
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Richard Mitton [Mon, 7 Oct 2013 18:39:18 +0000 (18:39 +0000)]
Formally added an explicit enum for DWARF TLS support. No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192118
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Matt Arsenault [Mon, 7 Oct 2013 18:06:48 +0000 (18:06 +0000)]
Change objectsize intrinsic to accept different address spaces.
Bitcasting everything to i8* won't work. Autoupgrade the old
intrinsic declarations to use the new mangling.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192117
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Amara Emerson [Mon, 7 Oct 2013 16:55:23 +0000 (16:55 +0000)]
[ARM] Improve build attributes emission.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192111
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Chad Rosier [Mon, 7 Oct 2013 16:36:15 +0000 (16:36 +0000)]
[AArch64] Add support for NEON scalar arithmetic instructions:
SQDMULH, SQRDMULH, FMULX, FRECPS, and FRSQRTS.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192107
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Joey Gouly [Mon, 7 Oct 2013 16:13:03 +0000 (16:13 +0000)]
[ARMv8] Add some disassembly tests for Thumb sevl/sevl.w
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192106
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NAKAMURA Takumi [Mon, 7 Oct 2013 15:42:22 +0000 (15:42 +0000)]
Revert r191088, corresponding to r191823 to re-enable llvm-lto on cygming.
r191088 is "llvm/tools/Makefile: Suppress building llvm-lto on cygming, for now, probably due to LTO.dll."
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192104
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NAKAMURA Takumi [Mon, 7 Oct 2013 15:33:30 +0000 (15:33 +0000)]
Windows/Process.inc: Fix for +Asserts. &Buf[0] is not guaranteed if size is zero.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192103
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Rafael Espindola [Mon, 7 Oct 2013 13:57:59 +0000 (13:57 +0000)]
Fix typo.
Thanks to Sean Silva for noticing it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192102
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Rafael Espindola [Mon, 7 Oct 2013 13:54:50 +0000 (13:54 +0000)]
Remove dead code.
Support for exception handling in the legacy JIT was removed in r181354 and
this code was dead since then.
Thanks to Yaron Keren for noticing it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192101
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Rafael Espindola [Mon, 7 Oct 2013 13:39:22 +0000 (13:39 +0000)]
Remove getEHExceptionRegister and getEHHandlerRegister.
They haven't been used for a long time. Patch by MathOnNapkins.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192099
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Rafael Espindola [Mon, 7 Oct 2013 13:34:05 +0000 (13:34 +0000)]
Fix the documentation of getDefaultSubtargetFeatures.
Patch by David Nadlinger.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192098
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Tim Northover [Mon, 7 Oct 2013 11:10:47 +0000 (11:10 +0000)]
ARM: allow cortex-m0 to use hint instructions
The hint instructions ("nop", "yield", etc) are mostly Thumb2-only, but have
been ported across to the v6M architecture. Fortunately, v6M seems to sit
nicely between v6 (thumb-1 only) and v6T2, so we can add a feature for it
fairly easily.
rdar://problem/
15144406
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192097
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David Majnemer [Mon, 7 Oct 2013 09:52:36 +0000 (09:52 +0000)]
Windows: Be more explicit with Win32 APIs
This addresses several issues in a similar vein:
- Use the Unicode APIs when possible, running nm on clang shows that we
only use Unicode APIs except for FormatMessage, CreateSemaphore, and
GetModuleHandle. AFAICT, the latter two are coming from MinGW and
not LLVM itself.
- Make getMainExecutable more resilient. It previously considered
return values of zero from ::GetModuleFileNameA to be acceptable.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192096
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Simon Atanasyan [Mon, 7 Oct 2013 08:58:27 +0000 (08:58 +0000)]
[Mips] Teach llvm-readobj to print MIPS-specific ELF program headers.
The patch reviewed by Michael Spencer.
http://llvm-reviews.chandlerc.com/D1846
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192093
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Craig Topper [Mon, 7 Oct 2013 07:19:47 +0000 (07:19 +0000)]
Remove some instructions that seem to only exist to trick the filtering checks in the disassembler table creation. Just fix up the filter to let the real instruction through instead.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192090
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Craig Topper [Mon, 7 Oct 2013 06:10:45 +0000 (06:10 +0000)]
Remove FsMOVAPSrr and friends. They have no patterns and are no longer selected anywhere.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192089
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Craig Topper [Mon, 7 Oct 2013 05:42:48 +0000 (05:42 +0000)]
Teach X86 asm parser that VMOVAPSrr and other VEX-encoded register to register moves should be switched from using the MRMSrcReg form to the MRMDestReg form if the source register is a 64-bit extended register and the destination register is not.
This allows the instruction to be encoded using the 2-byte VEX form instead of the 3-byte VEX form. The GNU assembler has similar behavior and instruction selection already does this.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192088
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Craig Topper [Mon, 7 Oct 2013 04:28:06 +0000 (04:28 +0000)]
Add disassembler support for long encodings for INC/DEC in 32-bit mode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192086
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David Majnemer [Mon, 7 Oct 2013 01:00:07 +0000 (01:00 +0000)]
Revert "Revert "Windows: Add support for unicode command lines""
This reverts commit r192070 which reverted r192069, I forgot to
regenerate the configure scripts.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192079
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