Rafael Espindola [Tue, 22 Nov 2011 06:27:18 +0000 (06:27 +0000)]
If a register is both an early clobber and part of a tied use, handle the use
before the clobber so that we copy the value if needed.
Fixes pr11415.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145056
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Craig Topper [Tue, 22 Nov 2011 01:57:35 +0000 (01:57 +0000)]
Fix shuffle decoding logic to handle UNPCKLPS/UNPCKLPD on 256-bit vectors correctly. Add support for decoding UNPCKHPS/UNPCKHPD for AVX 128-bit and 256-bit forms.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145055
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Craig Topper [Tue, 22 Nov 2011 00:44:41 +0000 (00:44 +0000)]
Add methods for querying minimum SSE version along with AVX. Simplifies all the places that had to check a version of SSE and AVX.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145053
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Sebastian Pop [Mon, 21 Nov 2011 20:46:55 +0000 (20:46 +0000)]
fix typo in comment
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145048
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Nick Lewycky [Mon, 21 Nov 2011 19:42:56 +0000 (19:42 +0000)]
Fix crasher in GVN due to my recent capture tracking changes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145047
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Nick Lewycky [Mon, 21 Nov 2011 18:32:21 +0000 (18:32 +0000)]
Add virtual destructor. Whoops!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145044
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Craig Topper [Mon, 21 Nov 2011 08:26:50 +0000 (08:26 +0000)]
Lowering for v32i8 to VPUNPCKLBW/VPUNPCKHBW when AVX2 is enabled.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145028
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Craig Topper [Mon, 21 Nov 2011 06:58:09 +0000 (06:58 +0000)]
Test case for r145026
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145027
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Craig Topper [Mon, 21 Nov 2011 06:57:39 +0000 (06:57 +0000)]
Add support for lowering 256-bit shuffles to VPUNPCKL/H for i16, i32, i64 if AVX2 is enabled.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145026
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Joe Abbey [Mon, 21 Nov 2011 04:42:21 +0000 (04:42 +0000)]
Fixing a comment
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145025
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Craig Topper [Mon, 21 Nov 2011 01:12:36 +0000 (01:12 +0000)]
Make LowerSIGN_EXTEND_INREG split 256-bit vectors when AVX1 is enabled and use AVX2 shifts when AVX2 is enabled.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145022
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Nick Lewycky [Sun, 20 Nov 2011 19:37:06 +0000 (19:37 +0000)]
Less template, more virtual! Refactoring suggested by Chris in code review.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145014
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Nick Lewycky [Sun, 20 Nov 2011 19:09:04 +0000 (19:09 +0000)]
Refactor code to use new attribute getters on CallSite for NoCapture and ByVal.
Suggested in code review by Eli.
That code in InstCombine looks kinda suspicious.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145013
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NAKAMURA Takumi [Sun, 20 Nov 2011 12:49:45 +0000 (12:49 +0000)]
test/CodeGen/X86/block-placement.ll: Relax expressions for Win32.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145011
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Chandler Carruth [Sun, 20 Nov 2011 11:22:06 +0000 (11:22 +0000)]
The logic for breaking the CFG in the presence of hot successors didn't
properly account for the *global* probability of the edge being taken.
This manifested as a very large number of unconditional branches to
blocks being merged against the CFG even though they weren't
particularly hot within the CFG.
The fix is to check whether the edge being merged is both locally hot
relative to other successors for the source block, and globally hot
compared to other (unmerged) predecessors of the destination block.
This introduces a new crasher on GCC single-source, but it's currently
behind a flag, and Ben has offered to work on the reduction. =]
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145010
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Chandler Carruth [Sun, 20 Nov 2011 11:22:03 +0000 (11:22 +0000)]
Make an obviously const interface actually be marked as const.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145009
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Benjamin Kramer [Sun, 20 Nov 2011 11:10:03 +0000 (11:10 +0000)]
XFAIL this test until I figure out what indvars is doing here (or find someone who does)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145008
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Benjamin Kramer [Sun, 20 Nov 2011 10:24:36 +0000 (10:24 +0000)]
SCEV: Actually set overflow flags on add expressions.
setFlags doesn't modify its arguments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145007
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Chandler Carruth [Sun, 20 Nov 2011 09:30:40 +0000 (09:30 +0000)]
Add some comments to the latest test case I added here to document what
is actually being tested. Also add some FileCheck goodness to much more
carefully ensure that the result is the desired result. Before this test
would only have failed through an assert failure if the underlying fix
were reverted.
Also, add some weight metadata and a comment explaining exactly what is
going on to a trick section of the test case. Originally, we were
getting very unlucky and trying to form a block chain that isn't
actually profitable. I'm working on a fix to avoid forming these
unprofitable chains, and that would also have masked any failure from
this test case. The easy solution is to add some metadata that makes it
*really* profitable to form the bad chain here.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145006
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Craig Topper [Sun, 20 Nov 2011 00:12:05 +0000 (00:12 +0000)]
Add code for lowering v32i8 shifts by a splat to AVX2 immediate shift instructions. Remove 256-bit splat handling from LowerShift as it was already handled by PerformShiftCombine.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145005
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Craig Topper [Sat, 19 Nov 2011 22:34:59 +0000 (22:34 +0000)]
Use 256-bit vcmpeqd for creating an all ones vector when AVX2 is enabled.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145004
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Craig Topper [Sat, 19 Nov 2011 21:01:54 +0000 (21:01 +0000)]
Remove some of the special classes that worked around an old tablegen limitation of not being able to remove redundant bitconverts from patterns.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145003
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Craig Topper [Sat, 19 Nov 2011 17:46:46 +0000 (17:46 +0000)]
Custom lower AVX2 variable shift intrinsics to shl/srl/sra nodes and remove the intrinsic patterns.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144999
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Chandler Carruth [Sat, 19 Nov 2011 10:26:02 +0000 (10:26 +0000)]
Move the handling of unanalyzable branches out of the loop-driven chain
formation phase and into the initial walk of the basic blocks. We
essentially pre-merge all blocks where unanalyzable fallthrough exists,
as we won't be able to update the terminators effectively after any
reorderings. This is quite a bit more principled as there may be CFGs
where the second half of the unanalyzable pair has some analyzable
predecessor that gets placed first. Then it may get placed next,
implicitly breaking the unanalyzable branch even though we never even
looked at the part that isn't analyzable. I've included a test case that
triggers this (thanks Benjamin yet again!), and I'm hoping to synthesize
some more general ones as I dig into related issues.
Also, to make this new scheme work we have to be able to handle branches
into the middle of a chain, so add this check. We always fallback on the
incoming ordering.
Finally, this starts to really underscore a known limitation of the
current implementation -- we don't consider broken predecessors when
merging successors. This can caused major missed opportunities, and is
something I'm planning on looking at next (modulo more bug reports).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144994
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Craig Topper [Sat, 19 Nov 2011 09:03:33 +0000 (09:03 +0000)]
Test cases for SSSE3/AVX integer horizontal add/sub.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144990
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Craig Topper [Sat, 19 Nov 2011 09:02:40 +0000 (09:02 +0000)]
Synthesize SSSE3/AVX 128-bit horizontal integer add/sub instructions from add/sub of appropriate shuffle vectors.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144989
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Craig Topper [Sat, 19 Nov 2011 07:33:10 +0000 (07:33 +0000)]
Collapse X86 PSIGNB/PSIGNW/PSIGND node types.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144988
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Craig Topper [Sat, 19 Nov 2011 07:07:26 +0000 (07:07 +0000)]
Extend VPBLENDVB and VPSIGN lowering to work for AVX2.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144987
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Craig Topper [Sat, 19 Nov 2011 05:48:20 +0000 (05:48 +0000)]
Remove some unnecessary filtering checks from X86 disassembler table build.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144986
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Craig Topper [Sat, 19 Nov 2011 04:49:22 +0000 (04:49 +0000)]
Remove unused parameters from the AVX maskmov classes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144985
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Andrew Trick [Fri, 18 Nov 2011 03:42:41 +0000 (03:42 +0000)]
Fix a corner case in updating LoopInfo after fully unrolling an outer loop.
The loop tree's inclusive block lists are painful and expensive to
update. (I have no idea why they're inclusive). The design was
supposed to handle this case but the implementation missed it and my
unit tests weren't thorough enough.
Fixes PR11335: loop unroll update.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144970
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Nadav Rotem [Fri, 18 Nov 2011 02:49:55 +0000 (02:49 +0000)]
Add AVX2 vpbroadcast support
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144967
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Kostya Serebryany [Fri, 18 Nov 2011 01:41:06 +0000 (01:41 +0000)]
[asan] workaround for reg alloc bug 11395: don't instrument functions with large chunks of inline assembler
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144962
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Chad Rosier [Fri, 18 Nov 2011 01:17:34 +0000 (01:17 +0000)]
Guard call to getRegForValue with isTypeLegal check to avoid unnecessary work/dead code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144959
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Devang Patel [Thu, 17 Nov 2011 23:43:15 +0000 (23:43 +0000)]
DISubrange supports unsigned lower/upper array bounds, so let's not fake it in the end while emitting DWARF. If a FE needs to encode signed lower/upper array bounds then we need to extend DISubrange or ad DISignedSubrange.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144937
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Kostya Serebryany [Thu, 17 Nov 2011 23:37:53 +0000 (23:37 +0000)]
quick fix: remove GlobalVariable::GlobalVariable mistakenly commited at r144933. For some reason this compiles on linux
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144936
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Andrew Trick [Thu, 17 Nov 2011 23:36:35 +0000 (23:36 +0000)]
Fix an overly general check in SimplifyIndvar to handle useless phi cycles.
The right way to check for a binary operation is
cast<BinaryOperator>. The original check: cast<Instruction> &&
numOperands() == 2 would match phi "instructions", leading to an
infinite loop in extreme corner case: a useless phi with operands
[self, constant] that prior optimization passes failed to remove,
being used in the loop by another useless phi, in turn being used by an
lshr or udiv.
Fixes PR11350: runaway iteration assertion.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144935
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Kostya Serebryany [Thu, 17 Nov 2011 23:14:59 +0000 (23:14 +0000)]
fall back to explicit list of allowed linkages when instrumenting globals in asan; add a test check that asan does not touch linkonce_odr
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144933
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Ted Kremenek [Thu, 17 Nov 2011 23:02:14 +0000 (23:02 +0000)]
Fix bug in RefCountedBase/RefCountedBaseVPTR where the reference count was accidentally copied as part of the copy constructor. This could result in objects getting leaked because there reference count was too high.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144931
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Chad Rosier [Thu, 17 Nov 2011 21:46:13 +0000 (21:46 +0000)]
Add TODO comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144920
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Craig Topper [Thu, 17 Nov 2011 07:49:38 +0000 (07:49 +0000)]
Fix SSE/AVX integer comparison patterns to understand that all integer vector loads are promoted to i64 vector loads so patterns need a bitconvert. Also slightly simplify the AVX2 variable shift patterns by using the predefined bitconvert pattern fragments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144896
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Chad Rosier [Thu, 17 Nov 2011 07:24:49 +0000 (07:24 +0000)]
Dead code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144888
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Chad Rosier [Thu, 17 Nov 2011 07:15:58 +0000 (07:15 +0000)]
When fast iseling a GEP, accumulate the offset rather than emitting a series of
ADDs. MaxOffs is used as a threshold to limit the size of the offset. Tradeoffs
being: (1) If we can't materialize the large constant then we'll cause fast-isel
to bail. (2) Too large of an offset can't be directly encoded in the ADD
resulting in a MOV+ADD. Generally not a bad thing because otherwise we would
have had ADD+ADD, but on Thumb this turns into a MOVS+MOVT+ADD. Working on a fix
for that. (3) Conversely, too low of a threshold we'll miss opportunities to
coalesce ADDs.
rdar://
10412592
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144886
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Craig Topper [Thu, 17 Nov 2011 07:04:00 +0000 (07:04 +0000)]
Remove seemingly unnecessary duplicate VROUND definitions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144885
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Chris Lattner [Thu, 17 Nov 2011 01:42:23 +0000 (01:42 +0000)]
x86/windows issues fixed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144878
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Eli Friedman [Thu, 17 Nov 2011 01:27:36 +0000 (01:27 +0000)]
Add support for custom names for library functions in TargetLibraryInfo. Add a custom name for fwrite and fputs on x86-32 OSX. Make SimplifyLibCalls honor the custom
names for fwrite and fputs.
Fixes <rdar://problem/
9815881>.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144876
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Daniel Dunbar [Thu, 17 Nov 2011 01:19:53 +0000 (01:19 +0000)]
llvm-build: Attempt to work around a CMake Makefile generator bug that doesn't
properly quote strings when writing the CMakeFiles/Makefile.cmake output file
(which lists the dependencies). This shows up when using CMake + MSYS Makefile
generator.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144873
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Chad Rosier [Thu, 17 Nov 2011 01:16:53 +0000 (01:16 +0000)]
Don't unconditionally set the kill flag.
rdar://
10456186
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144872
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Eli Friedman [Thu, 17 Nov 2011 00:21:52 +0000 (00:21 +0000)]
Turn on vzeroupper insertion on call boundaries for AVX; it works as far as I know, and I'd like to see wider testing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144867
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Daniel Dunbar [Wed, 16 Nov 2011 23:56:03 +0000 (23:56 +0000)]
build/make/test: Get rid of unused BUGPOINT_TOPTS variable.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144864
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Eli Friedman [Wed, 16 Nov 2011 23:50:22 +0000 (23:50 +0000)]
Make sure to replace the chain properly when DAGCombining a LOAD+EXTRACT_VECTOR_ELT into a single LOAD. Fixes PR10747/PR11393.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144863
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Michael J. Spencer [Wed, 16 Nov 2011 23:36:12 +0000 (23:36 +0000)]
Object/COFF: Support common symbols.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144861
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Jim Grosbach [Wed, 16 Nov 2011 22:50:38 +0000 (22:50 +0000)]
Remove obsolete test.
The PLD encoding is checked via the .s file now.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144853
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Jim Grosbach [Wed, 16 Nov 2011 22:48:37 +0000 (22:48 +0000)]
Generalize the fixup info for ARM mode.
We don't (yet) have the granularity in the fixups to be specific about which
bitranges are affected. That's a future cleanup, but we're not there yet.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144852
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Jim Grosbach [Wed, 16 Nov 2011 22:46:27 +0000 (22:46 +0000)]
Update test for r144842.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144851
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Akira Hatanaka [Wed, 16 Nov 2011 22:44:38 +0000 (22:44 +0000)]
Lower 64-bit constant pool node.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144849
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Akira Hatanaka [Wed, 16 Nov 2011 22:42:10 +0000 (22:42 +0000)]
Lower 64-bit block address.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144847
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Jim Grosbach [Wed, 16 Nov 2011 22:40:25 +0000 (22:40 +0000)]
Fix encoding of NOP used for padding in ARM mode .align.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144842
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Akira Hatanaka [Wed, 16 Nov 2011 22:39:56 +0000 (22:39 +0000)]
Add patterns for 64-bit tglobaladdr, tblockaddress, tjumptable and tconstpool
nodes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144841
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Akira Hatanaka [Wed, 16 Nov 2011 22:36:01 +0000 (22:36 +0000)]
64-bit jump register instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144840
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Evan Cheng [Wed, 16 Nov 2011 22:24:44 +0000 (22:24 +0000)]
Another missing X86ISD::MOVLPD pattern. rdar://
10450317
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144839
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Jim Grosbach [Wed, 16 Nov 2011 21:50:05 +0000 (21:50 +0000)]
ARM assembly parsing for shifted register operands for MOV instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144837
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Jim Grosbach [Wed, 16 Nov 2011 21:46:50 +0000 (21:46 +0000)]
Clean up debug printing of ARM shifted operands.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144836
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Chad Rosier [Wed, 16 Nov 2011 21:05:28 +0000 (21:05 +0000)]
Add fast-isel stats to determine who's doing all the work, the
target-independent selector or the target-specific selector.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144833
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Chad Rosier [Wed, 16 Nov 2011 21:02:08 +0000 (21:02 +0000)]
Fix the stats collection for fast-isel. The failed count was only accounting
for a single miss and not all predecessor instructions that get selected by
the selection DAG instruction selector. This is still not exact (e.g., over
states misses when folded/dead instructions are present), but it is a step in
the right direction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144832
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Chandler Carruth [Wed, 16 Nov 2011 19:52:13 +0000 (19:52 +0000)]
There are already problems with building LLVM under VS2005, and it's
quite old now. Update the documentation to reflect this, and direct
people to use VS2008 or newer.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144818
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Jim Grosbach [Wed, 16 Nov 2011 19:12:24 +0000 (19:12 +0000)]
ARM assmebly two operand forms for LSR, ASR, LSL, ROR register.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144814
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Jim Grosbach [Wed, 16 Nov 2011 19:05:59 +0000 (19:05 +0000)]
ARM assembly parsing for RRX mnemonic.
rdar://
9704684
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144812
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Pete Cooper [Wed, 16 Nov 2011 19:03:23 +0000 (19:03 +0000)]
Added missing comment about new custom lowering of DEC64
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144811
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Evan Cheng [Wed, 16 Nov 2011 18:44:48 +0000 (18:44 +0000)]
Disable expensive two-address optimizations at -O0. rdar://
10453055
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144806
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Chad Rosier [Wed, 16 Nov 2011 18:39:44 +0000 (18:39 +0000)]
Check to make sure we can select the instruction before trying to put the
operands into a register. Otherwise, we may materialize dead code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144805
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Evan Cheng [Wed, 16 Nov 2011 18:32:14 +0000 (18:32 +0000)]
Disable the assertion again. Looks like fastisel is still generating bad kill markers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144804
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Jim Grosbach [Wed, 16 Nov 2011 18:31:45 +0000 (18:31 +0000)]
ARM mode aliases for bitwise instructions w/ register operands.
rdar://
9704684
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144803
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Bob Wilson [Wed, 16 Nov 2011 17:09:59 +0000 (17:09 +0000)]
Fix tablegen warning: hasSideEffects is inferred for eh_sjlj_dispatchsetup.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144798
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NAKAMURA Takumi [Wed, 16 Nov 2011 09:18:28 +0000 (09:18 +0000)]
lib/Target/ARM/CMakeLists.txt: Disable optimization in ARMISelLowering.cpp also on MSC15(aka VS9). Seems miscompiled.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144794
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Evan Cheng [Wed, 16 Nov 2011 08:38:26 +0000 (08:38 +0000)]
Sink codegen optimization level into MCCodeGenInfo along side relocation model
and code model. This eliminates the need to pass OptLevel flag all over the
place and makes it possible for any codegen pass to use this information.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144788
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Bob Wilson [Wed, 16 Nov 2011 07:57:21 +0000 (07:57 +0000)]
Record landing pads with a SmallSetVector to avoid multiple entries.
There may be many invokes that share one landing pad, and the previous code
would record the landing pad once for each invoke. Besides the wasted
effort, a pair of volatile loads gets inserted every time the landing pad is
processed. The rest of the code can get optimized away when a landing pad
is processed repeatedly, but the volatile loads remain, resulting in code like:
LBB35_18:
Ltmp483:
ldr r2, [r7, #-72]
ldr r2, [r7, #-68]
ldr r2, [r7, #-72]
ldr r2, [r7, #-68]
ldr r2, [r7, #-72]
ldr r2, [r7, #-68]
ldr r2, [r7, #-72]
ldr r2, [r7, #-68]
ldr r2, [r7, #-72]
ldr r2, [r7, #-68]
ldr r2, [r7, #-72]
ldr r2, [r7, #-68]
ldr r2, [r7, #-72]
ldr r2, [r7, #-68]
ldr r2, [r7, #-72]
ldr r2, [r7, #-68]
ldr r4, [r7, #-72]
ldr r2, [r7, #-68]
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144787
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Craig Topper [Wed, 16 Nov 2011 07:30:46 +0000 (07:30 +0000)]
Fix the execution domain on a bunch of SSE/AVX instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144784
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Bob Wilson [Wed, 16 Nov 2011 07:12:00 +0000 (07:12 +0000)]
Update the SP in the SjLj jmpbuf whenever it changes. <rdar://problem/
10444602>
This same basic code was in the older version of the SjLj exception handling,
but it was removed in the recent revisions to that code. It needs to be there.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144782
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Bob Wilson [Wed, 16 Nov 2011 07:11:57 +0000 (07:11 +0000)]
Fix ARM SjLj-EH dispatch setup code. <rdar://problem/
10444602>
The EmitBasePointerRecalculation function has 2 problems, one minor and one
fatal. The minor problem is that it inserts the code at the setjmp
instead of in the dispatch block. The fatal problem is that at the point
where this code runs, we don't know whether there will be a base pointer,
so the entire function is a no-op. The base pointer recalculation needs to
be handled as it was before, by inserting a pseudo instruction that gets
expanded late.
Most of the support for the old approach is still here, but it no longer
has any connection to the eh_sjlj_dispatchsetup intrinsic. Clean up the
parts related to the intrinsic and just generate the pseudo instruction
directly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144781
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Craig Topper [Wed, 16 Nov 2011 05:02:04 +0000 (05:02 +0000)]
Remove code to enable execution dependency fix pass on VR256. VR128 is sufficient after r144636.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144777
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Evan Cheng [Wed, 16 Nov 2011 04:55:01 +0000 (04:55 +0000)]
Revert r144568 now that r144730 has fixed the fast-isel kill marker bug.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144776
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Nick Lewycky [Wed, 16 Nov 2011 03:56:38 +0000 (03:56 +0000)]
Fix typo in test.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144774
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Nick Lewycky [Wed, 16 Nov 2011 03:49:48 +0000 (03:49 +0000)]
Merge isObjectPointerWithTrustworthySize with getPointerSize. Use it when
looking at the size of the pointee. Fixes PR11390!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144773
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Evan Cheng [Wed, 16 Nov 2011 03:47:42 +0000 (03:47 +0000)]
If the 2addr instruction has other kills, don't move it below any other uses since we don't want to extend other live ranges.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144772
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Evan Cheng [Wed, 16 Nov 2011 03:33:08 +0000 (03:33 +0000)]
RescheduleKillAboveMI() must backtrack to before the rescheduled DBG_VALUE instructions. rdar://
10451185
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144771
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Evan Cheng [Wed, 16 Nov 2011 03:05:12 +0000 (03:05 +0000)]
Process all uses first before defs to accurately capture register liveness. rdar://
10449480
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144770
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Eli Friedman [Wed, 16 Nov 2011 03:03:52 +0000 (03:03 +0000)]
Fix testcase.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144769
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Eli Friedman [Wed, 16 Nov 2011 02:52:39 +0000 (02:52 +0000)]
CONCAT_VECTORS can have more than two operands. PR11389.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144768
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Eli Friedman [Wed, 16 Nov 2011 02:43:15 +0000 (02:43 +0000)]
Add a couple asserts so it will be easier to debug if we accidentally pass indexed loads/stores to the legalizer.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144767
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Michael J. Spencer [Wed, 16 Nov 2011 01:36:50 +0000 (01:36 +0000)]
Remove extra ,.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144759
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Kostya Serebryany [Wed, 16 Nov 2011 01:35:23 +0000 (01:35 +0000)]
AddressSanitizer, first commit (compiler module only)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144758
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Michael J. Spencer [Wed, 16 Nov 2011 01:25:13 +0000 (01:25 +0000)]
Object/Archive: Give Child a operator < for map.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144757
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Michael J. Spencer [Wed, 16 Nov 2011 01:24:57 +0000 (01:24 +0000)]
Support/COFF: Add structs and enums from the standard for image files.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144756
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Michael J. Spencer [Wed, 16 Nov 2011 01:24:41 +0000 (01:24 +0000)]
llvm-objdump: Ignore non-objects in archives.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144755
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Kostya Serebryany [Wed, 16 Nov 2011 01:14:38 +0000 (01:14 +0000)]
test commit to verify that commit access works (added blank line)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144748
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Owen Anderson [Wed, 16 Nov 2011 01:02:57 +0000 (01:02 +0000)]
Rename MVT::untyped to MVT::Untyped to match similar nomenclature.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144747
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Andrew Trick [Wed, 16 Nov 2011 00:52:40 +0000 (00:52 +0000)]
Fix SCEV overly optimistic back edge taken count for multi-exit loops.
Fixes PR11375: Different results for 'clang++ huh.cpp'...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144746
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Chad Rosier [Wed, 16 Nov 2011 00:32:20 +0000 (00:32 +0000)]
Add FIXME comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144743
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Jakob Stoklund Olesen [Tue, 15 Nov 2011 23:53:18 +0000 (23:53 +0000)]
Enable -widen-vmovs by default.
This will widen 32-bit register vmov instructions to 64-bit when
possible. The 64-bit vmovd instructions can then be translated to NEON
vorr instructions by the execution dependency fix pass.
The copies are only widened if they are marked as clobbering the whole
D-register.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144734
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