Craig Topper [Fri, 7 Oct 2011 05:35:38 +0000 (05:35 +0000)]
Revert part of r141274. Only need to change encoding for xchg %eax, %eax in 64-bit mode. This is because in 64-bit mode xchg %eax, %eax implies zeroing the upper 32-bits of RAX which makes it not a NOP. In 32-bit mode using NOP encoding is fine.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141353
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Bill Wendling [Thu, 6 Oct 2011 23:41:14 +0000 (23:41 +0000)]
Use the correct vreg here.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141342
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Bill Wendling [Thu, 6 Oct 2011 23:37:36 +0000 (23:37 +0000)]
Generate the dispatch code for a 'thumb' function. This is very similar to the
others. They take the call site value. Determine if it's a proper value. And
then jumps to the correct call site via a jump table.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141341
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Owen Anderson [Thu, 6 Oct 2011 23:33:11 +0000 (23:33 +0000)]
Fix the check for nested IT instructions in the disassembler. We need to perform the check before adding the Thumb predicate, which pops on entry off the ITBlock queue.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141339
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Eli Friedman [Thu, 6 Oct 2011 23:20:49 +0000 (23:20 +0000)]
Remove the old atomic instrinsics. autoupgrade functionality is included with this patch.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141333
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Bill Wendling [Thu, 6 Oct 2011 22:53:00 +0000 (22:53 +0000)]
Generate the dispatch table for ARM mode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141327
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Bill Wendling [Thu, 6 Oct 2011 22:18:16 +0000 (22:18 +0000)]
Refactor some of the code that sets up the entry block for SjLj EH. No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141323
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Jim Grosbach [Thu, 6 Oct 2011 22:04:05 +0000 (22:04 +0000)]
Tidy up tests. Un-XFAIL file and mark individual tests as FIXME instead.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141321
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Bill Wendling [Thu, 6 Oct 2011 21:51:21 +0000 (21:51 +0000)]
Use a thumb ORR instead of thumb2 ORR when in thumb-only mode. (Picky! Picky!)
Place the immediate to OR into a register so that it works.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141319
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Jim Grosbach [Thu, 6 Oct 2011 21:32:50 +0000 (21:32 +0000)]
Fix and clean up tests. Un-XFAIL.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141318
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Bill Wendling [Thu, 6 Oct 2011 21:29:56 +0000 (21:29 +0000)]
* Set the low bit of the return address when we are in thumb mode.
* Some code cleanup.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141317
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Jim Grosbach [Thu, 6 Oct 2011 21:28:30 +0000 (21:28 +0000)]
Fix and clean up tests. Un-XFAIL.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141316
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David Greene [Thu, 6 Oct 2011 21:20:46 +0000 (21:20 +0000)]
Fix List-of-List Processing
Fix VarListElementInit::resolveListElementReference to return a
partially resolved VarListElementInint in the case where full
resolution is not possible. This allows TableGen to make forward
progress resolving certain complex list expressions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141315
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David Greene [Thu, 6 Oct 2011 21:20:44 +0000 (21:20 +0000)]
Make Test More Thorough
Check that all ADD patters are processed.
Add a SUB test.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141314
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Matt Beaumont-Gay [Thu, 6 Oct 2011 20:59:09 +0000 (20:59 +0000)]
Fix -asserts build
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141313
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Justin Holewinski [Thu, 6 Oct 2011 20:00:33 +0000 (20:00 +0000)]
PTX: Implement signed division
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141306
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Benjamin Kramer [Thu, 6 Oct 2011 18:53:43 +0000 (18:53 +0000)]
Use StringSwitch.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141305
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Benjamin Kramer [Thu, 6 Oct 2011 18:23:56 +0000 (18:23 +0000)]
Simplify code. No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141299
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David Greene [Thu, 6 Oct 2011 14:37:47 +0000 (14:37 +0000)]
Fix Typo
Compare the entire keyword string.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141295
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Peter Collingbourne [Thu, 6 Oct 2011 13:39:59 +0000 (13:39 +0000)]
s/tblgen/llvm-tblgen/g in a few missed places, including the tests
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141294
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Peter Collingbourne [Thu, 6 Oct 2011 13:21:42 +0000 (13:21 +0000)]
Remove the Clang tblgen backends from LLVM.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141293
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Torok Edwin [Thu, 6 Oct 2011 12:39:34 +0000 (12:39 +0000)]
Don't require C bindings opcode numbers to be kept in sync.
They are not in sync now, for example Bitcast would show up as LLVMCall.
So instead introduce 2 functions that map to and from the opcodes in the C
bindings.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141290
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Torok Edwin [Thu, 6 Oct 2011 12:13:32 +0000 (12:13 +0000)]
Add uwtable, returnstwice and nonlazybind to the C bindings also.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141289
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Torok Edwin [Thu, 6 Oct 2011 12:13:28 +0000 (12:13 +0000)]
ocaml/C bindings: type->isSized()
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141288
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Torok Edwin [Thu, 6 Oct 2011 12:13:20 +0000 (12:13 +0000)]
add binding to read icmp predicate
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141287
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Torok Edwin [Thu, 6 Oct 2011 12:13:11 +0000 (12:13 +0000)]
ocaml/C bindings: getmdstring, add num_op, get_op should work on metadata too
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141286
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Torok Edwin [Thu, 6 Oct 2011 12:12:50 +0000 (12:12 +0000)]
C/OCaml API to retrieve struct name.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141285
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Torok Edwin [Thu, 6 Oct 2011 12:12:27 +0000 (12:12 +0000)]
ocaml bindings: add llvm_ipo based on IPO.h
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141284
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Torok Edwin [Thu, 6 Oct 2011 12:12:12 +0000 (12:12 +0000)]
add more tests for the OCaml bindings
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141283
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Craig Topper [Thu, 6 Oct 2011 06:44:41 +0000 (06:44 +0000)]
Fix assembling of xchg %eax, %eax to not use the NOP encoding of 0x90. This was done by creating a new register group that excludes AX registers. Fixes PR10345. Also added aliases for flipping the order of the operands of xchg <reg>, %eax.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141274
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Evan Cheng [Thu, 6 Oct 2011 02:47:18 +0000 (02:47 +0000)]
Cosmetic change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141269
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Peter Collingbourne [Thu, 6 Oct 2011 01:51:51 +0000 (01:51 +0000)]
Build system infrastructure for multiple tblgens.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141266
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Bill Wendling [Thu, 6 Oct 2011 00:53:33 +0000 (00:53 +0000)]
Add the MBBs before inserting the instructions. Doing it afterwards could lead
to an infinite loop because of the def-use chains.
Also use a frame load instead of store for the LD instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141263
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Jakob Stoklund Olesen [Thu, 6 Oct 2011 00:08:27 +0000 (00:08 +0000)]
Remove the TRI::getSubRegisterRegClass() hook.
This restores my karma after I added TRI::getSubClassWithSubReg().
Register constraints are applied 'backwards'. Starting from the
register class required by an instruction operand, the correct question
is: 'How can I constrain the super-register register class so all its
sub-registers satisfy the instruction constraint?' The
getMatchingSuperRegClass() hook answers that.
We never need to go 'forwards': Starting from a super-register register
class, what register class are the sub-registers in? The
getSubRegisterRegClass() hook did that.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141258
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Cameron Zwarich [Wed, 5 Oct 2011 23:39:02 +0000 (23:39 +0000)]
Always merge profitable shifts on A9, not just when they have a single use.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141248
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Cameron Zwarich [Wed, 5 Oct 2011 23:38:50 +0000 (23:38 +0000)]
Remove a check from ARM shifted operand isel helper methods, which were blocking
merging an lsl #2 that has multiple uses on A9. This shift is free, so there is
no problem merging it in multiple places. Other unprofitable shifts will not be
merged.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141247
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Bill Wendling [Wed, 5 Oct 2011 23:28:57 +0000 (23:28 +0000)]
Get the proper call site numbers for the landing pads. Also remove a magic
number (18) for the proper addressing mode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141245
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Bill Wendling [Wed, 5 Oct 2011 23:26:10 +0000 (23:26 +0000)]
Add accessor method to check if the landing pad symbol has call site information.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141244
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David Greene [Wed, 5 Oct 2011 23:16:44 +0000 (23:16 +0000)]
Fix a typo.
Fix the argument passed in the multidef example.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141243
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David Greene [Wed, 5 Oct 2011 22:42:54 +0000 (22:42 +0000)]
Prefix Template Arg Names with Multiclass Name
For consistency, prefix multiclass template arg names with the
multiclass name followed by "::" to avoid name clashes among
multiclass arguments and other entities in the multiclass.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141239
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David Greene [Wed, 5 Oct 2011 22:42:52 +0000 (22:42 +0000)]
Vim Support for Multidefs
Add vim highlighting support for multidefs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141238
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David Greene [Wed, 5 Oct 2011 22:42:51 +0000 (22:42 +0000)]
Emacs Support for Multidefs
Add Emacs font-lock keyword support for multidefs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141237
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David Greene [Wed, 5 Oct 2011 22:42:49 +0000 (22:42 +0000)]
Document Multidefs
Provide documentation for multidefs, explaining in detail how they
work.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141236
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David Greene [Wed, 5 Oct 2011 22:42:48 +0000 (22:42 +0000)]
Update Test for Multidefs
Update the MultiPat.td test to create some defs via multidefs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141235
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David Greene [Wed, 5 Oct 2011 22:42:47 +0000 (22:42 +0000)]
Add a Multidef Test
Add a simple test for multidefs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141234
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David Greene [Wed, 5 Oct 2011 22:42:45 +0000 (22:42 +0000)]
Process Multidefs
Process each multidef declared in a multiclass. Iterate through the
list and instantiate a def in the multiclass for each item, resolving
the list item to the temporary iterator (possibly) used in the
multidef ObjectBody. We then process each generated def in the normal
way.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141233
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David Greene [Wed, 5 Oct 2011 22:42:44 +0000 (22:42 +0000)]
Parser Multidef Support
Add parser support to recognize multidefs. No processing on the
multidef is done at this point. The grammar is:
MultiDef = MULTIDEF ObjectName < Value, Declaration, Value > ObjectBody
The first Value must be resolveable to a list and the second Value
must be resolveable to an integer. The Declaration is a temporary
value used as an iterator to refer to list items during processing.
It may be passed into the ObjectBody where it will be substituted with
the list value used to instantiate each def.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141232
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David Greene [Wed, 5 Oct 2011 22:42:35 +0000 (22:42 +0000)]
Lexer Support for Multidefs
Add keyword support for multidefs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141231
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David Greene [Wed, 5 Oct 2011 22:42:17 +0000 (22:42 +0000)]
Add Multidef Data Structures
Add a set of data structures and members analogous to those used for
multiclass defs. These will represent a new kind of multiclass def: a
multidef. The idea behind the multidef is to process a list of items
and create a def record for each one inside the enclosing multiclass.
This allows the user to dynamically create a set of defs based on the
contents of a list.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141230
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David Greene [Wed, 5 Oct 2011 22:42:07 +0000 (22:42 +0000)]
Refactor Multiclass Def Processing
Move the code to instantiate a multiclass def, bind its arguments and
resolve its members into three helper functions. These will be reused
to support a new kind of multiclass def: a multidef.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141229
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Eli Friedman [Wed, 5 Oct 2011 22:27:16 +0000 (22:27 +0000)]
PR11061: Make simplifylibcalls fold strcmp("", x) correctly.
While I'm here, fix the related issue with strncmp, add some actual tests for strcmp and strncmp, and start using StringRef::compare for constant folding instead of using strcmp/strncmp so that the optimized IR isn't dependent on the host's implementation of strcmp.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141227
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Bill Wendling [Wed, 5 Oct 2011 22:24:35 +0000 (22:24 +0000)]
Modify the mapping from landing pad to call sites to accept more than one call
site.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141226
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Bill Wendling [Wed, 5 Oct 2011 22:20:38 +0000 (22:20 +0000)]
Add an ivar that maps a landing pad's EH symbol to the call sites that may jump
to the landing pad. This will be used by the back-end to generate the jump
tables for dispatching the arriving longjmp in sjlj eh.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141224
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Bill Wendling [Wed, 5 Oct 2011 22:16:11 +0000 (22:16 +0000)]
Small refactoring. Cache the FunctionInfo->MBB into a local variable.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141221
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Jakob Stoklund Olesen [Wed, 5 Oct 2011 22:12:57 +0000 (22:12 +0000)]
Fix sub-register operand verification.
PhysReg operands are not allowed to have sub-register indices at all.
For virtual registers with sub-reg indices, check that all registers in
the register class support the sub-reg index.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141220
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Andrew Trick [Wed, 5 Oct 2011 22:06:53 +0000 (22:06 +0000)]
Fixes PR11070 - assert in SCEV getConstantEvolvingPHIOperands.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141219
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Bill Wendling [Wed, 5 Oct 2011 22:04:08 +0000 (22:04 +0000)]
Fix comment to reflect the new EH stuff.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141218
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Jakob Stoklund Olesen [Wed, 5 Oct 2011 21:22:53 +0000 (21:22 +0000)]
Remove unused DstSubIdx argument.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141214
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Jim Grosbach [Wed, 5 Oct 2011 20:53:43 +0000 (20:53 +0000)]
Re-commit 141203, but much more conservative.
Just pull the instruction name, but don't change the order of anything
else. That keeps --debug happy and non-crashing, but doesn't change
how the worklist gets built.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141210
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Jim Grosbach [Wed, 5 Oct 2011 20:44:29 +0000 (20:44 +0000)]
Revert 141203. InstCombine is looping on unit tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141209
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Jakob Stoklund Olesen [Wed, 5 Oct 2011 20:26:40 +0000 (20:26 +0000)]
Simplify EXTRACT_SUBREG emission.
EXTRACT_SUBREG is emitted as %dst = COPY %src:sub, so there is no need to
constrain the %dst register class. RegisterCoalescer will apply the
necessary constraints if it decides to eliminate the COPY.
The %src register class does need to be constrained to something with
the right sub-registers, though. This is currently done manually with
COPY_TO_REGCLASS nodes. They can possibly be removed after this patch.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141207
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Jakob Stoklund Olesen [Wed, 5 Oct 2011 20:26:33 +0000 (20:26 +0000)]
Override TRI::getSubClassWithSubReg for X86.
There are fewer registers with sub_8bit sub-registers in 32-bit mode
than in 64-bit mode. In 32-bit mode, sub_8bit behaves the same as
sub_8bit_hi.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141206
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Rafael Espindola [Wed, 5 Oct 2011 20:05:13 +0000 (20:05 +0000)]
Check for the returns_twice attribute in callsFunctionThatReturnsTwice. This
fixes PR11038, but there are still some cleanups to be done.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141204
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Jim Grosbach [Wed, 5 Oct 2011 20:05:00 +0000 (20:05 +0000)]
Update InstCombine worklist after instruction transform is complete.
When updating the worklist for InstCombine, the Add/AddUsersToWorklist
functions may access the instruction(s) being added, for debug output for
example. If the instructions aren't yet added to the basic block, this
can result in a crash. Finish the instruction transformation before
adjusting the worklist instead.
rdar://
10238555
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141203
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Justin Holewinski [Wed, 5 Oct 2011 18:32:25 +0000 (18:32 +0000)]
PTX: Fixup a case where getRegClassFor() should be used instead of custom code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141199
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Jakob Stoklund Olesen [Wed, 5 Oct 2011 18:31:00 +0000 (18:31 +0000)]
Simplify INSERT_SUBREG emission.
The register class created by INSERT_SUBREG and SUBREG_TO_REG must be
legal and support the SubIdx sub-registers.
The new getSubClassWithSubReg() hook can compute that.
This may create INSERT_SUBREG instructions defining a larger register
class than the sub-register being inserted. That is OK,
RegisterCoalescer will constrain the register class as needed when it
eliminates the INSERT_SUBREG instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141198
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Akira Hatanaka [Wed, 5 Oct 2011 18:17:49 +0000 (18:17 +0000)]
Fix assertion string.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141197
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Akira Hatanaka [Wed, 5 Oct 2011 18:16:09 +0000 (18:16 +0000)]
Make sure candidate for delay slot filler is not a return instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141196
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Dan Gohman [Wed, 5 Oct 2011 18:13:08 +0000 (18:13 +0000)]
Make this test less sensitive to codegen optimizations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141195
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Akira Hatanaka [Wed, 5 Oct 2011 18:11:44 +0000 (18:11 +0000)]
Add RA to the set of registers that are defined if instruction is a call.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141194
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Owen Anderson [Wed, 5 Oct 2011 17:16:40 +0000 (17:16 +0000)]
Support a valid, but not very useful, encoding of CPSIE where none of the AIF bits are set.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141190
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Andrew Trick [Wed, 5 Oct 2011 16:52:28 +0000 (16:52 +0000)]
Typo. Thanks Bob.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141188
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Jakob Stoklund Olesen [Wed, 5 Oct 2011 16:51:21 +0000 (16:51 +0000)]
Add a FIXME.
TwoAddressInstructionPass should annotate instructions with <undef>
flags when it lower REG_SEQUENCE instructions. LiveIntervals should not
be in the business of modifying code (except for kill flags, perhaps).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141187
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Duncan Sands [Wed, 5 Oct 2011 15:13:13 +0000 (15:13 +0000)]
Ensure OpCode is not used uninitialized.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141184
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Duncan Sands [Wed, 5 Oct 2011 15:12:44 +0000 (15:12 +0000)]
Comment out a variable that is only used in commented out code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141183
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Duncan Sands [Wed, 5 Oct 2011 15:11:08 +0000 (15:11 +0000)]
Remove a bunch of unused variables in the PTX backend (warned about by gcc-4.6).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141182
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Duncan Sands [Wed, 5 Oct 2011 14:36:12 +0000 (14:36 +0000)]
Fix compilation when using gcc-4.6. Patch by wanders.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141178
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Duncan Sands [Wed, 5 Oct 2011 14:28:49 +0000 (14:28 +0000)]
GVN does simple propagation of conditions: when it sees a conditional
branch "br i1 %x, label %if_true, label %if_false" then it replaces
"%x" with "true" in places only reachable via the %if_true arm, and
with "false" in places only reachable via the %if_false arm. Except
that actually it doesn't: if value numbering shows that %y is equal
to %x then, yes, %y will be turned into true/false in this way, but
any occurrences of %x itself are not transformed. Fix this. What's
more, it's often the case that %x is an equality comparison such as
"%x = icmp eq %A, 0", in which case every occurrence of %A that is
only reachable via the %if_true arm can be replaced with 0. Implement
this and a few other variations on this theme. This reduces the number
of lines of LLVM IR in "GCC as one big file" by 0.2%. It has a bigger
impact on Ada code, typically reducing the number of lines of bitcode
by around 0.4% by removing repeated compiler generated checks. Passes
the LLVM nightly testsuite and the Ada ACATS testsuite.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141177
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Duncan Sands [Wed, 5 Oct 2011 14:17:01 +0000 (14:17 +0000)]
Generalize GVN's conditional propagation logic slightly:
it's OK for the false/true destination to have multiple
predecessors as long as the extra ones are dominated by
the branch destination.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141176
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NAKAMURA Takumi [Wed, 5 Oct 2011 10:11:02 +0000 (10:11 +0000)]
MipsDelaySlotFiller.cpp: Appease msvc to specify llvm::next() explicitly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141174
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Cameron Zwarich [Wed, 5 Oct 2011 08:59:10 +0000 (08:59 +0000)]
Add braces around something that throws me for a loop.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141173
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Cameron Zwarich [Wed, 5 Oct 2011 08:59:05 +0000 (08:59 +0000)]
There is no point in setting out-parameters for a ComplexPattern function when
it returns false, at least as far as I could tell by reading the code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141172
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Bill Wendling [Wed, 5 Oct 2011 07:04:14 +0000 (07:04 +0000)]
Also update the EH with bitcode. I missed this earlier. Thanks to Duncan for pointing it out.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141169
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Chandler Carruth [Wed, 5 Oct 2011 07:02:23 +0000 (07:02 +0000)]
Fix a broken assert found by -Wparentheses.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141168
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Andrew Trick [Wed, 5 Oct 2011 06:23:32 +0000 (06:23 +0000)]
Missing test case for r141164.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141166
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Andrew Trick [Wed, 5 Oct 2011 05:58:49 +0000 (05:58 +0000)]
Fix disabled SCEV analysis caused r141161 and add unit test.
I noticed during self-review that my previous checkin disabled some
analysis. Even with the reenabled analysis the test case runs in about
5ms. Without the fix, it will take several minutes at least.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141164
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Eric Christopher [Wed, 5 Oct 2011 05:00:26 +0000 (05:00 +0000)]
Add more initializers to quiet a clang warning.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141163
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Craig Topper [Wed, 5 Oct 2011 03:29:32 +0000 (03:29 +0000)]
Change C++ style comments to C style comments in X86 disassembler. Patch from Joe Abbey.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141162
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Andrew Trick [Wed, 5 Oct 2011 03:25:31 +0000 (03:25 +0000)]
Avoid exponential recursion in SCEV getConstantEvolvingPHI and EvaluateExpression.
Note to compiler writers: never recurse on multiple instruction
operands without memoization.
Fixes rdar://
10187945. Was taking 45s, now taking 5ms.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141161
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Akira Hatanaka [Wed, 5 Oct 2011 02:22:49 +0000 (02:22 +0000)]
Insert space.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141158
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Akira Hatanaka [Wed, 5 Oct 2011 02:21:58 +0000 (02:21 +0000)]
Do not examine variadic or implicit operands if instruction is a return (jr).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141157
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Akira Hatanaka [Wed, 5 Oct 2011 02:18:58 +0000 (02:18 +0000)]
Clean up function Filler::delayHasHazard.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141156
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Akira Hatanaka [Wed, 5 Oct 2011 02:04:17 +0000 (02:04 +0000)]
Remove function Filler::insertCallUses.
Record the registers used and defined by a call in Filler::insertDefsUses.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141154
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Akira Hatanaka [Wed, 5 Oct 2011 01:57:46 +0000 (01:57 +0000)]
Clean up Filler::findDelayInstr.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141152
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Akira Hatanaka [Wed, 5 Oct 2011 01:30:09 +0000 (01:30 +0000)]
Remove function Filler::isDelayFiller. Check if I is the same instruction that
filled the last delay slot visited.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141151
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Akira Hatanaka [Wed, 5 Oct 2011 01:23:39 +0000 (01:23 +0000)]
Clean up Filler::runOnMachineBasicBlock. Change interface of
Filler::findDelayInstr.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141150
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Akira Hatanaka [Wed, 5 Oct 2011 01:19:13 +0000 (01:19 +0000)]
Define a statistic for the number of slots that were filled with useful
instructions (instructions that are not NOP).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141149
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Akira Hatanaka [Wed, 5 Oct 2011 01:15:31 +0000 (01:15 +0000)]
Remove unnecessary check. isDelayFiller(MBB, I) will evaluate to true before
I->getDesc().hasDelaySlot() does.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141148
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Akira Hatanaka [Wed, 5 Oct 2011 01:09:37 +0000 (01:09 +0000)]
Add comments and move assignment statement. If sawStore is true, sawLoad does
not have to be set.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141147
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Akira Hatanaka [Wed, 5 Oct 2011 01:06:57 +0000 (01:06 +0000)]
Correct description string of enable-mips-delay-filler.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141146
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