chenzhen [Fri, 12 May 2017 02:00:04 +0000 (10:00 +0800)]
ARM: dts: rk3229-evb: enable GPU device
Change-Id: Ifab6284e56d1e833990b53d1aa555f55b520c955
Signed-off-by: chenzhen <chenzhen@rock-chips.com>
chenzhen [Tue, 9 May 2017 07:40:49 +0000 (15:40 +0800)]
arm: dts: rk3229-echo-v10: enable GPU device
Change-Id: I4336bd134afea2b8ad55ebb104c877548c16b582
Signed-off-by: chenzhen <chenzhen@rock-chips.com>
chenzhen [Tue, 9 May 2017 07:39:39 +0000 (15:39 +0800)]
arm: dts: rk322x: add mali-400 GPU device
Change-Id: I4fb5d27a34e57bb17db2c79ffdc655223ce8c338
Signed-off-by: chenzhen <chenzhen@rock-chips.com>
chenzhen [Tue, 9 May 2017 03:42:36 +0000 (11:42 +0800)]
ARM: rockchip_defconfig: enable driver for Mali400 GPU
Change-Id: Idcccf39fc0a5d2d340325e1b3445c8c0d3dcbcc3
Signed-off-by: chenzhen <chenzhen@rock-chips.com>
Finley Xiao [Thu, 11 May 2017 08:26:06 +0000 (16:26 +0800)]
ARM: dts: rk322x: add 'nvmem-cells' property for opp_table0
This patch adds nvmem-cells property to opp_table0 node so that
cpufreq driver can get cpu leakage value.
Change-Id: Ic39525de46762dfe867ecb86123be6fa7ccad95c
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Finley Xiao [Thu, 11 May 2017 08:05:10 +0000 (16:05 +0800)]
ARM: dts: rockchip: add efuse device node for rk322x
Add a efuse node in the device tree for the rk322x SoC.
Change-Id: I9a771c2065bb222b754f5a37b193edd4abb3f3a7
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
zhangjun [Thu, 11 May 2017 06:27:48 +0000 (14:27 +0800)]
arm64: rockchip_defconfig: enable HDMI_ANALOG
Change-Id: Icae9ce3e01f063c8b6e169b9d386b6eeeed54961
Signed-off-by: zhangjun <zhangjun@rock-chips.com>
zhangjun [Thu, 11 May 2017 03:31:14 +0000 (11:31 +0800)]
ASoC: rockchip: add machine driver for built-in hdmi and codec IC
this patch is used for rockchip built-in HDMI and audio codec
IC which are wired to the same i2s line(such as rk3368).
so we use a DAI link CPU to multicodecs.
Change-Id: Ibc5fdeb2091836dc28675aacdc099d76e0b7d752
Signed-off-by: zhangjun <zhangjun@rock-chips.com>
shengfei Xu [Fri, 21 Apr 2017 03:31:34 +0000 (11:31 +0800)]
dt-bindings: suspend: rockchip: add PMU_USB_LINESTAE_WAKEUP_EN config for wakeup
Change-Id: I73b992b57344f24eb37b360bc479264996ff72d1
Signed-off-by: shengfei Xu <xsf@rock-chips.com>
Finley Xiao [Thu, 11 May 2017 10:06:12 +0000 (18:06 +0800)]
PM / devfreq: rockchip_dmc: Fix error handling
It never has the mutex_lock counterpart before goto.
Change-Id: I937e79bc65433cb1c173fe0cb221e7d69586046c
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
shengfei Xu [Fri, 5 May 2017 07:43:53 +0000 (15:43 +0800)]
arm: dts: rk3288-evb: enable rockchip-suspend node
Change-Id: I1bc5f75d3bf49b7f5a532d7dbe7206edc6932c36
Signed-off-by: shengfei Xu <xsf@rock-chips.com>
shengfei Xu [Fri, 5 May 2017 07:38:27 +0000 (15:38 +0800)]
arm: dts: rk3288: add rockchip-suspend node
Change-Id: Id5700548a6034248ed5ad3226dd652d0833eec13
Signed-off-by: shengfei Xu <xsf@rock-chips.com>
shengfei Xu [Fri, 5 May 2017 07:34:14 +0000 (15:34 +0800)]
soc: rockchip: support rk3288 pm config
Change-Id: Icbd23af68bdf7a4fcad59a5d227988a13b2873af
Signed-off-by: shengfei Xu <xsf@rock-chips.com>
Finley Xiao [Thu, 11 May 2017 08:01:10 +0000 (16:01 +0800)]
nvmem: rockchip-efuse: add support for rk322x-efuse
This adds the necessary data for handling efuse on the rk322x.
Change-Id: Iadd37923f5949a03630a936d5a41b955d443b2d8
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Finley Xiao [Thu, 11 May 2017 08:08:30 +0000 (16:08 +0800)]
ARM: dts: rk3229: add cpu-supply property for cpu node in evb board
This patch adds the cpu-supply property so that cpu can do dvfs
Change-Id: I6cfc1c8e467652ad9b748c6a9980b00006181910
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Finley Xiao [Thu, 11 May 2017 03:37:31 +0000 (11:37 +0800)]
ARM: dts: rk3229: add cpu-supply property for cpu node in echo-v1 board
This patch adds the cpu-supply property so that cpu can do dvfs
Change-Id: I5edff7fabd1de23407e8fcb7d70e3b0eeee2ee0e
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Finley Xiao [Thu, 11 May 2017 06:49:37 +0000 (14:49 +0800)]
ARM: dts: rk3229: add a new cpu opp table
This patch adds some new frequencies for rk3229 boards
Change-Id: Ie35efc3f04350bcfd1eae31a72adfc9166bef781
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Finley Xiao [Thu, 11 May 2017 03:27:09 +0000 (11:27 +0800)]
ARM: dts: rk322x: add operating-points-v2 property for cpu
This patch adds a new opp table for cpu
Change-Id: I59384ab8ab649ca4672adf64c52f16da76777ce4
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Finley Xiao [Thu, 11 May 2017 03:14:13 +0000 (11:14 +0800)]
clk: rockchip: rk3228: add
1464000000 into cpuclk rate table
This patch adds 1464000000Hz for armclk
Change-Id: I3e4c18acf13036b778f18fe166ae47682a97feeb
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Mark Yao [Thu, 11 May 2017 07:04:27 +0000 (15:04 +0800)]
dt-bindings: rockchip: vop: add gamma_table range
Change-Id: Iafbff319d33c9436963572e05911ccfe676a4852
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
Ander Conselvan de Oliveira [Tue, 4 Apr 2017 16:52:21 +0000 (17:52 +0100)]
FROMLIST: drm: Pass CRTC ID in userspace vblank events
With the atomic API, it is possible that a single commit affects
multiple crtcs. If the user requests an event with that commit, one
event will be sent for each CRTC, but it is not possible to distinguish
which crtc an event is for in user space. To solve this, the reserved
field in struct drm_vblank_event is repurposed to include the crtc_id
which the event is for.
The DRM_CAP_CRTC_IN_VBLANK_EVENT is added to allow userspace to query if
the crtc field will be set properly.
[daniels: Rebased, using Maarten's forward-port.]
Signed-off-by: Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com>
Signed-off-by: Daniel Stone <daniels@collabora.com>
Cc: Maarten Lankhorst <maarten.lankhorst@intel.com>
Reviewed-by: Sean Paul <seanpaul@chromium.org>
(am from https://patchwork.kernel.org/patch/
9662099/)
Change-Id: Ibe6949782e5df5363d4eaa3e98b3ff413239cf26
Signed-off-by: Jacob Chen <jacob2.chen@rock-chips.com>
zain wang [Wed, 10 May 2017 03:21:30 +0000 (11:21 +0800)]
mfd: fusb302: ignored the timeout if vdm got the message.
The PD spec define the source should ensure that a message requesting
a response is responded within 30ms(tSenderResponse). But if the
message responded is received close to 30ms, we may hit the case:
tcpm_get_message(); //get the data and close to 30ms
... takes about 600us, meanwhile the 30ms timer came.
auto_vdm_machine
vdm_send... //we get the message, but timeout.
So, let's ignored the timeout if we get the message.
Change-Id: I64ced1bd2d32d8ef996dcec27cf35c3e333386f8
Signed-off-by: zain wang <wzz@rock-chips.com>
Mark Yao [Thu, 11 May 2017 06:57:06 +0000 (14:57 +0800)]
arm: dts: rockchip: add gamma table support for rk322x
Change-Id: I9aa8af01bd989ff244153d53c8b9b8ca06d3f834
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
Mark Yao [Thu, 11 May 2017 06:56:57 +0000 (14:56 +0800)]
arm: dts: rockchip: add gamma table support for rk3288
Change-Id: Idb4cd93b8a696925ac56b98c1619999949e6fd84
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
Mark Yao [Thu, 11 May 2017 06:56:43 +0000 (14:56 +0800)]
arm64: dts: rockchip: add gamma table support for rk3368
Change-Id: Ia0390aa0ffe99a2c2b6ba82ecd83610683d49eac
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
Mark Yao [Thu, 11 May 2017 06:14:49 +0000 (14:14 +0800)]
arm64: dts: rockchip: add gamma table support for rk3399
Rk3399 vopb's gamma table size is 1024, vopl's gamma
table size is 256
Change-Id: Iea9cd70f82dfa9c9c8ae53a24c8153eebb981e7a
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
Mark Yao [Mon, 27 Apr 2015 18:39:35 +0000 (11:39 -0700)]
drm/rockchip: add support for gamma table
Introduce support for rockchip gamma table,
Rockchip have two version gamma table design:
The old version design was introduced by Dominik Behr's gamma patch
(https://chromium-review.googlesource.com/272209):
Gamma table has to be uploaded when the LUT is disabled which only takes
effect at the end of a frame, therefore actual hardware updates is done
from a worker and can take more than one frame.
In order to solve gamma table switch issues, after rk3399,
H/W add a gamma table update mechanism, can update without lut disable.
And gamma table's size also has two version:
one is 10 bit per component, 1024 entries,
the other one is 8 bit per component, 256 entries
Change-Id: I8145d1c42a28d57f11e95d24be2341011360334d
Signed-off-by: Dominik Behr <dbehr@chromium.org>
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
Finley Xiao [Tue, 9 May 2017 13:53:37 +0000 (21:53 +0800)]
PM / devfreq: rockchip_dmc: avoid waiting for vop line flag indefinitely
It may disable vop_crtc when scaling frequency, in this case,
devfreq thread will wait for vop line flag indefinitely, the
system will crash.
Change-Id: I7043b285c329ff23e2fc9c5b5f3a165c37ef6378
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Finley Xiao [Tue, 9 May 2017 13:34:24 +0000 (21:34 +0800)]
drm/rockchip: vop: export rockchip_drm_register_notifier_to_dmc
This function registers a notifier to dmc devfreq, devfreq thread will
lock the mutex of vop when scaling frequency, so vop_crtc will not be
disabled when it is waiting for line flag.
Change-Id: I886e5dc5d36a0f14f35662cec3423a2c5550a7a6
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Finley Xiao [Tue, 9 May 2017 13:31:31 +0000 (21:31 +0800)]
drm/rockchip: vop: add vop enable/disable mutex lock
It may disable vop_crtc when waiting for line flag, in this case,
we would not get line flag any more. So the lock should be added
to prevent rockchip_wait_line_flag() from vop_crtc_disable();
Change-Id: I312fd46e64006bf69e3c57f54513230b90866e21
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
zhangyunlong [Tue, 9 May 2017 03:41:19 +0000 (11:41 +0800)]
camera: rockchip: camsys driver v0.0x21.0xf
add reference count for marvin
Change-Id: Ic410da2524a8972d782ccfdcb121e1727b02e9d8
Signed-off-by: zhangyunlong <dalon.zhang@rock-chips.com>
xcq [Thu, 20 Apr 2017 08:27:16 +0000 (16:27 +0800)]
camera: rockchip: fix some compiled errors and warn
fix spin_unlock error use and some potential problems.
Change-Id: I860c225f2acb5e28827ad3f6b702b0dc7828bb0f
Signed-off-by: xcq <shawn.xu@rock-chips.com>
Tang Yun ping [Sat, 6 May 2017 03:22:30 +0000 (11:22 +0800)]
ARM: rockchip_defconfig: default to enable rockchip dmc
Change-Id: Ia52708079d41379d0c530b08d6a3a6bf109ee98c
Signed-off-by: Tang Yun ping <typ@rock-chips.com>
Tang Yun ping [Tue, 11 Apr 2017 08:14:47 +0000 (16:14 +0800)]
PM / devfreq: rockchip_dmc: add support for rk3288
This adds the necessary data for handling dmcfreq on the rk3288.
Change-Id: I042222f899d03ec1832ac47b48db8c6c46c3b0d3
Signed-off-by: Tang Yun ping <typ@rock-chips.com>
Tang Yun ping [Wed, 12 Apr 2017 08:24:16 +0000 (16:24 +0800)]
PM / devfreq: event: add support for rk3288 dfi
This adds the necessary data for handling dfi on the rk3288.
Access the dfi via registers provided by GRF (general register
files) module.
Change-Id: Ic7241af3c20a269ab362055dea04d260e01c50de
Signed-off-by: Tang Yun ping <typ@rock-chips.com>
Tang Yun ping [Thu, 4 May 2017 12:49:58 +0000 (20:49 +0800)]
clk: rockchip: support setting ddr clock via SIP Version 2 APIs
1. Add support setting ddr clock via SIP Version 2 APIs
2. RK3288 using SIP Vision 2.
Change-Id: I935e43b1885a96650dc86e3eb6d79de6795062a9
Signed-off-by: Tang Yun ping <typ@rock-chips.com>
Tang Yun ping [Mon, 8 May 2017 11:30:56 +0000 (19:30 +0800)]
sip: rockchip: fix bus about make kernel failure
When undefine "CONFIG_ROCKCHIP_SIP", define an empty sip function
to avoid make kernel failure.
Change-Id: Id6bcf1cec1c11f09511852e015631d14279ca8bc
Signed-off-by: Tang Yun ping <typ@rock-chips.com>
Mark Yao [Fri, 5 May 2017 07:24:43 +0000 (15:24 +0800)]
drm: add drm_device_get_by_name support
Change-Id: Ifbd0f403ca2302e9329a16d7b69db5ee056cadf7
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
Huibin Hong [Thu, 27 Apr 2017 01:13:53 +0000 (09:13 +0800)]
Revert "fiq debugger: add resume for debug uart"
This reverts commit
0e7d751d6c004970348bdacb6961e06e7775cb92.
If enable no console suspend, it will do resume when printing log,
which causes problem. Remove resume of kernel, and add resume of
trust firmware or other power management code.
Change-Id: I3e8e704140134a6aad5c0eb2f14fde36fb108ad3
Signed-off-by: Huibin Hong <huibin.hong@rock-chips.com>
Frank Wang [Wed, 10 May 2017 03:23:49 +0000 (11:23 +0800)]
arm: dts: add vdd_arm and vdd_log regulator for rk3229-evb
Change-Id: I1a0bbee3e5b9a43f2a79285c04497ec598697404
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
Xu Jianqun [Wed, 10 May 2017 01:21:04 +0000 (09:21 +0800)]
arm64: dts: rk3368-android: revert to use uart2 for debug
Change-Id: I5e6c88e185a2ad39b082ad4b989589cd46ecb874
Signed-off-by: Xu Jianqun <jay.xu@rock-chips.com>
David Wu [Fri, 28 Apr 2017 09:41:43 +0000 (17:41 +0800)]
net: stmmac: The netif_device_attach() should be called after napi_enable()
If the netif_device_attach() is called earlier, the state of dev_queue is
waked, txtimer might be modified, and the txtimer is added at same time.
It might make run_timer_softirq crashed, because the timer is be detached
twice together.
Change-Id: I31dde4e940bddcc36372ca1f4a8313c0389d4e6b
Signed-off-by: David Wu <david.wu@rock-chips.com>
Frank Wang [Tue, 2 May 2017 08:42:38 +0000 (16:42 +0800)]
arm: dts: simplified rk3229 board configs.
Move EMMC and UART configs from every board DTS to a DTSI file.
Change-Id: If2fd49b9243b879ae89e172f55903eedfd4f3981
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
Frank Wang [Mon, 8 May 2017 07:23:40 +0000 (15:23 +0800)]
arm: dts: add watchdog and uart2 related for rk322x SoC
Add another GPIO sets for UART2 since the old ones are conflict
with SDMMC, also add watchdog support.
Change-Id: Ib0f1472b9a7760e15e1b83e103f65f43e3642643
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
Randy Li [Tue, 25 Apr 2017 03:08:03 +0000 (11:08 +0800)]
ARM: dts: rockchip: remove dev_mode from rk3288
Since there is no combo device at RK3288, no need to
use this property anymore.
Change-Id: I56434161c4167fc048e4956e97b29617367e28f6
Signed-off-by: Randy Li <randy.li@rock-chips.com>
Tang Yun ping [Mon, 8 May 2017 01:36:10 +0000 (09:36 +0800)]
clk: rockchip: rk3288: always enable gpll_ddr for ddrc.
When ddr frequency scanning, need to switch to gpll for saving
times.
Change-Id: Ibb7e4ed1fa4babaf65e1d98c8a0891766cea63de
Signed-off-by: Tang Yun ping <typ@rock-chips.com>
Tang Yun ping [Thu, 4 May 2017 12:38:28 +0000 (20:38 +0800)]
sip: rockchip: add SHARE_PAGE_TYPE_DDR for ddr frequency scanning.
Change-Id: I7b9c81912e15bf2cea6739a051e5f466ba759d77
Signed-off-by: Tang Yun ping <typ@rock-chips.com>
William Wu [Fri, 5 May 2017 10:16:32 +0000 (18:16 +0800)]
phy: rockchip-inno-usb2: increase otg sm work first schedule time
In rockchip inno usb2 phy driver, we use otg_sm_work to
dynamically manage power consumption for phy otg-port.
If the otg-port works as peripheral mode and doesn't
communicate with usb host, we will suspend phy.
But once suspend phy, the phy no longer has any internal
clock running, include the utmi_clk which supplied for
usb controller. So if we suspend phy before usb controller
init, it will cause usb controller fail to initialize.
Specifically, without this pathch, the observed order is:
1. unplug usb cable
2. start system, do dwc2 controller probe
3. dwc2_lowlevel_hw_enable()
- phy_init()
- rockchip_usb2phy_init()
- schedule otg_sm_work after 2s
put phy in suspend, and close utmi_clk
4. dwc2_hsotg_udc_start() - fail to initialize the usb core
Generally, dwc2_hsotg_udc_start() can be called within 5s
after start system on rockchip platform, so we increase the
the first schedule delay time to 6s for otg_sm_work afer usb
controller calls phy_init(), this can make sure that the usb
controller completes initialization before phy enter suspend.
Change-Id: I40a7f6b24620e49a1273cb9c5051d62efb62810d
Signed-off-by: William Wu <william.wu@rock-chips.com>
Xu Jianqun [Thu, 4 May 2017 03:16:52 +0000 (11:16 +0800)]
mailbox: rk3368: fix error setting if mbox_msg is null
Fix the error dump:
[19252.682822] Unable to handle kernel NULL pointer dereference at
virtual address
00000020
[19252.682834] pgd =
ffffff800935d000
[19252.682844] [
00000020] *pgd=
0000000077ffe003, *pud=
0000000077ffe003,
*pmd=
0000000000000000
[19252.682852] Internal error: Oops:
96000005 [#1] PREEMPT SMP
[19252.682863] Modules linked in: pvrsrvkm(O)
[19252.682872] CPU: 1 PID: 59 Comm: irq/32-
ff6b0000 Tainted: G W
O 4.4.55 #34
[19252.682875] Hardware name: Rockchip rk3368 p9 board (DT)
[19252.682880] task:
ffffffc074cf8c40 ti:
ffffffc074d04000 task.ti:
ffffffc074d04000
[19252.682894] PC is at mbox_chan_received_data+0xc/0x20
[19252.682901] LR is at rk3368_mbox_isr+0xb0/0xd0
Change-Id: I1873d6a7e7d1390d2c2c44a77c120d1a02614fdc
Signed-off-by: Xu Jianqun <jay.xu@rock-chips.com>
William Wu [Fri, 5 May 2017 09:51:41 +0000 (17:51 +0800)]
phy: rockchip-inno-usb2: add a delay after phy resume
When resume phy, it need about 1.5 ~ 2ms to wait for
utmi_clk which used for USB controller to become stable.
Change-Id: I319a28069b4b3381f22cc34567226f341e948bd4
Signed-off-by: William Wu <william.wu@rock-chips.com>
Huibin Hong [Thu, 4 May 2017 13:36:27 +0000 (21:36 +0800)]
ARM64: dts: rk3368-android: enable fiq mode
If this patch is used, dedicated trust firmwart is necessary.
Change-Id: I72ca3b1b722c4076f589341e40efcbeeb5a07a58
Signed-off-by: Huibin Hong <huibin.hong@rock-chips.com>
Huibin Hong [Thu, 4 May 2017 13:33:37 +0000 (21:33 +0800)]
rk_fiq_debugger: remove "read signal irq from dts directly"
Change-Id: I1f531ce2f58b33d5501f8446ad393e7ac4f27ef0
Signed-off-by: Huibin Hong <huibin.hong@rock-chips.com>
William Wu [Fri, 5 May 2017 09:41:00 +0000 (17:41 +0800)]
arm: dts: rk322x-android: enable usb otg controller and its phy
Change-Id: Ie03c7fe388360b0285d2a6eb0a455f5ed28e74c4
Signed-off-by: William Wu <william.wu@rock-chips.com>
William Wu [Fri, 5 May 2017 09:36:35 +0000 (17:36 +0800)]
phy: rockchip-inno-usb2: add otg-port support for rk322x SoC
This patch adds USB 2.0 PHY otg-port configuration for rk322x
SoC, this otg-port can be used for USB 2.0 OTG interface.
Change-Id: I7f2e362292edb45078a16d1a9665e3bdccc54814
Signed-off-by: William Wu <william.wu@rock-chips.com>
William Wu [Fri, 5 May 2017 09:29:56 +0000 (17:29 +0800)]
arm: dts: rockchip: add u2phy otg-port and dwc2 ctrl nodes for rk322x SoC
This patch adds dwc2 controller and its phy nodes for rk322x SoC.
Change-Id: I29779baf92c28154ad342e234e8a5582984b8a12
Signed-off-by: William Wu <william.wu@rock-chips.com>
Mark Yao [Wed, 3 May 2017 08:25:50 +0000 (16:25 +0800)]
ARM: dts: rk322x: add vop display node
Change-Id: Ic26431540260c758b6872020c36a41efdb2d82f2
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
Huang, Tao [Sat, 6 May 2017 05:45:41 +0000 (13:45 +0800)]
OP-TEE: use sema_init instead of __SEMAPHORE_INITIALIZER
Fix lockdep warning:
the code is fine but needs lockdep annotation.
turning off the locking correctness validator.
CPU:rk3288:/ $ 0 PID: 234 Comm: tee-supplicant Not tainted 4.4.64 #51
Hardware name: Rockchip (Device Tree)
[<
c0110018>] (unwind_backtrace) from [<
c010c048>] (show_stack+0x10/0x14)
[<
c010c048>] (show_stack) from [<
c04194a8>] (dump_stack+0x9c/0xd4)
[<
c04194a8>] (dump_stack) from [<
c018321c>] (__lock_acquire+0x638/0x1c10)
[<
c018321c>] (__lock_acquire) from [<
c01850ec>] (lock_acquire+0x1d0/0x29c)
[<
c01850ec>] (lock_acquire) from [<
c0bc0f3c>] (_raw_spin_lock_irqsave+0x50/0x64)
[<
c0bc0f3c>] (_raw_spin_lock_irqsave) from [<
c017e148>] (down_interruptible+0xc/0x48)
[<
c017e148>] (down_interruptible) from [<
c03cd72c>] (tee_supp_read+0x74/0x154)
[<
c03cd72c>] (tee_supp_read) from [<
c025d638>] (__vfs_read+0x2c/0xf0)
[<
c025d638>] (__vfs_read) from [<
c025de30>] (vfs_read+0x84/0x134)
[<
c025de30>] (vfs_read) from [<
c025e720>] (SyS_read+0x4c/0xa4)
[<
c025e720>] (SyS_read) from [<
c01072c0>] (ret_fast_syscall+0x0/0x1c)
Change-Id: I09335112bed6efb30e60a22b471d4467eecaf520
Signed-off-by: Huang, Tao <huangtao@rock-chips.com>
Huang, Tao [Sat, 6 May 2017 09:52:33 +0000 (17:52 +0800)]
arm64: rockchip_defconfig: enable MODVERSIONS
353a964727cf ("ANDROID: android-base.cfg: add CONFIG_MODULES option")
Change-Id: I8e85dfd6c7fedf797066e5e707eba7595dc2c123
Signed-off-by: Huang, Tao <huangtao@rock-chips.com>
Huang, Tao [Sat, 6 May 2017 09:52:00 +0000 (17:52 +0800)]
arm64: rockchip_defconfig: enable CONFIG_IKCONFIG
6286b142aeb2 ("ANDROID: android-base.cfg: add CONFIG_IKCONFIG option")
Change-Id: I68b0dc00a68a3eb885eb32d8c82b326067a438dc
Signed-off-by: Huang, Tao <huangtao@rock-chips.com>
Huang, Tao [Sat, 6 May 2017 09:51:02 +0000 (17:51 +0800)]
arm64: rockchip_defconfig: disable CONFIG_USELIB
1c634ee26be1 ("config: disable CONFIG_USELIB and CONFIG_FHANDLE")
Change-Id: I1518e974427572d941b982db3896eb72822872f8
Signed-off-by: Huang, Tao <huangtao@rock-chips.com>
Huang, Tao [Sat, 6 May 2017 09:50:17 +0000 (17:50 +0800)]
arm64: rockchip_defconfig: rename UID_CPUTIME to UID_SYS_STATS
2ea16502ca00 ("ANDROID: uid_sys_stats: rename uid_cputime.c to uid_sys_stats.c")
Change-Id: I11ad23129722f87111a5c6f3881b4bdcc5626f66
Signed-off-by: Huang, Tao <huangtao@rock-chips.com>
Huang, Tao [Sat, 6 May 2017 09:56:21 +0000 (17:56 +0800)]
arm64: rockchip_defconfig: enable ARM64_SW_TTBR0_PAN
536bf705c5fd ("ANDROID: configs: CONFIG_ARM64_SW_TTBR0_PAN=y")
Change-Id: I49f562d81d8f354dfbeb545618bc6c907256d60b
Signed-off-by: Huang, Tao <huangtao@rock-chips.com>
Huang, Tao [Sat, 6 May 2017 09:29:27 +0000 (17:29 +0800)]
ARM: rockchip_defconfig: enable MODVERSIONS
353a964727cf ("ANDROID: android-base.cfg: add CONFIG_MODULES option")
Change-Id: Ia85709d1dc711f1ed8632e6299f121b4e6fbedc2
Signed-off-by: Huang, Tao <huangtao@rock-chips.com>
Huang, Tao [Sat, 6 May 2017 09:28:01 +0000 (17:28 +0800)]
ARM: rockchip_defconfig: enable CONFIG_IKCONFIG
6286b142aeb2 ("ANDROID: android-base.cfg: add CONFIG_IKCONFIG option")
Change-Id: I4d0369b990f9f9d707b672c6959e668307be700b
Signed-off-by: Huang, Tao <huangtao@rock-chips.com>
Huang, Tao [Sat, 6 May 2017 09:26:09 +0000 (17:26 +0800)]
ARM: rockchip_defconfig: disable CONFIG_USELIB
1c634ee26be1 ("config: disable CONFIG_USELIB and CONFIG_FHANDLE")
Change-Id: I617db2524c604e732d9d3f4eae0b8566efd82e98
Signed-off-by: Huang, Tao <huangtao@rock-chips.com>
Huang, Tao [Sat, 6 May 2017 09:23:51 +0000 (17:23 +0800)]
ARM: rockchip_defconfig: rename UID_CPUTIME to UID_SYS_STATS
2ea16502ca00 ("ANDROID: uid_sys_stats: rename uid_cputime.c to uid_sys_stats.c")
Change-Id: I345f44e510cb0168e9816f7d9adecf5772cdb092
Signed-off-by: Huang, Tao <huangtao@rock-chips.com>
Huang, Tao [Sat, 6 May 2017 06:23:00 +0000 (14:23 +0800)]
Merge branch 'linux-linaro-lsk-v4.4-android' of git://git.linaro.org/kernel/linux-linaro-stable.git
* linux-linaro-lsk-v4.4-android: (521 commits)
Linux 4.4.66
ftrace/x86: Fix triple fault with graph tracing and suspend-to-ram
ARCv2: save r30 on kernel entry as gcc uses it for code-gen
nfsd: check for oversized NFSv2/v3 arguments
Input: i8042 - add Clevo P650RS to the i8042 reset list
p9_client_readdir() fix
MIPS: Avoid BUG warning in arch_check_elf
MIPS: KGDB: Use kernel context for sleeping threads
ALSA: seq: Don't break snd_use_lock_sync() loop by timeout
ALSA: firewire-lib: fix inappropriate assignment between signed/unsigned type
ipv6: check raw payload size correctly in ioctl
ipv6: check skb->protocol before lookup for nexthop
macvlan: Fix device ref leak when purging bc_queue
ip6mr: fix notification device destruction
netpoll: Check for skb->queue_mapping
net: ipv6: RTF_PCPU should not be settable from userspace
dp83640: don't recieve time stamps twice
tcp: clear saved_syn in tcp_disconnect()
sctp: listen on the sock only when it's state is listening or closed
net: ipv4: fix multipath RTM_GETROUTE behavior when iif is given
...
Conflicts:
drivers/usb/dwc3/gadget.c
include/linux/usb/quirks.h
Change-Id: I490f766b9a530b10da3107e20709538e4536a99d
Huang, Tao [Sat, 6 May 2017 06:20:20 +0000 (14:20 +0800)]
ARM: rockchip_defconfig: update by savedefconfig
Change-Id: I96ee84cfa4b40b10f5fb273044a81b22f20f4efb
Signed-off-by: Huang, Tao <huangtao@rock-chips.com>
Huang, Tao [Sat, 6 May 2017 06:17:39 +0000 (14:17 +0800)]
arm64: rockchip_defconfig: update by savedefconfig
Change-Id: I4aa6538762060d62da3da56065abee4d42134da2
Signed-off-by: Huang, Tao <huangtao@rock-chips.com>
Xu Jianqun [Thu, 4 May 2017 07:09:06 +0000 (15:09 +0800)]
camera: rockchip: camsys driver disable debug
Change-Id: I1a4b3d1ab0e96bbc4ff482b8f3a3f8aa98b4529d
Signed-off-by: Xu Jianqun <jay.xu@rock-chips.com>
XiaoDong Huang [Fri, 5 May 2017 01:14:58 +0000 (09:14 +0800)]
arm64: dts: rk3368: add rockchip-suspend node
Change-Id: I68f8068c795e87ffa3cbea4b23ba5df56a70218d
Signed-off-by: XiaoDong Huang <derrick.huang@rock-chips.com>
XiaoDong Huang [Wed, 26 Apr 2017 11:06:08 +0000 (19:06 +0800)]
soc: rockchip: support rk3368 pm config
Change-Id: I69e823d397a411c1b1395563870fca6485dfb936
Signed-off-by: XiaoDong Huang <derrick.huang@rock-chips.com>
Frank Wang [Thu, 4 May 2017 07:20:14 +0000 (15:20 +0800)]
arm: dts: assigned host vbus regulator for rk3229-evb board
Change-Id: I86608300c600db0ece0120ce3fba0f541953910e
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
Frank Wang [Thu, 4 May 2017 07:16:32 +0000 (15:16 +0800)]
arm: dts: assigned host vbus regulator for rk3229-echo-v10 board
Change-Id: Ia4cd6a915750d933886b217d2c4818d4f66d31c9
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
Frank Wang [Thu, 4 May 2017 10:58:16 +0000 (18:58 +0800)]
arm: dts: enable all usb phy and usb host for rk322x SoC
Change-Id: Ia69914348eee190aea0cd0f1a380a4ce569f1cdf
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
Frank Wang [Thu, 4 May 2017 06:35:36 +0000 (14:35 +0800)]
arm: dts: add usb-phy and usb2.0 host nodes for rk322x SoC
This patch adds usb2.0 host and usb-phy related nodes for rk322x SoC.
Change-Id: Ib1c5375f81c8d7b55608b1b1793c27be012a8c6e
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
Frank Wang [Thu, 4 May 2017 06:11:34 +0000 (14:11 +0800)]
phy: rockchip-inno-usb2: add host-port support for rk322x SoC
This adds support host-port on rk322x SoC and amend phy Documentation.
Change-Id: I440adc10e25c98cbe220275fecd12774c08d24d1
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
Randy Li [Wed, 12 Apr 2017 05:41:41 +0000 (13:41 +0800)]
video: rockchip: vpu: support VDPU at RK3328
The VDPU at RK3328 is a standalone decoder IP without
encoder. Also there is the other AVS+ decoder IP,
working as the combo IP.
I introduce the following commit from develop-3.10,
commit
ee2f9f6912fb ("rk322xh/vcodec: bugfix, avoid combo device overwrite irq status")
commit
568dabeb12ef ("rockchip/vcodec: bugfix, inconsistence power on/off operation")
The following patches have not been introduced,
it would effect RKV device:
commit
b8a2ce7e5b60 ("rockchip/vcodec: disable power-save optimization for hw defeat")
commit
046faf9ba20a ("rk322xh/vcodec: bugfix, probe failed when ion cma heap undefined")
commit
beaeb230cbf2 ("rk322xh/vcodec: revise for rk322xh feature")
Change-Id: Ifc14daa84b692f8fcfbd4f6690ed66dd56bbbe29
Signed-off-by: Randy Li <randy.li@rock-chips.com>
Randy Li [Mon, 17 Apr 2017 02:22:13 +0000 (10:22 +0800)]
video: rockchip: vpu: add avs decoder table
This table would be used for both AVS and AVS+ decoder.
Change-Id: I9557a3d170943a3b544d97b6c63f02679bd7b532
Signed-off-by: Randy Li <randy.li@rock-chips.com>
Randy Li [Tue, 25 Apr 2017 03:06:06 +0000 (11:06 +0800)]
video: rockchip: vpu: only use the dev_mode for combo
The most of device can get this its running type from the
compatible. This property becomes unnecessary.
Change-Id: I40ec41b130fac2cadd47d92332d27c58a8c2c9f7
Signed-off-by: Randy Li <randy.li@rock-chips.com>
Finley Xiao [Tue, 2 May 2017 12:30:13 +0000 (20:30 +0800)]
PM / devfreq: rockchip_dmc: add mutex lock for pmu register
As dmc may also assess register PMU_BUS_IDLE_REQ, we should prevent
pd driver and dmc driver assessing this register at the same time.
Change-Id: I546033536c87dcf497774cbc6c8f36a3e651ff07
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Finley Xiao [Tue, 2 May 2017 07:15:26 +0000 (15:15 +0800)]
soc: rockchip: power-domain: export rockchip_pm_register_notify_to_dmc
This function registers a notifier to dmc devfreq, it will lock the mutex
of pmu when scaling frequency, so that pd driver and dmc driver will not
assess register PMU_BUS_IDLE_REQ at the same time.
Change-Id: I0ba96599d9050d11924d032146e6b4d415629614
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Xu Jianqun [Thu, 4 May 2017 03:57:33 +0000 (11:57 +0800)]
dmaengine: pl330: fix error message to dev_err_ratelimited
Change-Id: I4d1191f5b7d330c2786eaac42213b4d255b05db8
Signed-off-by: Xu Jianqun <jay.xu@rock-chips.com>
Zorro Liu [Thu, 4 May 2017 03:10:45 +0000 (11:10 +0800)]
ARM64: dts: rk3368-p9: enable route mipi
Change-Id: Ib93918524c173bce1283b0001e0f8ca91594dc6f
Signed-off-by: Zorro Liu <lyx@rock-chips.com>
Finley Xiao [Tue, 2 May 2017 12:13:18 +0000 (20:13 +0800)]
PM / devfreq: rockchip_dmc: set polling_ms to 50
In order to scaling frequency more timely, reduce the polling_ms.
Change-Id: Icbee5552396fa0552fb514d92ea77687228c3e28
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Finley Xiao [Tue, 2 May 2017 11:56:03 +0000 (19:56 +0800)]
PM / devfreq: rockchip_dmc: add support for rk3368
This adds the necessary data for handling dmcfreq on the rk3368.
Change-Id: Ie202cbaa3b27e52b22a5efc57c6e108fbd03a20a
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Alex Shi [Thu, 4 May 2017 04:01:39 +0000 (12:01 +0800)]
Merge branch 'linux-linaro-lsk-v4.4' into linux-linaro-lsk-v4.4-android
Alex Shi [Thu, 4 May 2017 04:01:37 +0000 (12:01 +0800)]
Merge tag 'v4.4.66' into linux-linaro-lsk-v4.4
This is the 4.4.66 stable release
Finley Xiao [Tue, 2 May 2017 09:31:30 +0000 (17:31 +0800)]
PM / devfreq: rockchip_dmc: separate the initialized code of dram
It will be easy to compatible with more rockchip platforms,
if move the initialized code of dram into a separated function.
Change-Id: Iad8738b2c0995712723a8e3e84f12ae6b9b2aa91
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
dalong.zhang [Tue, 2 May 2017 13:58:55 +0000 (21:58 +0800)]
camera: rockchip: camsys_drv: 0.0x21.0xe
1) correct mipiphy_hsfreqrange of 3368.
2) add csi-phy timing setting for 3368.
Change-Id: Ia5203dcd8f01bc8989d5bb41a1b2af71bb91f607
Signed-off-by: dalong.zhang <dalon.zhang@rock-chips.com>
Zorro Liu [Thu, 4 May 2017 01:25:09 +0000 (09:25 +0800)]
arm64: dts: rockchip: fix uart3 pinctrl error of rk3368
Change-Id: Ie62fd4c6cf1a9c38a1793c9ccd0085c91f38f438
Signed-off-by: Zorro Liu <lyx@rock-chips.com>
Jacob Chen [Tue, 2 May 2017 03:25:31 +0000 (11:25 +0800)]
drm/rockchip: rga: use DMA_BIDIRECTIONAL
In some cases, we need to read data from RGA
and DMA_TO_DEVICE are not a proper flag
So change to DMA_BIDIRECTIONAL
Change-Id: I9d421e8a15f948fcb6643addab558803247ea161
Signed-off-by: Jacob Chen <jacob2.chen@rock-chips.com>
Xu Jianqun [Thu, 4 May 2017 01:08:30 +0000 (09:08 +0800)]
arm: dts: rk3288: remove assinged parent for NPLL/GPLL
Change-Id: I6ab7dff4d886a776677331f370d9632363abaa87
Signed-off-by: Xu Jianqun <jay.xu@rock-chips.com>
Frank Wang [Tue, 25 Apr 2017 09:19:11 +0000 (17:19 +0800)]
arm: dts: add the basic dt file for rk3229-echo-v10
Initial support for rk3229-echo board.
Change-Id: I7587d333f296f66727bf1c686911cfca2f3c5619
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
Frank Wang [Tue, 2 May 2017 09:28:35 +0000 (17:28 +0800)]
arm: dts: add android dtsi for rk322x SoC
Change-Id: I400ab97db9d333d53474978bb339ce2ed8a99ed4
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
Elaine Zhang [Thu, 27 Apr 2017 07:24:46 +0000 (15:24 +0800)]
clk: rockchip: rk3228: fix up the clk cpu setting
support more cpu freq
add armcore div setting
Change-Id: I46ab974da763bab2e887377848be1d9049a1568f
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Elaine Zhang [Thu, 27 Apr 2017 06:40:57 +0000 (14:40 +0800)]
arm: dts: rk3228: add some assigned-clocks
Change-Id: I257bbfe5ccea74245a6fe3269a896ab968a34c4f
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Elaine Zhang [Thu, 27 Apr 2017 06:37:34 +0000 (14:37 +0800)]
clk: rockchip: rk3228: Perfect clock description
1 Add some necessary clk ID.
2 some clks add CLK_IGNORE_UNUSED flag
3 add some critical clk
Change-Id: If52699b4d5f430413b06084b7d21fb1afd4539dd
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Finley Xiao [Thu, 6 Apr 2017 03:40:01 +0000 (11:40 +0800)]
clk: rockchip: rk3288: add ddrc clock support
Add a ddrc clock into clk branches, so we can do ddr frequency
scaling on rk3288 platform in future.
Change-Id: Ia6c93e5ce82fa30475eddf051bc9ea2512b0cc07
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Finley Xiao [Thu, 6 Apr 2017 03:33:40 +0000 (11:33 +0800)]
clk: rockchip: add SCLK_DDRCLK id for rk3288 ddrc
Add the needed id for the ddr clock.
Change-Id: I9578decd2348a35a6e9c4cc3527375d4d02a2af6
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>