Duncan P. N. Exon Smith [Tue, 20 Oct 2015 00:59:43 +0000 (00:59 +0000)]
Sparc: Remove implicit ilist iterator conversions, NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250781
91177308-0d34-0410-b5e6-
96231b3b80d8
Duncan P. N. Exon Smith [Tue, 20 Oct 2015 00:54:09 +0000 (00:54 +0000)]
NVPTX: Remove implicit ilist iterator conversions, NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250779
91177308-0d34-0410-b5e6-
96231b3b80d8
Duncan P. N. Exon Smith [Tue, 20 Oct 2015 00:46:39 +0000 (00:46 +0000)]
Hexagon: Remove implicit ilist iterator conversions, NFC
There are two things out of the ordinary in this commit. First, I made
a loop obviously "infinite" in HexagonInstrInfo.cpp. After checking if
an instruction was at the beginning of a basic block (in which case,
`break`), the loop decremented and checked the iterator for `nullptr` as
the loop condition. This has never been possible (the prev pointers are
always been circular, so even with the weird ilist/iplist
implementation, this isn't been possible), so I removed the condition.
Second, in HexagonAsmPrinter.cpp there was another case of comparing a
`MachineBasicBlock::instr_iterator` against `MachineBasicBlock::end()`
(which returns `MachineBasicBlock::iterator`). While not incorrect,
it's fragile. I switched this to `::instr_end()`.
All that said, no functionality change intended here.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250778
91177308-0d34-0410-b5e6-
96231b3b80d8
JF Bastien [Tue, 20 Oct 2015 00:37:42 +0000 (00:37 +0000)]
WebAssembly: fix syntax for br_if.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250777
91177308-0d34-0410-b5e6-
96231b3b80d8
Duncan P. N. Exon Smith [Tue, 20 Oct 2015 00:36:08 +0000 (00:36 +0000)]
AsmPrinter: Remove implicit ilist iterator conversion, NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250776
91177308-0d34-0410-b5e6-
96231b3b80d8
Duncan P. N. Exon Smith [Tue, 20 Oct 2015 00:15:20 +0000 (00:15 +0000)]
Mips: Remove implicit ilist iterator conversions, NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250769
91177308-0d34-0410-b5e6-
96231b3b80d8
Duncan P. N. Exon Smith [Tue, 20 Oct 2015 00:06:41 +0000 (00:06 +0000)]
CppBackend: Remove implicit ilist iterator conversions, NFC
Mostly just converted to range-based for loops. May have converted a
couple of extra loops as a drive-by (not sure).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250766
91177308-0d34-0410-b5e6-
96231b3b80d8
Duncan P. N. Exon Smith [Tue, 20 Oct 2015 00:02:50 +0000 (00:02 +0000)]
BPF: Remove implicit ilist iterator conversion, NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250765
91177308-0d34-0410-b5e6-
96231b3b80d8
Duncan P. N. Exon Smith [Mon, 19 Oct 2015 23:25:57 +0000 (23:25 +0000)]
ARM: Remove implicit ilist iterator conversions, NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250759
91177308-0d34-0410-b5e6-
96231b3b80d8
Lang Hames [Mon, 19 Oct 2015 23:23:17 +0000 (23:23 +0000)]
[Orc] Fix MSVC bugs introduced in r250749.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250758
91177308-0d34-0410-b5e6-
96231b3b80d8
Duncan P. N. Exon Smith [Mon, 19 Oct 2015 23:20:14 +0000 (23:20 +0000)]
ObjCARC: Remove implicit ilist iterator conversions, NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250756
91177308-0d34-0410-b5e6-
96231b3b80d8
Cong Hou [Mon, 19 Oct 2015 23:16:40 +0000 (23:16 +0000)]
Enhance loop rotation with existence of profile data in MachineBlockPlacement pass.
Currently, in MachineBlockPlacement pass the loop is rotated to let the best exit to be the last BB in the loop chain, to maximize the fall-through from the loop to outside. With profile data, we can determine the cost in terms of missed fall through opportunities when rotating a loop chain and select the best rotation. Basically, there are three kinds of cost to consider for each rotation:
1. The possibly missed fall through edge (if it exists) from BB out of the loop to the loop header.
2. The possibly missed fall through edges (if they exist) from the loop exits to BB out of the loop.
3. The missed fall through edge (if it exists) from the last BB to the first BB in the loop chain.
Therefore, the cost for a given rotation is the sum of costs listed above. We select the best rotation with the smallest cost. This is only for PGO mode when we have more precise edge frequencies.
Differential revision: http://reviews.llvm.org/D10717
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250754
91177308-0d34-0410-b5e6-
96231b3b80d8
Lang Hames [Mon, 19 Oct 2015 22:49:18 +0000 (22:49 +0000)]
[Orc] Use '= default' for move constructor/assignment as per dblaikie's review.
Thanks Dave!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250749
91177308-0d34-0410-b5e6-
96231b3b80d8
Duncan P. N. Exon Smith [Mon, 19 Oct 2015 22:23:36 +0000 (22:23 +0000)]
Linker: Remove implicit ilist iterator conversion, NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250748
91177308-0d34-0410-b5e6-
96231b3b80d8
David Blaikie [Mon, 19 Oct 2015 22:15:55 +0000 (22:15 +0000)]
Fix -Wdeprecated regarding ORC copying ValueMaterializers
As usual, this is a polymorphic hierarchy without polymorphic ownership,
so simply make the dtor protected non-virtual, protected default copy
ctor/assign, and make derived classes final. The derived classes will
pick up correct default public copy ops (and dtor) implicitly.
(wish I could add -Wdeprecated to the build, but last time I tried it
triggered on some system headers I still need to look into/figure out)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250747
91177308-0d34-0410-b5e6-
96231b3b80d8
Michael Liao [Mon, 19 Oct 2015 22:08:14 +0000 (22:08 +0000)]
[InstCombine] Optimize icmp of inc/dec at RHS
Allow LLVM to optimize the sequence like the following:
%inc = add nsw i32 %i, 1
%cmp = icmp slt %n, %inc
into:
%cmp = icmp sle i32 %n, %i
The case is not handled previously due to the complexity of compuation of %n.
Hence, LLVM cannot swap operands of icmp accordingly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250746
91177308-0d34-0410-b5e6-
96231b3b80d8
Duncan P. N. Exon Smith [Mon, 19 Oct 2015 22:06:09 +0000 (22:06 +0000)]
Vectorize: Remove implicit ilist iterator conversions, NFC
Besides the usual, I finally added an overload to
`BasicBlock::splitBasicBlock()` that accepts an `Instruction*` instead
of `BasicBlock::iterator`. Someone can go back and remove this overload
later (after updating the callers I'm going to skip going forward), but
the most common call seems to be
`BB->splitBasicBlock(BB->getTerminator(), ...)` and I'm not sure it's
better to add `->getIterator()` to every one than have the overload.
It's pretty hard to get the usage wrong.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250745
91177308-0d34-0410-b5e6-
96231b3b80d8
Sanjay Patel [Mon, 19 Oct 2015 21:59:12 +0000 (21:59 +0000)]
[CGP] transform select instructions into branches and sink expensive operands
This was originally checked in at r250527, but reverted at r250570 because of PR25222.
There were at least 2 problems:
1. The cost check was checking for an instruction with an exact cost of TCC_Expensive;
that should have been >=.
2. The cause of the clang stage 1 failures was illegally sinking 'call' instructions;
we can't sink instructions that may have side effects / are not safe to execute speculatively.
Fixed those conditions in sinkSelectOperand() and added test cases.
Original commit message:
This is a follow-up to the discussion in D12882.
Ideally, we would like SimplifyCFG to be able to form select instructions even when the operands
are expensive (as defined by the TTI cost model) because that may expose further optimizations.
However, we would then like a later pass like CodeGenPrepare to undo that transformation if the
target would likely benefit from not speculatively executing an expensive op (this patch).
Once we have this safety mechanism in place, we can adjust SimplifyCFG to restore its
select-formation behavior that changed with r248439.
Differential Revision: http://reviews.llvm.org/D13297
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250743
91177308-0d34-0410-b5e6-
96231b3b80d8
Duncan P. N. Exon Smith [Mon, 19 Oct 2015 21:48:29 +0000 (21:48 +0000)]
X86: Remove implicit ilist iterator conversions, NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250741
91177308-0d34-0410-b5e6-
96231b3b80d8
Lang Hames [Mon, 19 Oct 2015 20:37:52 +0000 (20:37 +0000)]
[RuntimeDyld][COFF] Fix some endianness issues, re-enable the regression test.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250733
91177308-0d34-0410-b5e6-
96231b3b80d8
Owen Anderson [Mon, 19 Oct 2015 19:27:40 +0000 (19:27 +0000)]
Restore the original behavior of SelectionDAG::getTargetIndex().
It looks like an extra negation snuck in as apart of restoring it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250726
91177308-0d34-0410-b5e6-
96231b3b80d8
Krzysztof Parzyszek [Mon, 19 Oct 2015 19:10:48 +0000 (19:10 +0000)]
[Hexagon] Remove unnecessary argument sign extends
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250724
91177308-0d34-0410-b5e6-
96231b3b80d8
Teresa Johnson [Mon, 19 Oct 2015 19:06:06 +0000 (19:06 +0000)]
Pass FunctionInfoIndex by reference to WriteFunctionSummaryToFile (NFC)
Implemented suggestion by dblakie in review for r250704.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250723
91177308-0d34-0410-b5e6-
96231b3b80d8
Lang Hames [Mon, 19 Oct 2015 18:59:22 +0000 (18:59 +0000)]
[Orc] Add explicit move constructor and assignment operator to make MSVC happy.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250722
91177308-0d34-0410-b5e6-
96231b3b80d8
Benjamin Kramer [Mon, 19 Oct 2015 18:41:23 +0000 (18:41 +0000)]
Add missing override noticed by Clang's -Winconsistent-missing-override.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250720
91177308-0d34-0410-b5e6-
96231b3b80d8
Jun Bum Lim [Mon, 19 Oct 2015 18:34:53 +0000 (18:34 +0000)]
[AArch64]Merge halfword loads into a 32-bit load
Convert two halfword loads into a single 32-bit word load with bitfield extract
instructions. For example :
ldrh w0, [x2]
ldrh w1, [x2, #2]
becomes
ldr w0, [x2]
ubfx w1, w0, #16, #16
and w0, w0, #ffff
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250719
91177308-0d34-0410-b5e6-
96231b3b80d8
Krzysztof Parzyszek [Mon, 19 Oct 2015 18:30:27 +0000 (18:30 +0000)]
[Hexagon] Fix debug information for local objects
- Isolate the check for the existence of a stack frame into hasFP.
- Implement getFrameIndexReference for DWARF address computation.
- Use getFrameIndexReference for offset computation in eliminateFrameIndex.
- Preserve debug information for dynamically allocated stack objects.
- Prefer FP to access local objects at -O0.
- Add experimental code to skip allocframe when not strictly necessary
(disabled by default).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250718
91177308-0d34-0410-b5e6-
96231b3b80d8
Benjamin Kramer [Mon, 19 Oct 2015 18:26:16 +0000 (18:26 +0000)]
Put back SelectionDAG::getTargetIndex.
While technically this is untested dead code, it has out-of-tree users.
This reverts a part of r250434.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250717
91177308-0d34-0410-b5e6-
96231b3b80d8
Lang Hames [Mon, 19 Oct 2015 17:53:43 +0000 (17:53 +0000)]
[Orc] Lambda needs to capture 'this'.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250716
91177308-0d34-0410-b5e6-
96231b3b80d8
Lang Hames [Mon, 19 Oct 2015 17:49:37 +0000 (17:49 +0000)]
[Orc] Remove extraneous semicolon that found its way into r250712.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250715
91177308-0d34-0410-b5e6-
96231b3b80d8
Krzysztof Parzyszek [Mon, 19 Oct 2015 17:46:01 +0000 (17:46 +0000)]
[Hexagon] Delay emission of CFI instructions
Emit the CFI instructions after all code transformation have been done.
This will avoid any interference between CFI instructions and packetization.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250714
91177308-0d34-0410-b5e6-
96231b3b80d8
Matthias Braun [Mon, 19 Oct 2015 17:44:22 +0000 (17:44 +0000)]
Revert "RegisterPressure: allocatable physreg uses are always kills"
This reverts commit r250596.
Reverted for now as the commit triggers assert in the AMDGPU target
pending investigation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250713
91177308-0d34-0410-b5e6-
96231b3b80d8
Lang Hames [Mon, 19 Oct 2015 17:43:51 +0000 (17:43 +0000)]
[Orc] Add support for emitting indirect stubs directly into the JIT target's
memory, rather than representing the stubs in IR. Update the CompileOnDemand
layer to use this functionality.
Directly emitting stubs is much cheaper than building them in IR and codegen'ing
them (see below). It also plays well with remote JITing - stubs can be emitted
directly in the target process, rather than having to send them over the wire.
The downsides are:
(1) Care must be taken when resolving symbols, as stub symbols are held in a
separate symbol table. This is only a problem for layer writers and other
people using this API directly. The CompileOnDemand layer hides this detail.
(2) Aliases of function stubs can't be symbolic any more (since there's no
symbol definition in IR), but must be converted into a constant pointer
expression. This means that modules containing aliases of stubs cannot be
cached. In practice this is unlikely to be a problem: There's no benefit to
caching such a module anyway.
On balance I think the extra performance is more than worth the trade-offs: In a
simple stress test with 10000 dummy functions requiring stubs and a single
executed "hello world" main function, directly emitting stubs reduced user time
for JITing / executing by over 90% (1.5s for IR stubs vs 0.1s for direct
emission).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250712
91177308-0d34-0410-b5e6-
96231b3b80d8
Teresa Johnson [Mon, 19 Oct 2015 15:23:03 +0000 (15:23 +0000)]
Convert gold-plugin unnecessary unique_ptr into local (NFC)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250704
91177308-0d34-0410-b5e6-
96231b3b80d8
Teresa Johnson [Mon, 19 Oct 2015 15:21:46 +0000 (15:21 +0000)]
Fix required library for r250699 to BitWriter instead of BitReader.
This should fix the mingw3 bot failure.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250703
91177308-0d34-0410-b5e6-
96231b3b80d8
Teresa Johnson [Mon, 19 Oct 2015 15:19:02 +0000 (15:19 +0000)]
Fix windows bot failures from r250699 by removing "/" from expected path
in test output.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250701
91177308-0d34-0410-b5e6-
96231b3b80d8
Teresa Johnson [Mon, 19 Oct 2015 14:30:44 +0000 (14:30 +0000)]
llvm-lto support for generating combined function indexes
Summary:
This patch adds support to llvm-lto that mirrors the support added by
r249270 to the gold plugin. This enables better testing of combined
index generation for ThinLTO.
Added a new test, and this support will be used in the test in D13515.
Reviewers: joker.eph
Subscribers: llvm-commits
Differential Revision: http://reviews.llvm.org/D13847
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250699
91177308-0d34-0410-b5e6-
96231b3b80d8
Benjamin Kramer [Mon, 19 Oct 2015 13:05:25 +0000 (13:05 +0000)]
Remove CRLF newlines. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250698
91177308-0d34-0410-b5e6-
96231b3b80d8
Asiri Rathnayake [Mon, 19 Oct 2015 11:44:24 +0000 (11:44 +0000)]
Fix mapping of @llvm.arm.ssat/usat intrinsics to ssat/usat instructions
The mapping of these two intrinsics in ARMInstrInfo.td had a small
omission which lead to their operands not being validated/transformed
before being lowered into usat and ssat instructions. This can cause
incorrect instructions to be emitted.
I've also added tests for the remaining two saturating arithmatic
intrinsics @llvm.arm.qadd and @llvm.arm.qsub as they are missing
codegen tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250697
91177308-0d34-0410-b5e6-
96231b3b80d8
James Molloy [Mon, 19 Oct 2015 08:54:59 +0000 (08:54 +0000)]
[GlobalsAA] Fix a really horrible iterator invalidation bug
We were keeping a reference to an object in a DenseMap then mutating it. At the end of the function we were attempting to clone that reference into other keys in the DenseMap, but DenseMap may well decide to resize its hashtable which would invalidate the reference!
It took an extremely complex testcase to catch this - many thanks to Zhendong Su for catching it in PR25225.
This fixes PR25225.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250692
91177308-0d34-0410-b5e6-
96231b3b80d8
Elena Demikhovsky [Mon, 19 Oct 2015 07:43:38 +0000 (07:43 +0000)]
Removed parameter "Consecutive" from isLegalMaskedLoad() / isLegalMaskedStore().
Originally I planned to use the same interface for masked gather/scatter and set isConsecutive to "false" in this case.
Now I'm implementing masked gather/scatter and see that the interface is inconvenient. I want to add interfaces isLegalMaskedGather() / isLegalMaskedScatter() instead of using the "Consecutive" parameter in the existing interfaces.
Differential Revision: http://reviews.llvm.org/D13850
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250686
91177308-0d34-0410-b5e6-
96231b3b80d8
Zlatko Buljan [Mon, 19 Oct 2015 07:16:26 +0000 (07:16 +0000)]
[mips][microMIPS] Implement ADDQ.PH, ADDQ_S.W, ADDQH.PH, ADDQH.W, ADDSC, ADDU.PH, ADDU_S.QB, ADDWC and ADDUH.QB instructions
Differential Revision: http://reviews.llvm.org/D13130
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250685
91177308-0d34-0410-b5e6-
96231b3b80d8
Zlatko Buljan [Mon, 19 Oct 2015 06:34:44 +0000 (06:34 +0000)]
[mips][microMIPS] Implement ABSQ.QB, ABSQ_S.PH, ABSQ_S.W, ABSQ_S.QB, INSV, MADD, MADDU, MSUB, MSUBU, MULT and MULTU instructions
Differential Revision: http://reviews.llvm.org/D13721
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250683
91177308-0d34-0410-b5e6-
96231b3b80d8
Xinliang David Li [Mon, 19 Oct 2015 04:17:10 +0000 (04:17 +0000)]
[PGO] Eliminate prof data register calls on FreeBSD platform
This is a follow up patch of r250199 after verifying the start/stop
section symbols work as spected on FreeBSD.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250679
91177308-0d34-0410-b5e6-
96231b3b80d8
Jakub Staszak [Sun, 18 Oct 2015 19:34:10 +0000 (19:34 +0000)]
Preserve CFG in MergedLoadStoreMotion. This fixes PR24426.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250660
91177308-0d34-0410-b5e6-
96231b3b80d8
Rafael Espindola [Sun, 18 Oct 2015 14:04:56 +0000 (14:04 +0000)]
Add hashing and DenseMapInfo for ArrayRef
Sometimes it is more natural to use a ArrayRef<uint8_t> than a StringRef to
represent a range of bytes that is not, semantically, a string.
This will be used in lld in a sec.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250658
91177308-0d34-0410-b5e6-
96231b3b80d8
Simon Pilgrim [Sun, 18 Oct 2015 12:54:37 +0000 (12:54 +0000)]
[X86][SSE] Add vector bit rotation tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250656
91177308-0d34-0410-b5e6-
96231b3b80d8
Simon Pilgrim [Sun, 18 Oct 2015 12:33:54 +0000 (12:33 +0000)]
Use SDValue bool check. NFCI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250653
91177308-0d34-0410-b5e6-
96231b3b80d8
Simon Pilgrim [Sun, 18 Oct 2015 11:47:23 +0000 (11:47 +0000)]
Move one-use variable inside test. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250651
91177308-0d34-0410-b5e6-
96231b3b80d8
Asaf Badouh [Sun, 18 Oct 2015 11:04:38 +0000 (11:04 +0000)]
[X86][AVX512DQ] add scalar fpclass
Differential Revision: http://reviews.llvm.org/D13769
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250650
91177308-0d34-0410-b5e6-
96231b3b80d8
Igor Breger [Sun, 18 Oct 2015 09:56:39 +0000 (09:56 +0000)]
AVX512: Lowering i8/i16 vector CTLZ using the dword LZCNT vector instruction
Differential Revision: http://reviews.llvm.org/D13632
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250649
91177308-0d34-0410-b5e6-
96231b3b80d8
Craig Topper [Sun, 18 Oct 2015 05:29:05 +0000 (05:29 +0000)]
[Sparc] Use MCPhysReg instead of unsigned to size static arrays of registers. Should reduce the table size.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250644
91177308-0d34-0410-b5e6-
96231b3b80d8
Craig Topper [Sun, 18 Oct 2015 05:15:38 +0000 (05:15 +0000)]
Use array_lengthof. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250643
91177308-0d34-0410-b5e6-
96231b3b80d8
Craig Topper [Sun, 18 Oct 2015 05:15:34 +0000 (05:15 +0000)]
Make a bunch of static arrays const.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250642
91177308-0d34-0410-b5e6-
96231b3b80d8
Lang Hames [Sun, 18 Oct 2015 01:41:37 +0000 (01:41 +0000)]
[RuntimeDyld] Add support for absolute symbols.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250639
91177308-0d34-0410-b5e6-
96231b3b80d8
Xinliang David Li [Sun, 18 Oct 2015 01:02:29 +0000 (01:02 +0000)]
Minor Instr PGO code restructuring
1. Key constant values (version, magic) and data structures related to raw and
indexed profile format are moved into one centralized file: InstrProf.h.
2. Utility function such as MD5Hash computation is also moved to the common
header to allow sharing with other components in the future.
3. A header data structure is introduced for Indexed format so that the reader
and writer can always be in sync.
4. Added some comments to document different places where multiple definition
of the data structure must be kept in sync (reader/writer, runtime, lowering
etc). No functional change is intended.
Differential Revision: http://reviews.llvm.org/D13758
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250638
91177308-0d34-0410-b5e6-
96231b3b80d8
Sanjoy Das [Sun, 18 Oct 2015 00:29:27 +0000 (00:29 +0000)]
[SCEV] Fix whitespace issues and remove extra braces; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250636
91177308-0d34-0410-b5e6-
96231b3b80d8
Sanjoy Das [Sun, 18 Oct 2015 00:29:23 +0000 (00:29 +0000)]
[SCEV] Use std::all_of and std::any_of; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250635
91177308-0d34-0410-b5e6-
96231b3b80d8
Sanjoy Das [Sun, 18 Oct 2015 00:29:20 +0000 (00:29 +0000)]
[SCEV] Use auto where it helps remove line breaks; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250634
91177308-0d34-0410-b5e6-
96231b3b80d8
Sanjoy Das [Sun, 18 Oct 2015 00:29:16 +0000 (00:29 +0000)]
[SCEV] Use range for loops; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250633
91177308-0d34-0410-b5e6-
96231b3b80d8
Craig Topper [Sat, 17 Oct 2015 21:32:28 +0000 (21:32 +0000)]
Use std::find instead of manual loop.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250624
91177308-0d34-0410-b5e6-
96231b3b80d8
Craig Topper [Sat, 17 Oct 2015 21:32:26 +0000 (21:32 +0000)]
Use std::is_sorted to replace a custom version. Also replace a comparison predicate struct with a lambda.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250623
91177308-0d34-0410-b5e6-
96231b3b80d8
Simon Pilgrim [Sat, 17 Oct 2015 19:04:24 +0000 (19:04 +0000)]
[X86][XOP] Add VPROT instruction opcodes
Added X86ISD opcodes for VPROT vector rotate by variable and by immediate.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250620
91177308-0d34-0410-b5e6-
96231b3b80d8
Craig Topper [Sat, 17 Oct 2015 18:22:46 +0000 (18:22 +0000)]
Remove unnecessary 'const' pointed out by David Blaikie.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250619
91177308-0d34-0410-b5e6-
96231b3b80d8
Simon Pilgrim [Sat, 17 Oct 2015 18:21:53 +0000 (18:21 +0000)]
[X86][XOP] Add VPROT rotate by immediate intrinsics tests
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250618
91177308-0d34-0410-b5e6-
96231b3b80d8
Simon Pilgrim [Sat, 17 Oct 2015 16:49:43 +0000 (16:49 +0000)]
[DAG] Ensure vector constant folding uses correct scalar undef types
Minor fix to D13665 found during post-commit review.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250616
91177308-0d34-0410-b5e6-
96231b3b80d8
Craig Topper [Sat, 17 Oct 2015 16:37:13 +0000 (16:37 +0000)]
Replace a custom table sort check with std::is_sorted. Change a function to take ArrayRef instead of pointer and length. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250615
91177308-0d34-0410-b5e6-
96231b3b80d8
Craig Topper [Sat, 17 Oct 2015 16:37:11 +0000 (16:37 +0000)]
Use std::begin/end and std::is_sorted to simplify some code. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250614
91177308-0d34-0410-b5e6-
96231b3b80d8
Craig Topper [Sat, 17 Oct 2015 16:37:09 +0000 (16:37 +0000)]
Use binary search in isCPUStringValid since the array is sorted.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250613
91177308-0d34-0410-b5e6-
96231b3b80d8
Simon Pilgrim [Sat, 17 Oct 2015 13:23:38 +0000 (13:23 +0000)]
[CostModel] Fixed AVX integer shift costs
Targets with AVX but without AVX2 were incorrectly reporting costs of 256-bit integer shifts.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250611
91177308-0d34-0410-b5e6-
96231b3b80d8
Simon Pilgrim [Sat, 17 Oct 2015 13:04:42 +0000 (13:04 +0000)]
[X86][FastISel] Teach how to select SSE4A nontemporal stores.
Add FastISel support for SSE4A scalar float / double non-temporal stores
Follow up to D13698
Differential Revision: http://reviews.llvm.org/D13773
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250610
91177308-0d34-0410-b5e6-
96231b3b80d8
Simon Pilgrim [Sat, 17 Oct 2015 11:40:05 +0000 (11:40 +0000)]
[InstCombine] SSE4A constant folding and conversion to shuffles.
This patch improves support for combining the SSE4A EXTRQ(I) and INSERTQ(I) intrinsics:
1 - Converts INSERTQ/EXTRQ calls to INSERTQI/EXTRQI if the 'bit index' and 'length' operands are constant
2 - Converts INSERTQI/EXTRQI calls to shufflevector if the bit index/length are both byte aligned (we can already lower shuffles to INSERTQI/EXTRQI if its useful)
3 - Constant folding support
4 - Add zeroinitializer handling
Differential Revision: http://reviews.llvm.org/D13348
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250609
91177308-0d34-0410-b5e6-
96231b3b80d8
Davide Italiano [Sat, 17 Oct 2015 06:36:46 +0000 (06:36 +0000)]
[JIT/Examples] Fix Fibonacci so that it runs again.
The old JIT is (long) gone.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250604
91177308-0d34-0410-b5e6-
96231b3b80d8
Kostya Serebryany [Sat, 17 Oct 2015 04:38:26 +0000 (04:38 +0000)]
[libFuzzer] add -shuffle flag
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250603
91177308-0d34-0410-b5e6-
96231b3b80d8
Colin LeMahieu [Sat, 17 Oct 2015 01:58:51 +0000 (01:58 +0000)]
[Hexagon] Reverting test file change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250601
91177308-0d34-0410-b5e6-
96231b3b80d8
Colin LeMahieu [Sat, 17 Oct 2015 01:33:04 +0000 (01:33 +0000)]
[Hexagon] Adding skeleton of HVX extension instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250600
91177308-0d34-0410-b5e6-
96231b3b80d8
Matthias Braun [Sat, 17 Oct 2015 01:03:44 +0000 (01:03 +0000)]
RegisterPressure: Unify the sparse sets in LiveRegsSet; NFC
Also do some cleanups comment improvements.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250598
91177308-0d34-0410-b5e6-
96231b3b80d8
Matthias Braun [Sat, 17 Oct 2015 00:46:57 +0000 (00:46 +0000)]
RegisterPressure: allocatable physreg uses are always kills
This property was already used in the code path when no liveness
intervals are present. Unfortunately the code path that uses liveness
intervals tried to query a cached live interval for an allocatable
physreg, those are usually not computed so a conservative default was
used.
This doesn't affect any of the lit testcases. This is a foreclosure to
upcoming changes which should be NFC but without this patch this tidbit
wouldn't be NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250596
91177308-0d34-0410-b5e6-
96231b3b80d8
Matthias Braun [Sat, 17 Oct 2015 00:35:59 +0000 (00:35 +0000)]
RegisterPressure: Remove 0 entries from PressureChange
This should not change behaviour because as far as I can see all code
reading the pressure changes has no effect if the PressureInc is 0.
Removing these entries however does avoid unnecessary computation, and
results in a more stable debug output. I want the stable debug output to
check that some upcoming changes are indeed NFC and identical even at
the debug output level.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250595
91177308-0d34-0410-b5e6-
96231b3b80d8
JF Bastien [Sat, 17 Oct 2015 00:25:38 +0000 (00:25 +0000)]
WebAssembly: don't omit dead vregs from locals
Summary:
This is a temporary hack until we get around to remapping the vreg
numbers to local numbers. Dead vregs cause bad numbering and make
consumers sad.
We could also just look at debug info an use named locals instead, but
vregs have to work properly anyways so there!
Reviewers: binji, sunfish
Subscribers: jfb, llvm-commits, dschuff
Differential Revision: http://reviews.llvm.org/D13839
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250594
91177308-0d34-0410-b5e6-
96231b3b80d8
JF Bastien [Sat, 17 Oct 2015 00:12:29 +0000 (00:12 +0000)]
WebAssembly: fix the syntax for comparisons
Summary: It has also slightly changed.
Reviewers: binji
Subscribers: jfb, dschuff, llvm-commits, sunfish
Differential Revision: http://reviews.llvm.org/D13837
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250591
91177308-0d34-0410-b5e6-
96231b3b80d8
Matthias Braun [Sat, 17 Oct 2015 00:08:48 +0000 (00:08 +0000)]
RegisterPressure: Hide non-const iterators of PressureDiff
It is too easy to accidentally violate the ordering requirements when
modifying the PressureDiff entries through iterators.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250590
91177308-0d34-0410-b5e6-
96231b3b80d8
Matthias Braun [Sat, 17 Oct 2015 00:08:45 +0000 (00:08 +0000)]
StreamWriter: List basic types instead of derived ones in HexNumber
This avoids problems with different (u)intXX definition on different
platforms. Specifically this fixes a case on OS/X which had uint64_t
defined as unsigned long long.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250589
91177308-0d34-0410-b5e6-
96231b3b80d8
Joseph Tremoulet [Sat, 17 Oct 2015 00:08:08 +0000 (00:08 +0000)]
[WinEH] Fix eh.exceptionpointer intrinsic lowering
Summary:
Some shared code for handling eh.exceptionpointer and eh.exceptioncode
needs to not share the part that truncates to 32 bits, which is intended
just for exception codes.
Reviewers: rnk
Subscribers: llvm-commits
Differential Revision: http://reviews.llvm.org/D13747
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250588
91177308-0d34-0410-b5e6-
96231b3b80d8
Reid Kleckner [Fri, 16 Oct 2015 23:56:14 +0000 (23:56 +0000)]
Disable a test relying on symbol demangling on non-Windows platforms
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250587
91177308-0d34-0410-b5e6-
96231b3b80d8
Reid Kleckner [Fri, 16 Oct 2015 23:53:12 +0000 (23:53 +0000)]
Speculative fix for GCC build
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250585
91177308-0d34-0410-b5e6-
96231b3b80d8
Reid Kleckner [Fri, 16 Oct 2015 23:43:27 +0000 (23:43 +0000)]
[WinEH] Fix stack alignment in funclets and ParentFrameOffset calculation
Our previous value of "16 + 8 + MaxCallFrameSize" for ParentFrameOffset
is incorrect when CSRs are involved. We were supposed to have a test
case to catch this, but it wasn't very rigorous.
The main effect here is that calling _CxxThrowException inside a
catchpad doesn't immediately crash on MOVAPS when you have an odd number
of CSRs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250583
91177308-0d34-0410-b5e6-
96231b3b80d8
Reid Kleckner [Fri, 16 Oct 2015 23:43:22 +0000 (23:43 +0000)]
[llvm-symbolizer] Use the export table if no symbols are present
This lets us make guesses about symbols in third party DLLs without
debug info, like MSVCR120.dll or kernel32.dll. dbghelp does the same
thing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250582
91177308-0d34-0410-b5e6-
96231b3b80d8
Matthias Braun [Fri, 16 Oct 2015 23:25:09 +0000 (23:25 +0000)]
RegisterPressure: Use range based for, cleanup
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250579
91177308-0d34-0410-b5e6-
96231b3b80d8
Davide Italiano [Fri, 16 Oct 2015 23:19:01 +0000 (23:19 +0000)]
[llvm-readobj] Teach ELFDumper about symbol versioning.
Differential Revision: http://reviews.llvm.org/D13824
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250575
91177308-0d34-0410-b5e6-
96231b3b80d8
Xinliang David Li [Fri, 16 Oct 2015 23:17:34 +0000 (23:17 +0000)]
Instroduce a template file to define InstrPGO core data structures.
Changing PGO data format layout can be a pain. Many different places need
to be touched and kept in sync. Failing to do so usually results in errors
very time consuming to debug.
This file is intended to be the master file that defines the layout of the
core runtime data structures. Currently only two structure is covered: Per
function ProfData structure and the function record structure used in
coverage mapping.
No client code has been made yet, so this commit is NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250574
91177308-0d34-0410-b5e6-
96231b3b80d8
Chris Bieneman [Fri, 16 Oct 2015 23:17:13 +0000 (23:17 +0000)]
[CMake] Cleaning up and generalizing the LLVMInstallSymlink script so that it can be used for libraries too.
In order to resolve PR25059, we're going to need to be able to generate symlinks to libraries manually, so I need this code to be reusable.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250573
91177308-0d34-0410-b5e6-
96231b3b80d8
Kostya Serebryany [Fri, 16 Oct 2015 23:04:31 +0000 (23:04 +0000)]
[libFuzzer] print a stack trace on timeout
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250571
91177308-0d34-0410-b5e6-
96231b3b80d8
Benjamin Kramer [Fri, 16 Oct 2015 23:00:29 +0000 (23:00 +0000)]
Revert "This is a follow-up to the discussion in D12882."
Breaks clang selfhost, see PR25222. This reverts commits r250527 and r250528.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250570
91177308-0d34-0410-b5e6-
96231b3b80d8
Kostya Serebryany [Fri, 16 Oct 2015 22:47:20 +0000 (22:47 +0000)]
[libFuzzer] reduce the size of artifacts printed on the screen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250565
91177308-0d34-0410-b5e6-
96231b3b80d8
Kostya Serebryany [Fri, 16 Oct 2015 22:41:47 +0000 (22:41 +0000)]
[libFuzzer] When -test_single_input crashes the test it is not necessary to write crash-file because input is already known to the user. Patch by Mike Aizatsky
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250564
91177308-0d34-0410-b5e6-
96231b3b80d8
Sanjay Patel [Fri, 16 Oct 2015 22:14:12 +0000 (22:14 +0000)]
[x86] promote 'add nsw' to a wider type to allow more combines
The motivation for this patch starts with PR20134:
https://llvm.org/bugs/show_bug.cgi?id=20134
void foo(int *a, int i) {
a[i] = a[i+1] + a[i+2];
}
It seems better to produce this (14 bytes):
movslq %esi, %rsi
movl 0x4(%rdi,%rsi,4), %eax
addl 0x8(%rdi,%rsi,4), %eax
movl %eax, (%rdi,%rsi,4)
Rather than this (22 bytes):
leal 0x1(%rsi), %eax
cltq
leal 0x2(%rsi), %ecx
movslq %ecx, %rcx
movl (%rdi,%rcx,4), %ecx
addl (%rdi,%rax,4), %ecx
movslq %esi, %rax
movl %ecx, (%rdi,%rax,4)
The most basic problem (the first test case in the patch combines constants) should also be fixed in InstCombine,
but it gets more complicated after that because we need to consider architecture and micro-architecture. For
example, AArch64 may not see any benefit from the more general transform because the ISA solves the sexting in
hardware. Some x86 chips may not want to replace 2 ADD insts with 1 LEA, and there's an attribute for that:
FeatureSlowLEA. But I suspect that doesn't go far enough or maybe it's not getting used when it should; I'm
also not sure if FeatureSlowLEA should also mean "slow complex addressing mode".
I see no perf differences on test-suite with this change running on AMD Jaguar, but I see small code size
improvements when building clang and the LLVM tools with the patched compiler.
A more general solution to the sext(add nsw(x, C)) problem that works for multiple targets is available
in CodeGenPrepare, but it may take quite a bit more work to get that to fire on all of the test cases that
this patch takes care of.
Differential Revision: http://reviews.llvm.org/D13757
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250560
91177308-0d34-0410-b5e6-
96231b3b80d8
Jim Grosbach [Fri, 16 Oct 2015 22:07:59 +0000 (22:07 +0000)]
MC: Don't crash after issuing a diagnostic.
Crashing is bad, m'kay? Fixing a 4 year old bug of my own creation.
Adding the testcase now which I should have added then which would have
long since caught this.
The problem is that printMessage() will display the diagnostic but not
set HadError to true, resulting in the assembler continuing on its way
and trying to create relocations for things that may not allow them or
otherwise get itself into trouble. Using the Error() helper function
here rather than calling printMessage() directly resolves this.
rdar://
23133240
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250557
91177308-0d34-0410-b5e6-
96231b3b80d8
Joseph Tremoulet [Fri, 16 Oct 2015 21:22:54 +0000 (21:22 +0000)]
[WinEH] Fix CatchRetSuccessorColorMap accounting
Summary:
We now use the block for the catchpad itself, rather than its normal
successor, as the funclet entry.
Putting the normal successor in the map leads downstream funclet
membership computations to erroneous results.
Reviewers: majnemer, rnk
Subscribers: rnk, llvm-commits
Differential Revision: http://reviews.llvm.org/D13798
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250552
91177308-0d34-0410-b5e6-
96231b3b80d8
Andrew Kaylor [Fri, 16 Oct 2015 20:39:20 +0000 (20:39 +0000)]
Fix assertion failure with fp128 to unsigned i64 conversion
Patch by Mitch Bodart
Differential Revision: http://reviews.llvm.org/D13780
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250550
91177308-0d34-0410-b5e6-
96231b3b80d8