keep track of what the current byte being emitted is
throughout the X86 encoder.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95771 91177308-0d34-0410-b5e6-96231b3b80d8

simplify displacement handling, emit displacements by-operand
even for the immediate case.  No functionality change.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95770 91177308-0d34-0410-b5e6-96231b3b80d8

Canonicalize sizeof and alignof on pointer types to a canonical
pointer type.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95769 91177308-0d34-0410-b5e6-96231b3b80d8

Implement operators |=, &=, and ^= for SmallBitVector, and remove the
restriction in BitVector for |= and ^= that the operand must be the
same length.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95768 91177308-0d34-0410-b5e6-96231b3b80d8

MC: Switch MCFixup to just hold an MCExpr pointer instead of index into the
MCInst it came from.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95767 91177308-0d34-0410-b5e6-96231b3b80d8

Fix a signed comparison warning.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95766 91177308-0d34-0410-b5e6-96231b3b80d8

Remove stray DOS newline.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95765 91177308-0d34-0410-b5e6-96231b3b80d8

Add a ReleaseNotes FIXME.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95764 91177308-0d34-0410-b5e6-96231b3b80d8

Prevented build on WINDOWS using default make system. Stopped WINDOWS build
at eh llvm/examples level using if check on LLVM_ON_UNIX.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95763 91177308-0d34-0410-b5e6-96231b3b80d8

Updated the enhanced disassembly library's TableGen
backend to not use exceptions at all except in cases
of actual error.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95762 91177308-0d34-0410-b5e6-96231b3b80d8

Prevented ExceptionDemo example being built on WINDOWS via if( NOT WIN32 )
check in examples cmake list file. This has NOT been tested.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95761 91177308-0d34-0410-b5e6-96231b3b80d8

Updated the TableGen emitter for the Enhanced
Disassembler to take advantage of the refactored
AsmWriterInst.h.  Note removed parser code.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95760 91177308-0d34-0410-b5e6-96231b3b80d8

Changed AsmWriterOperand to also include the index of the
operand into the CodeGenInstruction's list of operands,
which is useful for EDEmitter.  (Still working on PR6219)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95759 91177308-0d34-0410-b5e6-96231b3b80d8

Now that ShrinkDemandedOps() is separated out from DAG combine. It sometimes leave some obvious nops which dag combine used to clean up afterwards e.g. (trunk (ext n)) -> n. Look for them and squash them.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95757 91177308-0d34-0410-b5e6-96231b3b80d8

"fixup" a comment.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95754 91177308-0d34-0410-b5e6-96231b3b80d8

Introduce a new CodeGenInstruction::ConstraintInfo class
for representing constraint info semantically instead of
as a c expression that will be blatted out to the .inc
file.  Fix X86RecognizableInstr to use this instead of
parsing C code :).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95753 91177308-0d34-0410-b5e6-96231b3b80d8

llvm-mc: Remove --show-fixups and always show as part of --show-encoding.

Also, fix a silly memory leak.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95752 91177308-0d34-0410-b5e6-96231b3b80d8

Rewrite loop to suit Chris' preference.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95749 91177308-0d34-0410-b5e6-96231b3b80d8

fix a layering violation: VirtRegRewriter.cpp shouldn't use AsmPrinter.h.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95748 91177308-0d34-0410-b5e6-96231b3b80d8

Remove duplicated #include.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95747 91177308-0d34-0410-b5e6-96231b3b80d8

Emit an error for illegal inline asm constraint (which uses illegal type) rather than asserting.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95746 91177308-0d34-0410-b5e6-96231b3b80d8

fix missing #includes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95745 91177308-0d34-0410-b5e6-96231b3b80d8

daniel *really* likes fixups!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95742 91177308-0d34-0410-b5e6-96231b3b80d8

Stop MachineInstr.h from #including AsmPrinter.h

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95741 91177308-0d34-0410-b5e6-96231b3b80d8

Improve comments a even more.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95740 91177308-0d34-0410-b5e6-96231b3b80d8

Skip DBG_VALUE many places in live intervals and
register coalescing.  This fixes many crashes and
places where debug info affects codegen (when
dbg.value is lowered to machine instructions, which
it isn't yet in TOT).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95739 91177308-0d34-0410-b5e6-96231b3b80d8

Move verbose asm instruction comments to using MCStreamer.
The major win of this is that the code is simpler and they
print on the same line as the instruction again:

        movl    %eax, 96(%esp)          ## 4-byte Spill
        movl    96(%esp), %eax          ## 4-byte Reload
        cmpl    92(%esp), %eax          ## 4-byte Folded Reload
        jl      LBB7_86

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95738 91177308-0d34-0410-b5e6-96231b3b80d8

Improve comments a bit more.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95737 91177308-0d34-0410-b5e6-96231b3b80d8

more comment updates

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95736 91177308-0d34-0410-b5e6-96231b3b80d8

Add isDebug argument to ChangeToRegister; this prevents
the field from being used uninitialized later in some cases.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95735 91177308-0d34-0410-b5e6-96231b3b80d8

print all the newlines at the end of instructions with
OutStreamer.AddBlankLine instead of textually.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95734 91177308-0d34-0410-b5e6-96231b3b80d8

IntegerValType holds a uint32_t, so its constructor should take a uint32_t.  This allows it to be properly initialized with bit widths > 65535

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95731 91177308-0d34-0410-b5e6-96231b3b80d8

Fix comments to reflect renaming elsewhere.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95730 91177308-0d34-0410-b5e6-96231b3b80d8

Fix the encoding of the movntdqa X86 instruction.  It was missing the 0x66
prefix which is part of the opcode encoding.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95729 91177308-0d34-0410-b5e6-96231b3b80d8

Add ability for MCInstPrinters to add comments for instructions.
Enhance the x86 backend to show the hex values of immediates in
comments when they are large.  For example:

        movl    $1072693248, 4(%esp)    ## imm = 0x3FF00000

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95728 91177308-0d34-0410-b5e6-96231b3b80d8

TableGen fragment refactoring.

Move some utility TableGen defs, classes, etc. into a common file so
they may be used my multiple pattern files.  We will use this for
the AVX specification to help with the transition from the current
SSE specification.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95727 91177308-0d34-0410-b5e6-96231b3b80d8

Adds a JIT based exception handling example to the examples directory.
Both zero cost example domain specific, and C++ foreign exception handling are
shown. The example's documentation fully explains how to run the example.

Notes:

1)   The code uses an extremely simple type info model.
2)   Only a single landing pad is used per unwind edge
     (one call to llvm.eh.selector)
3)   llvm.eh.selector support for filter arguments is not given.
4)   llvm.eh.typeid.for is not used.
5)   Forced unwind behavior is not supported.
6)   Very little if any error handling is given.
7)   __attribute__((__aligned__)) is used.
8)   The code uses parts from the llvm compiler-rt project and
     the llvm Kaleidoscope example.
9)   The code has not been ported or tested on WINDOWS.
10)  The code was not tested with a cmake build.
11)  The code was tested for a debug build on 32bit X86 CentOS LINUX,
     and both a debug and release build on OS X 10.6.2 (64bit).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95723 91177308-0d34-0410-b5e6-96231b3b80d8

Fixed some indentation in the AsmWriterInst
implementation.  Also changed the constructor
so that it does not require a Record, making it
usable by the EDEmitter.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95715 91177308-0d34-0410-b5e6-96231b3b80d8

Add VBIF/VBIT for disassembly only.
A8.6.279

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95713 91177308-0d34-0410-b5e6-96231b3b80d8

Make --disable-libffi work on systems with libffi installed.  Also
make no-ffi the default even on systems with libffi.  This fixes
http://llvm.org/PR5018.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95712 91177308-0d34-0410-b5e6-96231b3b80d8

Only dump output in debug mode.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95711 91177308-0d34-0410-b5e6-96231b3b80d8

llvm-mc: Add --show-fixups option, for displaying the instruction fixup information in the asm comments.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95710 91177308-0d34-0410-b5e6-96231b3b80d8

MC/X86: Add a dummy implementation of MCFixup generation for hacky X86 MCCodeEmitter.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95709 91177308-0d34-0410-b5e6-96231b3b80d8

MC: First cut at MCFixup, for getting fixup/relocation information out of an MCCodeEmitter.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95708 91177308-0d34-0410-b5e6-96231b3b80d8

Improve comments in the LSDA somewhat. They can be improved much more.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95707 91177308-0d34-0410-b5e6-96231b3b80d8

Added VMRS/VMSR for disassembly only.
A8.6.335 & A8.6.336

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95703 91177308-0d34-0410-b5e6-96231b3b80d8

Added AsmWriterInst.cpp to the CMakeList so that
it builds OK on Visual Studio.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95702 91177308-0d34-0410-b5e6-96231b3b80d8

Disable unittests/ADT/BitVectorTest on PPC Darwin.
It fails with a release build only, for reasons
as yet unknown.  (If there's a better way to Xfail
things here let me know, doesn't seem to be any
prior art in unittests.)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95700 91177308-0d34-0410-b5e6-96231b3b80d8

port encoder enhancements over to the new encoder.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95699 91177308-0d34-0410-b5e6-96231b3b80d8

Per PR 6219, factored AsmWriterInst and AsmWriterOperand
out of the AsmWriterEmitter.  This patch does the physical
code movement, but leaves the implementation unchanged. I'll
make any changes necessary to generalize the code in a
separate patch.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95697 91177308-0d34-0410-b5e6-96231b3b80d8

fix X86 encoder to output [disp] only addresses with no SIB byte
in X86-32 mode.  This is still required in x86-64 mode to avoid
forming [disp+rip] encoding.  Rewrite the SIB byte decision logic
to be actually understandable.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95693 91177308-0d34-0410-b5e6-96231b3b80d8

Move Intrinsic::objectsize lowering back to InstCombineCalls and
enable constant 0 offset lowering.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95691 91177308-0d34-0410-b5e6-96231b3b80d8

revert r95689: getX86RegNum(BaseReg) != N86::ESP is
a confusing idiom to check for ESP or RSP.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95690 91177308-0d34-0410-b5e6-96231b3b80d8

simplify.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95689 91177308-0d34-0410-b5e6-96231b3b80d8

Re-disable for Darwin; I was mistaken to think this was fixed.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95688 91177308-0d34-0410-b5e6-96231b3b80d8

move target-independent opcodes out of TargetInstrInfo
into TargetOpcodes.h.  #include the new TargetOpcodes.h
into MachineInstr.  Add new inline accessors (like isPHI())
to MachineInstr, and start using them throughout the
codebase.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95687 91177308-0d34-0410-b5e6-96231b3b80d8

Radar 7417921

tMOVCCi pattern only valid for low registers, as the Thumb1 mov immediate to
register instruction only works with low registers. Allowing high registers
for the instruction resulted in the assembler choosing the wide (32-bit)
encoding for the mov, but LLVM though the instruction was only 16 bits wide,
so offset calculations for constant pools became incorrect, leading to
out of range constant pool entries.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95686 91177308-0d34-0410-b5e6-96231b3b80d8

Add support for TypeBuilder<const/volatile void*, false>.
Thanks to Jochen Wilhelmy for the suggestion!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95677 91177308-0d34-0410-b5e6-96231b3b80d8

Pull these back out, they're a little too aggressive and time
consuming for a simple optimization.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95671 91177308-0d34-0410-b5e6-96231b3b80d8

Oops.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95670 91177308-0d34-0410-b5e6-96231b3b80d8

Added vcvtb/vcvtt (between half-precision and single-precision, VFP).
For disassembly only.

A8.6.300

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95669 91177308-0d34-0410-b5e6-96231b3b80d8

Remember to update live-in lists when coalescing physregs.

Patch by M Wahab!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95668 91177308-0d34-0410-b5e6-96231b3b80d8

clang test suite

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95667 91177308-0d34-0410-b5e6-96231b3b80d8

Mention IndVarSimplify in the comment by getSmallConstantTripCount, as
is done for getTripCount.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95666 91177308-0d34-0410-b5e6-96231b3b80d8

Mention vAny and iPTRAny in a comment.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95665 91177308-0d34-0410-b5e6-96231b3b80d8

move tests that depend on the x86 backend out of codegen/generic,
and remove a few old and unreduced ones.  Fixes PR5624.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95656 91177308-0d34-0410-b5e6-96231b3b80d8

make target independent.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95655 91177308-0d34-0410-b5e6-96231b3b80d8

merge a target-specific add test into x86 directory.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95654 91177308-0d34-0410-b5e6-96231b3b80d8

merge another test in, drop the trivially constant folded cases.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95653 91177308-0d34-0410-b5e6-96231b3b80d8

consolidate and filecheckize two tests.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95652 91177308-0d34-0410-b5e6-96231b3b80d8

merge two tests, make target independent.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95651 91177308-0d34-0410-b5e6-96231b3b80d8

move PR3462 to here.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95650 91177308-0d34-0410-b5e6-96231b3b80d8

add a note from PR6194

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95649 91177308-0d34-0410-b5e6-96231b3b80d8

Skip DEBUG_VALUE in some places where it was affecting codegen.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95647 91177308-0d34-0410-b5e6-96231b3b80d8

Add declaration attribute to a variable DIE, if there is a separate DIE for the definition.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95646 91177308-0d34-0410-b5e6-96231b3b80d8

Updated the enhanced disassembly library to produce
whitespace tokens in the right places.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95645 91177308-0d34-0410-b5e6-96231b3b80d8

fix llvm_build_struct_gep for PR6167, patch by
Peter Hawkins!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95644 91177308-0d34-0410-b5e6-96231b3b80d8

simplify this code, duh.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95643 91177308-0d34-0410-b5e6-96231b3b80d8

fix PR6193, only considering sign extensions *from i1* for this
xform.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95642 91177308-0d34-0410-b5e6-96231b3b80d8

Add file in here too.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95641 91177308-0d34-0410-b5e6-96231b3b80d8

Fixed a problem where the enhanced disassembly
library was reporting inaccurate token IDs.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95639 91177308-0d34-0410-b5e6-96231b3b80d8

make -show-inst be formatted a bit nicer.  Before:

movl $3735928559, a          ## inst: <MCInst 1273 <MCOperand Reg:0> <MCOperand Imm:1> <MCOperand Reg:0> <MCOperand Expr:(a)> <MCOperand Reg:0> <MCOperand Expr:(3735928559)>>

after:

movl $3735928559, a          ## <MCInst #1273
                                        ##   <MCOperand Reg:0>
                                        ##   <MCOperand Imm:1>
                                        ##   <MCOperand Reg:0>
                                        ##   <MCOperand Expr:(a)>
                                        ##   <MCOperand Reg:0>
                                        ##   <MCOperand Expr:(3735928559)>>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95637 91177308-0d34-0410-b5e6-96231b3b80d8

Fixed a bug in the PBQP allocator's findCoalesces method.

Previously spill registers, whose def indexes are not defined, would sometimes be improperly marked as coalescable with conflicting registers. The new findCoalesces routine conservatively assumes that any register with at least one undefined def is not coalescable with any register it interferes with.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95636 91177308-0d34-0410-b5e6-96231b3b80d8

Implement x86 asm parsing support for %st and %st(4)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95634 91177308-0d34-0410-b5e6-96231b3b80d8

Added copy sensible construction & assignment to PBQP graphs and fixed a memory access bug in the heuristic solver.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95633 91177308-0d34-0410-b5e6-96231b3b80d8

Debug operands should not be def or kill.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95632 91177308-0d34-0410-b5e6-96231b3b80d8

Changed the definition of an "invalid" slot to include the empty & tombstone values, but not zero.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95631 91177308-0d34-0410-b5e6-96231b3b80d8

stop using reserved identifiers.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95630 91177308-0d34-0410-b5e6-96231b3b80d8

Add a new pass to do llvm.objsize lowering using SCEV.
Initial skeleton and SCEVUnknown lowering implemented,
the rest should come relatively quickly.  Move testcase
to new directory.

Move pass to right before SimplifyLibCalls - which is
moved down a bit so we can take advantage of a few opts.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95628 91177308-0d34-0410-b5e6-96231b3b80d8

pass stringref by value instead of by const&

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95627 91177308-0d34-0410-b5e6-96231b3b80d8

Add explicit keywords.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95626 91177308-0d34-0410-b5e6-96231b3b80d8

move PR6212 to this file.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95624 91177308-0d34-0410-b5e6-96231b3b80d8

enhance bits_storage to work with enums by using a c-style
cast instead of reinterpret_cast, fixing PR6243.  Apparently
reinterpret_cast and I aren't getting along today.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95622 91177308-0d34-0410-b5e6-96231b3b80d8

Implement AsmPrinter support for several more operators which have
direct MCExpr equivalents. Don't use MCExpr::Shr because it isn't
consistent between targets.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95620 91177308-0d34-0410-b5e6-96231b3b80d8

Document that MCExpr::Mod is actually remainder.

Document that MCExpr::Div, Mod, and the comparison operators are all
signed operators.

Document that the comparison operators' results are target-dependent.

Document that the behavior of shr is target-dependent.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95619 91177308-0d34-0410-b5e6-96231b3b80d8

fix some problems handling large vectors reported in PR6230

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95616 91177308-0d34-0410-b5e6-96231b3b80d8

this is done, tested by CodeGen/ARM/iabs.ll

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95609 91177308-0d34-0410-b5e6-96231b3b80d8

convert to filecheck.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95608 91177308-0d34-0410-b5e6-96231b3b80d8

Added header file declarations and .exports entries
for the new APIs offered by the enhanced disassembler
for inspecting operands.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95606 91177308-0d34-0410-b5e6-96231b3b80d8

test case for r95604.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95605 91177308-0d34-0410-b5e6-96231b3b80d8