Use a new tblgen feature to significantly shrinkify instruction definitions that
directly correspond to intrinsics.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27266 91177308-0d34-0410-b5e6-96231b3b80d8

Add a bunch of new instructions for intrinsics.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27265 91177308-0d34-0410-b5e6-96231b3b80d8

regenerate

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27264 91177308-0d34-0410-b5e6-96231b3b80d8

Implement Regression/TableGen/DagDefSubst.ll

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27263 91177308-0d34-0410-b5e6-96231b3b80d8

Dag operator should be able to be template params.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27262 91177308-0d34-0410-b5e6-96231b3b80d8

Fix Transforms/InstCombine/2006-03-30-ExtractElement.ll

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27261 91177308-0d34-0410-b5e6-96231b3b80d8

new testcase that crashes instcombine

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27260 91177308-0d34-0410-b5e6-96231b3b80d8

Make sure all possible shuffles are matched.
Use pshufd, pshuhw, and pshulw to shuffle v4f32 if shufps doesn't match.
Use shufps to shuffle v4f32 if pshufd, pshuhw, and pshulw don't match.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27259 91177308-0d34-0410-b5e6-96231b3b80d8

Add vector multiply, multiply sum, pack, unpack, and lvsl/lvsr intrinsics.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27258 91177308-0d34-0410-b5e6-96231b3b80d8

More logical ops patterns

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27257 91177308-0d34-0410-b5e6-96231b3b80d8

Add support for _mm_cmp{cc}_ss and _mm_cmp{cc}_ps intrinsics

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27256 91177308-0d34-0410-b5e6-96231b3b80d8

Add 128-bit pmovmskb intrinsic support.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27255 91177308-0d34-0410-b5e6-96231b3b80d8

Change SSE pack operation definitions to fit what the intrinsics expected.
For example, packsswb actually creates a v16i8 from a pair of v8i16. But since
the intrinsic specification forces the output type to match the operands.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27254 91177308-0d34-0410-b5e6-96231b3b80d8

Add SSE2 integer pack with saturation intrinsics.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27253 91177308-0d34-0410-b5e6-96231b3b80d8

- Added some SSE2 128-bit packed integer ops.
- Added SSE2 128-bit integer pack with signed saturation ops.
- Added pshufhw and pshuflw ops.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27252 91177308-0d34-0410-b5e6-96231b3b80d8

Add a pshufhw test case.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27251 91177308-0d34-0410-b5e6-96231b3b80d8

Need to special case splat after all. Make the second operand of splat
vector_shuffle undef.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27250 91177308-0d34-0410-b5e6-96231b3b80d8

Use unpcklpd for v2f64 splat.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27249 91177308-0d34-0410-b5e6-96231b3b80d8

Floating point logical operation patterns should match bit_convert. Or else
integer vector logical operations would match andp{s|d} instead of pand.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27248 91177308-0d34-0410-b5e6-96231b3b80d8

Add more SSE intrinsics

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27247 91177308-0d34-0410-b5e6-96231b3b80d8

- More shuffle related bug fixes.
- Whenever possible use ops of the right packed types for vector shuffles /
  splats.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27246 91177308-0d34-0410-b5e6-96231b3b80d8

Another entry about shuffles.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27245 91177308-0d34-0410-b5e6-96231b3b80d8

- Only use pshufd for v4i32 vector shuffles.
- Other shuffle related fixes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27244 91177308-0d34-0410-b5e6-96231b3b80d8

add a note

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27243 91177308-0d34-0410-b5e6-96231b3b80d8

new testcase

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27242 91177308-0d34-0410-b5e6-96231b3b80d8

Bug fixes: handle constantexpr insert/extract element operations
Handle constantpacked vectors with constantexpr elements.

This fixes CodeGen/Generic/vector-constantexpr.ll

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27241 91177308-0d34-0410-b5e6-96231b3b80d8

Added aliases to scalar SSE instructions, e.g. addss, to match x86 intrinsics.
The source operands type are v4sf with upper bits passes through.
Added matching code for these.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27240 91177308-0d34-0410-b5e6-96231b3b80d8

Fixing buggy code.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27239 91177308-0d34-0410-b5e6-96231b3b80d8

Don't sort the names before outputing the intrinsic name table. It causes a
mismatch against the enum table.
This is a part of Sabre's master plan to drive me nuts with subtle bugs that
happens to only affect x86 be. :-)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27237 91177308-0d34-0410-b5e6-96231b3b80d8

When building a VVECTOR_SHUFFLE node from extract_element operations, make
sure to build it as SHUFFLE(X, undef, mask), not SHUFFLE(X, X, mask).

The later is not canonical form, and prevents the PPC splat pattern from
matching.  For a particular splat, we go from generating this:

li r10, lo16(LCPI1_0)
lis r11, ha16(LCPI1_0)
lvx v3, r11, r10
vperm v3, v2, v2, v3

to generating:

vspltw v3, v2, 3

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27236 91177308-0d34-0410-b5e6-96231b3b80d8

Canonicalize VECTOR_SHUFFLE(X, X, Y) -> VECTOR_SHUFFLE(X,undef,Y')

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27235 91177308-0d34-0410-b5e6-96231b3b80d8

new testcase

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27234 91177308-0d34-0410-b5e6-96231b3b80d8

Turn a series of extract_element's feeding a build_vector into a
vector_shuffle node.  For this:

void test(__m128 *res, __m128 *A, __m128 *B) {
  *res = _mm_unpacklo_ps(*A, *B);
}

we now produce this code:

_test:
        movl 8(%esp), %eax
        movaps (%eax), %xmm0
        movl 12(%esp), %eax
        unpcklps (%eax), %xmm0
        movl 4(%esp), %eax
        movaps %xmm0, (%eax)
        ret

instead of this:

_test:
        subl $76, %esp
        movl 88(%esp), %eax
        movaps (%eax), %xmm0
        movaps %xmm0, (%esp)
        movaps %xmm0, 32(%esp)
        movss 4(%esp), %xmm0
        movss 32(%esp), %xmm1
        unpcklps %xmm0, %xmm1
        movl 84(%esp), %eax
        movaps (%eax), %xmm0
        movaps %xmm0, 16(%esp)
        movaps %xmm0, 48(%esp)
        movss 20(%esp), %xmm0
        movss 48(%esp), %xmm2
        unpcklps %xmm0, %xmm2
        unpcklps %xmm1, %xmm2
        movl 80(%esp), %eax
        movaps %xmm2, (%eax)
        addl $76, %esp
        ret

GCC produces this (with -fomit-frame-pointer):

_test:
        subl    $12, %esp
        movl    20(%esp), %eax
        movaps  (%eax), %xmm0
        movl    24(%esp), %eax
        unpcklps        (%eax), %xmm0
        movl    16(%esp), %eax
        movaps  %xmm0, (%eax)
        addl    $12, %esp
        ret

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27233 91177308-0d34-0410-b5e6-96231b3b80d8

Teach Legalize how to pack VVECTOR_SHUFFLE nodes into VECTOR_SHUFFLE nodes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27232 91177308-0d34-0410-b5e6-96231b3b80d8

new node

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27231 91177308-0d34-0410-b5e6-96231b3b80d8

Add a new node

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27230 91177308-0d34-0410-b5e6-96231b3b80d8

Don't crash on X^X if X is a vector.  Instead, produce a vector of zeros.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27229 91177308-0d34-0410-b5e6-96231b3b80d8

Add an assertion

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27228 91177308-0d34-0410-b5e6-96231b3b80d8

add a note

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27227 91177308-0d34-0410-b5e6-96231b3b80d8

Refactor address attributes.  Add base register to frame info.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27226 91177308-0d34-0410-b5e6-96231b3b80d8

Expose base register for DwarfWriter.  Refactor code accordingly.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27225 91177308-0d34-0410-b5e6-96231b3b80d8

More bulletproofing of llvm.dbg.declare.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27224 91177308-0d34-0410-b5e6-96231b3b80d8

Added missing paren on behalf of Ramana Radhakrishnan.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27223 91177308-0d34-0410-b5e6-96231b3b80d8

Missed X86::isUNPCKHMask

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27222 91177308-0d34-0410-b5e6-96231b3b80d8

movlps and movlpd should be modeled as two address code.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27221 91177308-0d34-0410-b5e6-96231b3b80d8

Update

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27220 91177308-0d34-0410-b5e6-96231b3b80d8

Typo

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27219 91177308-0d34-0410-b5e6-96231b3b80d8

* Prefer using operation of matching types. e.g unpcklpd rather than movlhps.
* Bug fixes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27218 91177308-0d34-0410-b5e6-96231b3b80d8

Use movhpd is even better than movlhps.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27217 91177308-0d34-0410-b5e6-96231b3b80d8

Fix a couple typos

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27216 91177308-0d34-0410-b5e6-96231b3b80d8

Add a few more altivec intrinsics

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27215 91177308-0d34-0410-b5e6-96231b3b80d8

Keep Visual Studio informed.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27214 91177308-0d34-0410-b5e6-96231b3b80d8

These don't directly map to gcc intrinsics any more.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27213 91177308-0d34-0410-b5e6-96231b3b80d8

Added a couple of entries about movhps and movlhps.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27212 91177308-0d34-0410-b5e6-96231b3b80d8

All unpack cases are now being handled.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27211 91177308-0d34-0410-b5e6-96231b3b80d8

- Clean up / consoladate various shuffle masks.
- Some misc. bug fixes.
- Use MOVHPDrm to load from m64 to upper half of a XMM register.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27210 91177308-0d34-0410-b5e6-96231b3b80d8

implement a bunch more intrinsics.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27209 91177308-0d34-0410-b5e6-96231b3b80d8

Add some more intrinsics: rotates, fp rounds, and random other fp instructions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27208 91177308-0d34-0410-b5e6-96231b3b80d8

getVectorTyppe(MVT::i64, 2) ==> MVT::v2i64.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27207 91177308-0d34-0410-b5e6-96231b3b80d8

Add lvxl

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27206 91177308-0d34-0410-b5e6-96231b3b80d8

Use normal lvx for scalar_to_vector instead of lve*x.  They do the exact
same thing and we have a dag node for the former.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27205 91177308-0d34-0410-b5e6-96231b3b80d8

Regression test for the handling of nulls as arguments to debug intrinsics.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27204 91177308-0d34-0410-b5e6-96231b3b80d8

More bulletproofing of DebugInfoDesc verify.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27203 91177308-0d34-0410-b5e6-96231b3b80d8

Tblgen doesn't like multiple SDNode<> definitions that map to the sameenum value.  Split them into separate enums.

Also, don't emit dynamic checks when we can compute them statically

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27202 91177308-0d34-0410-b5e6-96231b3b80d8

Tblgen doesn't like multiple SDNode<> definitions that map to the sameenum value.  Split them into separate enums.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27201 91177308-0d34-0410-b5e6-96231b3b80d8

Model unpack lower and interleave as vector_shuffle so we can lower the
intrinsics as such.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27200 91177308-0d34-0410-b5e6-96231b3b80d8

Tblgen doesn't like multiple SDNode<> definitions that map to the same
enum value.  Split them into separate enums.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27199 91177308-0d34-0410-b5e6-96231b3b80d8

Reenable pointer intrinsics.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27198 91177308-0d34-0410-b5e6-96231b3b80d8

Only compute intrinsic valuetypes when in a target .td file.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27197 91177308-0d34-0410-b5e6-96231b3b80d8

revert this, it breaks things.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27196 91177308-0d34-0410-b5e6-96231b3b80d8

revert this, it breaks things

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27195 91177308-0d34-0410-b5e6-96231b3b80d8

If adding a link to a collapsed, node, ignore offset.
Fixes 2006-03-27-LinkedCollapsed.ll

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27194 91177308-0d34-0410-b5e6-96231b3b80d8

Adding links to a node collapsed during type merging crashes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27193 91177308-0d34-0410-b5e6-96231b3b80d8

Reactivate llvm.dbg.declare.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27192 91177308-0d34-0410-b5e6-96231b3b80d8

Should not remove casts from variable's alloca.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27191 91177308-0d34-0410-b5e6-96231b3b80d8

Add support for intrinsics with pointer arguments in target .td files.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27190 91177308-0d34-0410-b5e6-96231b3b80d8

Add some missing template specializations for autodereferencing User.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27189 91177308-0d34-0410-b5e6-96231b3b80d8

Add support for decoding iPTR to the right pointer type.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27188 91177308-0d34-0410-b5e6-96231b3b80d8

add a new iPTR ValueType for tblgen use

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27187 91177308-0d34-0410-b5e6-96231b3b80d8

Divirge from the GCC specification of the load/store intrinsics: only take
one pointer operand, instead of a pointer and an offset.  The FE will lower
to this canonicalized form.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27186 91177308-0d34-0410-b5e6-96231b3b80d8

Print error messages like this:
tblgen: In STVEBX: Intrinsic 'llvm.ppc.altivec.stvebx' expects 3 operands, not 2 operands!

instead of like this:
tblgen: In STVEBX: Intrinsic 'intrinsic_void expects 3 operands, not 2 operands!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27185 91177308-0d34-0410-b5e6-96231b3b80d8

fix spelling :(

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27184 91177308-0d34-0410-b5e6-96231b3b80d8

add some more intrinsics.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27183 91177308-0d34-0410-b5e6-96231b3b80d8

Disable dbg_declare, it currently breaks the CFE build

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27182 91177308-0d34-0410-b5e6-96231b3b80d8

Fix legalization of intrinsics with chain and result values

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27181 91177308-0d34-0410-b5e6-96231b3b80d8

Translate llvm target registers to dwarf register numbers properly.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27180 91177308-0d34-0410-b5e6-96231b3b80d8

Misunderstanding.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27179 91177308-0d34-0410-b5e6-96231b3b80d8

Typo.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27178 91177308-0d34-0410-b5e6-96231b3b80d8

Clarity.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27177 91177308-0d34-0410-b5e6-96231b3b80d8

Adding other platforms.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27176 91177308-0d34-0410-b5e6-96231b3b80d8

Add note for Mac OS X developers.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27175 91177308-0d34-0410-b5e6-96231b3b80d8

unbreak the build

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27174 91177308-0d34-0410-b5e6-96231b3b80d8

Unbreak the build on non-apple compilers :-(

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27173 91177308-0d34-0410-b5e6-96231b3b80d8

Intrinsics naming convention change.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27172 91177308-0d34-0410-b5e6-96231b3b80d8

Try again

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27171 91177308-0d34-0410-b5e6-96231b3b80d8

Add a bunch of notes from my journey thus far.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27170 91177308-0d34-0410-b5e6-96231b3b80d8

Incorrect check for FP all one's

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27169 91177308-0d34-0410-b5e6-96231b3b80d8

Split out altivec notes into their own README

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27168 91177308-0d34-0410-b5e6-96231b3b80d8

Use pcmpeq to generate vector of all ones.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27167 91177308-0d34-0410-b5e6-96231b3b80d8

Changed isBuildVectorAllOnesInteger to isBuildVectorAllOnes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27166 91177308-0d34-0410-b5e6-96231b3b80d8