Jim Grosbach [Fri, 11 Mar 2011 23:15:02 +0000 (23:15 +0000)]
Remove dead code. These ARM instruction definitions no longer exist.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127509
91177308-0d34-0410-b5e6-
96231b3b80d8
Jim Grosbach [Fri, 11 Mar 2011 23:11:41 +0000 (23:11 +0000)]
Remove dead code. These ARM instruction definitions no longer exist.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127508
91177308-0d34-0410-b5e6-
96231b3b80d8
Jim Grosbach [Fri, 11 Mar 2011 23:09:50 +0000 (23:09 +0000)]
Pseudo-ize VMOVDcc and VMOVScc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127506
91177308-0d34-0410-b5e6-
96231b3b80d8
Jim Grosbach [Fri, 11 Mar 2011 23:00:16 +0000 (23:00 +0000)]
80 columns
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127505
91177308-0d34-0410-b5e6-
96231b3b80d8
Jim Grosbach [Fri, 11 Mar 2011 22:51:41 +0000 (22:51 +0000)]
Properly pseudo-ize the ARM LDMIA_RET instruction. This has the nice side-
effect that we get proper instruction printing using the "pop" mnemonic for it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127502
91177308-0d34-0410-b5e6-
96231b3b80d8
Cameron Zwarich [Fri, 11 Mar 2011 21:52:04 +0000 (21:52 +0000)]
Roll r127459 back in:
Optimize trivial branches in CodeGenPrepare, which often get created from the
lowering of objectsize intrinsics. Unfortunately, a number of tests were relying
on llc not optimizing trivial branches, so I had to add an option to allow them
to continue to test what they originally tested.
This fixes <rdar://problem/
8785296> and <rdar://problem/
9112893>.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127498
91177308-0d34-0410-b5e6-
96231b3b80d8
Cameron Zwarich [Fri, 11 Mar 2011 21:51:56 +0000 (21:51 +0000)]
Fix the GCC test suite issue exposed by r127477, which was caused by stack
protector insertion not working correctly with unreachable code. Since that
revision was rolled out, this test doesn't actual fail before this fix.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127497
91177308-0d34-0410-b5e6-
96231b3b80d8
Owen Anderson [Fri, 11 Mar 2011 21:33:55 +0000 (21:33 +0000)]
Teach FastISel to support register-immediate-immediate instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127496
91177308-0d34-0410-b5e6-
96231b3b80d8
Jim Grosbach [Fri, 11 Mar 2011 21:02:27 +0000 (21:02 +0000)]
80 columns.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127495
91177308-0d34-0410-b5e6-
96231b3b80d8
Jim Grosbach [Fri, 11 Mar 2011 20:59:19 +0000 (20:59 +0000)]
Trailing whitespace.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127493
91177308-0d34-0410-b5e6-
96231b3b80d8
Jim Grosbach [Fri, 11 Mar 2011 20:51:07 +0000 (20:51 +0000)]
Remove dead code. These ARM instruction definitions don't exist.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127491
91177308-0d34-0410-b5e6-
96231b3b80d8
Jim Grosbach [Fri, 11 Mar 2011 20:44:08 +0000 (20:44 +0000)]
ARM VDUPfd and VDUPfq can just be patterns. The instruction is the same
as for VDUP32d and VDUP32q, respectively.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127489
91177308-0d34-0410-b5e6-
96231b3b80d8
Jim Grosbach [Fri, 11 Mar 2011 20:38:18 +0000 (20:38 +0000)]
Remove dead code. These ARM instruction definitions don't exist.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127488
91177308-0d34-0410-b5e6-
96231b3b80d8
Jim Grosbach [Fri, 11 Mar 2011 20:31:17 +0000 (20:31 +0000)]
ARM VDUPLNfq and VDUPLNfd definitions can just be Pat<>s for VDUPLN32q
and VDUPLN32d, respectively.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127486
91177308-0d34-0410-b5e6-
96231b3b80d8
Jim Grosbach [Fri, 11 Mar 2011 20:18:05 +0000 (20:18 +0000)]
ARM VREV64df and VREV64qf can just be patterns. The instruction is the same
as for VREV64d32 and VREV64q32, respectively.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127485
91177308-0d34-0410-b5e6-
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Jim Grosbach [Fri, 11 Mar 2011 20:07:37 +0000 (20:07 +0000)]
This FIXME has been fixed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127483
91177308-0d34-0410-b5e6-
96231b3b80d8
Jim Grosbach [Fri, 11 Mar 2011 19:55:55 +0000 (19:55 +0000)]
Properly pseudo-ize ARM MVNCCi.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127482
91177308-0d34-0410-b5e6-
96231b3b80d8
Jim Grosbach [Fri, 11 Mar 2011 19:52:52 +0000 (19:52 +0000)]
Add missing 'return on failure'. Previously we'd crash after emitting
the diagnostic.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127480
91177308-0d34-0410-b5e6-
96231b3b80d8
Jan Sjödin [Fri, 11 Mar 2011 19:37:02 +0000 (19:37 +0000)]
Remove optimization emitting a reference insted of label difference, since it can create more relocations. Removed isBaseAddressKnownZero method, because it is no longer used.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127478
91177308-0d34-0410-b5e6-
96231b3b80d8
Daniel Dunbar [Fri, 11 Mar 2011 19:30:30 +0000 (19:30 +0000)]
Revert r127459, "Optimize trivial branches in CodeGenPrepare, which often get
created from the", it broke some GCC test suite tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127477
91177308-0d34-0410-b5e6-
96231b3b80d8
Oscar Fuentes [Fri, 11 Mar 2011 18:27:13 +0000 (18:27 +0000)]
Force re-linking of LLVMgold.so when its exports file changes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127473
91177308-0d34-0410-b5e6-
96231b3b80d8
Oscar Fuentes [Fri, 11 Mar 2011 18:07:46 +0000 (18:07 +0000)]
Fix processing of gold.exports.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127471
91177308-0d34-0410-b5e6-
96231b3b80d8
Devang Patel [Fri, 11 Mar 2011 18:07:33 +0000 (18:07 +0000)]
While printing annotations, print line number and variable name if debug info is present.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127470
91177308-0d34-0410-b5e6-
96231b3b80d8
Jim Grosbach [Fri, 11 Mar 2011 18:00:42 +0000 (18:00 +0000)]
Fix MOVCCi32imm to be have ARM-mode Requires and a proper size (8 bytes, was 4).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127469
91177308-0d34-0410-b5e6-
96231b3b80d8
Andrew Trick [Fri, 11 Mar 2011 17:46:59 +0000 (17:46 +0000)]
Replace -dag-chain-limit flag with constant. It has survived a release cycle without being touched, so no longer needs to pollute the hidden-help text.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127468
91177308-0d34-0410-b5e6-
96231b3b80d8
Oscar Fuentes [Fri, 11 Mar 2011 15:44:24 +0000 (15:44 +0000)]
Add LTO and gold plugin to the CMake build. Linux-only, support for
other systems pending.
PR9456.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127466
91177308-0d34-0410-b5e6-
96231b3b80d8
Benjamin Kramer [Fri, 11 Mar 2011 14:46:49 +0000 (14:46 +0000)]
ComputeMaskedBits: sub falls through to add, and sub doesn't have the same overflow semantics as add.
Should fix the selfhost failures that started with r127463.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127465
91177308-0d34-0410-b5e6-
96231b3b80d8
Benjamin Kramer [Fri, 11 Mar 2011 11:37:40 +0000 (11:37 +0000)]
InstCombine: Fix a thinko where transform an icmp under the assumption that it's a zero comparison when it's not.
Fixes PR9454.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127464
91177308-0d34-0410-b5e6-
96231b3b80d8
Nick Lewycky [Fri, 11 Mar 2011 09:00:19 +0000 (09:00 +0000)]
Teach ComputeMaskedBits about nsw on add. I don't think there's anything we can
do with nuw here, but sub and mul should be given similar treatment.
Fixes PR9343 #15!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127463
91177308-0d34-0410-b5e6-
96231b3b80d8
John Wiegley [Fri, 11 Mar 2011 08:54:34 +0000 (08:54 +0000)]
Fix use of CompEnd predicate to be standards conforming
The existing CompEnd predicate does not define a strict weak order as required
by the C++03 standard; therefore, its use as a predicate to std::upper_bound
is invalid. For a discussion of this issue, see
http://www.open-std.org/jtc1/sc22/wg21/docs/lwg-defects.html#270
This patch replaces the asymmetrical comparison with an iterator adaptor that
achieves the same effect while being strictly standard-conforming by ensuring
an apples-to-apples comparison.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127462
91177308-0d34-0410-b5e6-
96231b3b80d8
Cameron Zwarich [Fri, 11 Mar 2011 04:54:27 +0000 (04:54 +0000)]
Optimize trivial branches in CodeGenPrepare, which often get created from the
lowering of objectsize intrinsics. Unfortunately, a number of tests were relying
on llc not optimizing trivial branches, so I had to add an option to allow them
to continue to test what they originally tested.
This fixes <rdar://problem/
8785296> and <rdar://problem/
9112893>.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127459
91177308-0d34-0410-b5e6-
96231b3b80d8
Jim Grosbach [Fri, 11 Mar 2011 02:19:02 +0000 (02:19 +0000)]
Teach TableGen to pre-calculate register enum values when creating the
CodeGenRegister entries. Use this information to more intelligently build
the literal register entires in the DAGISel matcher table. Specifically,
use a single-byte OPC_EmitRegister entry for registers with a value of
less than 256 and OPC_EmitRegister2 entry for registers with a larger value.
rdar://
9066491
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127456
91177308-0d34-0410-b5e6-
96231b3b80d8
Chris Lattner [Fri, 11 Mar 2011 02:12:51 +0000 (02:12 +0000)]
silence a conditional assignment -Wuninitialized warning.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127453
91177308-0d34-0410-b5e6-
96231b3b80d8
Jim Grosbach [Fri, 11 Mar 2011 01:33:54 +0000 (01:33 +0000)]
Make the register enum value part of the CodeGenRegister struct.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127448
91177308-0d34-0410-b5e6-
96231b3b80d8
Jim Grosbach [Fri, 11 Mar 2011 01:27:24 +0000 (01:27 +0000)]
Trailing whitespace.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127447
91177308-0d34-0410-b5e6-
96231b3b80d8
Jim Grosbach [Fri, 11 Mar 2011 01:19:05 +0000 (01:19 +0000)]
Trailing whitespace.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127446
91177308-0d34-0410-b5e6-
96231b3b80d8
Jim Grosbach [Fri, 11 Mar 2011 01:16:49 +0000 (01:16 +0000)]
Tidy up since ARM MOVCCi and MOVCCi16 are now pseudos.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127445
91177308-0d34-0410-b5e6-
96231b3b80d8
Jim Grosbach [Fri, 11 Mar 2011 01:09:28 +0000 (01:09 +0000)]
Properly pseudo-ize ARM MOVCCi and MOVCCi16.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127442
91177308-0d34-0410-b5e6-
96231b3b80d8
Eric Christopher [Fri, 11 Mar 2011 01:05:58 +0000 (01:05 +0000)]
Change the x86 32-bit scheduler to register pressure and fix up the
corresponding testcases back to the previous versions.
Fixes some performance regressions only seen on 32-bit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127441
91177308-0d34-0410-b5e6-
96231b3b80d8
Evan Cheng [Fri, 11 Mar 2011 00:48:56 +0000 (00:48 +0000)]
Avoid replacing the value of a directly stored load with the stored value if the load is indexed. rdar://
9117613.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127440
91177308-0d34-0410-b5e6-
96231b3b80d8
Jim Grosbach [Thu, 10 Mar 2011 23:56:09 +0000 (23:56 +0000)]
Properly pseudo-ize MOVCCr and MOVCCs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127434
91177308-0d34-0410-b5e6-
96231b3b80d8
Dan Gohman [Thu, 10 Mar 2011 20:57:44 +0000 (20:57 +0000)]
RecursivelyDeleteTriviallyDeadInstructions only needs a
Value, not an Instruction, so casting is not necessary. Also,
it's theoretically possible that the Value is not an
Instruction, since WeakVH follows RAUWs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127427
91177308-0d34-0410-b5e6-
96231b3b80d8
Rafael Espindola [Thu, 10 Mar 2011 20:54:07 +0000 (20:54 +0000)]
Don't compute the file size if we don't need to.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127426
91177308-0d34-0410-b5e6-
96231b3b80d8
Dan Gohman [Thu, 10 Mar 2011 19:51:54 +0000 (19:51 +0000)]
Fix reassociate to postpone certain instruction deletions until
after it has finished all of its reassociations, because its
habit of unlinking operands and holding them in a datastructure
while working means that it's not easy to determine when an
instruction is really dead until after all its regular work is
done. rdar://
9096268.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127424
91177308-0d34-0410-b5e6-
96231b3b80d8
Jim Grosbach [Thu, 10 Mar 2011 19:27:17 +0000 (19:27 +0000)]
DMB can just be a pat referencing MCR.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127423
91177308-0d34-0410-b5e6-
96231b3b80d8
Jim Grosbach [Thu, 10 Mar 2011 19:21:08 +0000 (19:21 +0000)]
Reorganize a bit. No functional change, just moving patterns up.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127422
91177308-0d34-0410-b5e6-
96231b3b80d8
Jim Grosbach [Thu, 10 Mar 2011 19:06:39 +0000 (19:06 +0000)]
Pseudo-instructions are codegenonly by definition.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127420
91177308-0d34-0410-b5e6-
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Jim Grosbach [Thu, 10 Mar 2011 19:05:48 +0000 (19:05 +0000)]
Memory barrier instructions don't need special handling in tblgen anymore.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127419
91177308-0d34-0410-b5e6-
96231b3b80d8
Benjamin Kramer [Thu, 10 Mar 2011 18:40:14 +0000 (18:40 +0000)]
InstCombine: Turn umul_with_overflow into mul nuw if we can prove that it cannot overflow.
This happens a lot in clang-compiled C++ code because it adds overflow checks to operator new[]:
unsigned *foo(unsigned n) { return new unsigned[n]; }
We can optimize away the overflow check on 64 bit targets because (uint64_t)n*4 cannot overflow.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127418
91177308-0d34-0410-b5e6-
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Rafael Espindola [Thu, 10 Mar 2011 18:33:29 +0000 (18:33 +0000)]
Add r127409 back now that the windows file was updated.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127417
91177308-0d34-0410-b5e6-
96231b3b80d8
Rafael Espindola [Thu, 10 Mar 2011 18:30:48 +0000 (18:30 +0000)]
Try to fix the windows build.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127416
91177308-0d34-0410-b5e6-
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Jakob Stoklund Olesen [Thu, 10 Mar 2011 18:01:43 +0000 (18:01 +0000)]
Revert r127409 which broke all the Windows bots.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127413
91177308-0d34-0410-b5e6-
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Justin Holewinski [Thu, 10 Mar 2011 16:57:18 +0000 (16:57 +0000)]
PTX: Add preliminary support for floating-point divide and multiply-and-add
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127410
91177308-0d34-0410-b5e6-
96231b3b80d8
Rafael Espindola [Thu, 10 Mar 2011 16:10:30 +0000 (16:10 +0000)]
Add support for MemoryBuffers that are not null terminated and add
support for creating buffers that cover only a part of a file.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127409
91177308-0d34-0410-b5e6-
96231b3b80d8
Chris Lattner [Thu, 10 Mar 2011 07:43:44 +0000 (07:43 +0000)]
rip out llvm 2.8 release notes to make room for llvm 2.9 notes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127399
91177308-0d34-0410-b5e6-
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Cameron Zwarich [Thu, 10 Mar 2011 05:59:17 +0000 (05:59 +0000)]
Add an option to disable critical edge splitting in PHIElimination.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127398
91177308-0d34-0410-b5e6-
96231b3b80d8
Che-Liang Chiou [Thu, 10 Mar 2011 04:05:57 +0000 (04:05 +0000)]
ptx: add the rest of special registers of ISA version 2.0
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127397
91177308-0d34-0410-b5e6-
96231b3b80d8
Jakob Stoklund Olesen [Thu, 10 Mar 2011 01:51:42 +0000 (01:51 +0000)]
Change the Spiller interface to take a LiveRangeEdit reference.
This makes it possible to register delegates and get callbacks when the spiller
edits live ranges.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127389
91177308-0d34-0410-b5e6-
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Jakob Stoklund Olesen [Thu, 10 Mar 2011 01:21:58 +0000 (01:21 +0000)]
Make SpillIs an optional pointer. Avoid creating a bunch of temporary SmallVectors.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127388
91177308-0d34-0410-b5e6-
96231b3b80d8
Francois Pichet [Thu, 10 Mar 2011 00:51:01 +0000 (00:51 +0000)]
Unbreak the CMake build.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127383
91177308-0d34-0410-b5e6-
96231b3b80d8
Stuart Hastings [Thu, 10 Mar 2011 00:25:53 +0000 (00:25 +0000)]
Revert 127359; it broke lencod.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127382
91177308-0d34-0410-b5e6-
96231b3b80d8
Devang Patel [Thu, 10 Mar 2011 00:21:25 +0000 (00:21 +0000)]
Introduce DebugInfoProbe. This is used to monitor how llvm optimizer is treating debugging information.
It generates output that lools like
8 times line number info lost by Scalar Replacement of Aggregates (SSAUp)
1 times line number info lost by Simplify well-known library calls
12 times variable info lost by Jump Threading
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127381
91177308-0d34-0410-b5e6-
96231b3b80d8
Evan Cheng [Thu, 10 Mar 2011 00:16:32 +0000 (00:16 +0000)]
Re-commit 127368 and 127371. They are exonerated.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127380
91177308-0d34-0410-b5e6-
96231b3b80d8
Evan Cheng [Wed, 9 Mar 2011 23:53:17 +0000 (23:53 +0000)]
Revert 127368 and 127371 for now.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127376
91177308-0d34-0410-b5e6-
96231b3b80d8
Evan Cheng [Wed, 9 Mar 2011 23:15:40 +0000 (23:15 +0000)]
Restore the default implementation of getCrossCopyRegClass: no need for cross-regclass copies.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127371
91177308-0d34-0410-b5e6-
96231b3b80d8
Daniel Dunbar [Wed, 9 Mar 2011 22:48:46 +0000 (22:48 +0000)]
Revert "Re-enable test and hope to silence the buildbots", still broken.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127369
91177308-0d34-0410-b5e6-
96231b3b80d8
Evan Cheng [Wed, 9 Mar 2011 22:47:38 +0000 (22:47 +0000)]
Change the definition of TargetRegisterInfo::getCrossCopyRegClass to be more
flexible.
If it returns a register class that's different from the input, then that's the
register class used for cross-register class copies.
If it returns a register class that's the same as the input, then no cross-
register class copies are needed (normal copies would do).
If it returns null, then it's not at all possible to copy registers of the
specified register class.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127368
91177308-0d34-0410-b5e6-
96231b3b80d8
Benjamin Kramer [Wed, 9 Mar 2011 22:07:31 +0000 (22:07 +0000)]
Fix mistyped CHECK lines.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127366
91177308-0d34-0410-b5e6-
96231b3b80d8
Benjamin Kramer [Wed, 9 Mar 2011 22:07:13 +0000 (22:07 +0000)]
Fix a pasto that broke all x86_64-elf targets.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127365
91177308-0d34-0410-b5e6-
96231b3b80d8
Stuart Hastings [Wed, 9 Mar 2011 21:35:10 +0000 (21:35 +0000)]
Tweak test to work on Linux.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127364
91177308-0d34-0410-b5e6-
96231b3b80d8
Stuart Hastings [Wed, 9 Mar 2011 21:33:47 +0000 (21:33 +0000)]
Disable this test temporarily to reduce BuildBot complaints.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127363
91177308-0d34-0410-b5e6-
96231b3b80d8
Devang Patel [Wed, 9 Mar 2011 21:27:52 +0000 (21:27 +0000)]
Preserve line number information while simplifying libcalls.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127362
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Stuart Hastings [Wed, 9 Mar 2011 21:10:30 +0000 (21:10 +0000)]
X86 byval copies no longer always_inline. <rdar://problem/
8706628>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127359
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Bruno Cardoso Lopes [Wed, 9 Mar 2011 21:05:32 +0000 (21:05 +0000)]
Add a testcase for the addc improvements introduced some commits ago. Patch by Akira Hatanaka
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127358
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Bruno Cardoso Lopes [Wed, 9 Mar 2011 21:00:16 +0000 (21:00 +0000)]
Re-enable test and hope to silence the buildbots
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127357
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Bruno Cardoso Lopes [Wed, 9 Mar 2011 20:59:05 +0000 (20:59 +0000)]
try to make o32 cc tests less specific to silence some buildbots. The test isn't enabled yet, this is will be done in a subsequent commit. Patch by Akira Hatanaka.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127356
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Johnny Chen [Wed, 9 Mar 2011 20:01:14 +0000 (20:01 +0000)]
LLVM combines the offset mode of A8.6.199 A1 & A2 into STRBT.
The insufficient encoding information of the combined instruction confuses the decoder wrt
UQADD16. Add extra logic to recover from that.
Fixed an assert reported by Sean Callanan
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127354
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Eric Christopher [Wed, 9 Mar 2011 19:46:51 +0000 (19:46 +0000)]
Make these options hidden to reduce the amount of text -help puts on the
command line, they'll still be seen with -help-hidden.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127353
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Devang Patel [Wed, 9 Mar 2011 19:41:33 +0000 (19:41 +0000)]
These llvm.dbg.* constants are not used anymore.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127352
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Jakob Stoklund Olesen [Wed, 9 Mar 2011 19:27:06 +0000 (19:27 +0000)]
Make physreg coalescing independent on the number of uses of the virtual register.
The damage done by physreg coalescing only depends on the number of instructions
the extended physreg live range covers. This fixes PR9438.
The heuristic is still luck-based, and physreg coalescing really should be
disabled completely. We need a register allocator with better hinting support
before that is possible.
Convert a test to FileCheck and force spilling by inserting an extra call. The
previous spilling behavior was dependent on misguided physreg coalescing
decisions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127351
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Jakob Stoklund Olesen [Wed, 9 Mar 2011 19:27:02 +0000 (19:27 +0000)]
Delete a test case that is very sensitive to coalescer behavior.
The test is derived from an old miscompilation of
MultiSource/Benchmarks/VersaBench/8b10b which is run regularly, so we are not
losing coverage.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127350
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Bruno Cardoso Lopes [Wed, 9 Mar 2011 19:22:22 +0000 (19:22 +0000)]
Improve varags handling, with testcases. Patch by Sasa Stankovic
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127349
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Andrew Trick [Wed, 9 Mar 2011 19:17:10 +0000 (19:17 +0000)]
This test case should work with list-ilp or list-burr.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127348
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Andrew Trick [Wed, 9 Mar 2011 19:12:43 +0000 (19:12 +0000)]
Improve pre-RA-sched register pressure tracking for duplicate operands.
This helps cases like 2008-07-19-movups-spills.ll, but doesn't have an obvious impact on benchmarks
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127347
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Jan Sjödin [Wed, 9 Mar 2011 18:44:41 +0000 (18:44 +0000)]
Add createELFObjectTargetWriter method to TargetAsmBackend, which enables construction of non-standard ELFObjectWriters that can be used in MCJIT.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127346
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Jan Sjödin [Wed, 9 Mar 2011 18:36:40 +0000 (18:36 +0000)]
Missing file from previous commmit (127341) for InitializeTargetAsmParser function.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127345
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Jan Sjödin [Wed, 9 Mar 2011 17:33:05 +0000 (17:33 +0000)]
Add constructors to MCElfStreamer and MCObjectStreamer to take an extra MCAssembler * argument.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127343
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Andrew Trick [Wed, 9 Mar 2011 17:29:58 +0000 (17:29 +0000)]
When SCEV can determine the loop test is X < X, set ExactBECount=0.
When ExactBECount is a constant, use it for MaxBECount.
When MaxBECount cannot be computed, replace it with ExactBECount.
Fixes PR9424.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127342
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Jan Sjödin [Wed, 9 Mar 2011 17:25:46 +0000 (17:25 +0000)]
Add InitializeNativeAsmParser function.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127341
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Andrew Trick [Wed, 9 Mar 2011 17:23:39 +0000 (17:23 +0000)]
whitespace
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127340
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Benjamin Kramer [Wed, 9 Mar 2011 16:19:12 +0000 (16:19 +0000)]
Fix typo, make helper static.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127335
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Oscar Fuentes [Wed, 9 Mar 2011 14:44:46 +0000 (14:44 +0000)]
Process some link components that map to other expandable components
before the main loop. This is necessary because the loop ignores the
items added to `link_components' after it is entered.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127333
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Benjamin Kramer [Wed, 9 Mar 2011 14:20:28 +0000 (14:20 +0000)]
Remove unused virtual dtor.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127331
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NAKAMURA Takumi [Wed, 9 Mar 2011 11:33:15 +0000 (11:33 +0000)]
Target/X86: Tweak va_arg for Win64 not to miss taking va_start when number of fixed args > 4.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127328
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NAKAMURA Takumi [Wed, 9 Mar 2011 09:11:27 +0000 (09:11 +0000)]
Makefile.rules: [PR2928] "make install" may install include files along explicit pattern, not to install CMake's building stuff.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127325
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Nick Lewycky [Wed, 9 Mar 2011 08:20:06 +0000 (08:20 +0000)]
Fix two cases I forgot to update when doing a mental "getSwappedPredicate".
Thanks Duncan Sands!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127323
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Cameron Zwarich [Wed, 9 Mar 2011 08:11:02 +0000 (08:11 +0000)]
Add a test case for r127320.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127321
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Cameron Zwarich [Wed, 9 Mar 2011 07:34:11 +0000 (07:34 +0000)]
Fix a crasher introduced by r127317 that is seen on the bots when using an
alloca as both integer and floating-point vectors of the same size. Bugpoint is
not cooperating with me, but I'll try to find a manual testcase tomorrow.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127320
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Nick Lewycky [Wed, 9 Mar 2011 06:26:03 +0000 (06:26 +0000)]
Add another micro-optimization. Apologies for the lack of refactoring, but I
gave up when I realized I couldn't come up with a good name for what the
refactored function would be, to describe what it does.
This is PR9343 test12, which is test3 with arguments reordered. Whoops!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127318
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Cameron Zwarich [Wed, 9 Mar 2011 05:43:05 +0000 (05:43 +0000)]
Add support to scalar replacement for partial vector accesses of an alloca, e.g.
a union of a float, <2 x float>, and <4 x float>. This mostly comes up with the
use of vector intrinsics, especially in NEON when programmers know the layout of
the register file. This enables codegen to eliminate a lot of the subregister
traffic it would otherwise generate.
This commit only enables this for a small number of floating-point cases, but a
lot more integer cases. I assume this is okay for all ports, but I did not do
extensive testing of the quality of code involving i512 vectors and the like. If
there is a use case where this generates worse code than before, let me know and
we can scale it back.
This fixes <rdar://problem/
9036264>.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127317
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